Apalis/Colibri iMX6: make the parallel RGB usable

In U-Boot use the following display outputs a:
- Test the panel environment variable and if set use it
- Use HDMI if connected
- Use parallel output otherwise configured for VGA 640x480

The following strings can be set for the panel variable:
HDMI vga-rgb wvga-rgb

diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index 81ac092404bfc2f7628eebe7c803f904b901e670..c2d38f3ecfca591036a5f5a0d2247e6903fb940e 100644 (file)
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -69,6 +69,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
 
+#define OUTPUT_RGB (PAD_CTL_SPEED_MED|PAD_CTL_DSE_60ohm|PAD_CTL_SRE_FAST)
+
 u32 get_board_rev(void);
 
 int dram_init(void)
@@ -469,34 +471,34 @@ static iomux_v3_cfg_t const pwr_intb_pads[] = {
 };
 
 static iomux_v3_cfg_t const rgb_pads[] = {
-       MX6_PAD_EIM_A16__IPU1_DI1_DISP_CLK,
-       MX6_PAD_EIM_DA10__IPU1_DI1_PIN15,
-       MX6_PAD_EIM_DA11__IPU1_DI1_PIN02,
-       MX6_PAD_EIM_DA12__IPU1_DI1_PIN03,
-       MX6_PAD_EIM_DA9__IPU1_DISP1_DATA00,
-       MX6_PAD_EIM_DA8__IPU1_DISP1_DATA01,
-       MX6_PAD_EIM_DA7__IPU1_DISP1_DATA02,
-       MX6_PAD_EIM_DA6__IPU1_DISP1_DATA03,
-       MX6_PAD_EIM_DA5__IPU1_DISP1_DATA04,
-       MX6_PAD_EIM_DA4__IPU1_DISP1_DATA05,
-       MX6_PAD_EIM_DA3__IPU1_DISP1_DATA06,
-       MX6_PAD_EIM_DA2__IPU1_DISP1_DATA07,
-       MX6_PAD_EIM_DA1__IPU1_DISP1_DATA08,
-       MX6_PAD_EIM_DA0__IPU1_DISP1_DATA09,
-       MX6_PAD_EIM_EB1__IPU1_DISP1_DATA10,
-       MX6_PAD_EIM_EB0__IPU1_DISP1_DATA11,
-       MX6_PAD_EIM_A17__IPU1_DISP1_DATA12,
-       MX6_PAD_EIM_A18__IPU1_DISP1_DATA13,
-       MX6_PAD_EIM_A19__IPU1_DISP1_DATA14,
-       MX6_PAD_EIM_A20__IPU1_DISP1_DATA15,
-       MX6_PAD_EIM_A21__IPU1_DISP1_DATA16,
-       MX6_PAD_EIM_A22__IPU1_DISP1_DATA17,
-       MX6_PAD_EIM_A23__IPU1_DISP1_DATA18,
-       MX6_PAD_EIM_A24__IPU1_DISP1_DATA19,
-       MX6_PAD_EIM_D26__IPU1_DISP1_DATA22,
-       MX6_PAD_EIM_D27__IPU1_DISP1_DATA23,
-       MX6_PAD_EIM_D30__IPU1_DISP1_DATA21,
-       MX6_PAD_EIM_D31__IPU1_DISP1_DATA20,
+       MX6_PAD_EIM_A16__IPU1_DI1_DISP_CLK | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA10__IPU1_DI1_PIN15 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA11__IPU1_DI1_PIN02 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA12__IPU1_DI1_PIN03 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA9__IPU1_DISP1_DATA00 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA8__IPU1_DISP1_DATA01 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA7__IPU1_DISP1_DATA02 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA6__IPU1_DISP1_DATA03 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA5__IPU1_DISP1_DATA04 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA4__IPU1_DISP1_DATA05 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA3__IPU1_DISP1_DATA06 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA2__IPU1_DISP1_DATA07 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA1__IPU1_DISP1_DATA08 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_DA0__IPU1_DISP1_DATA09 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_EB1__IPU1_DISP1_DATA10 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_EB0__IPU1_DISP1_DATA11 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_A17__IPU1_DISP1_DATA12 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_A18__IPU1_DISP1_DATA13 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_A19__IPU1_DISP1_DATA14 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_A20__IPU1_DISP1_DATA15 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_A21__IPU1_DISP1_DATA16 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_A22__IPU1_DISP1_DATA17 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_A23__IPU1_DISP1_DATA18 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_A24__IPU1_DISP1_DATA19 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_D26__IPU1_DISP1_DATA22 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_D27__IPU1_DISP1_DATA23 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_D30__IPU1_DISP1_DATA21 | MUX_PAD_CTRL(OUTPUT_RGB),
+       MX6_PAD_EIM_D31__IPU1_DISP1_DATA20 | MUX_PAD_CTRL(OUTPUT_RGB),
 };
 
 static iomux_v3_cfg_t const vga_pads[] = {
@@ -580,6 +582,7 @@ static void enable_rgb(struct display_info_t const *dev)
        gpio_direction_output(RGB_BACKLIGHTPWM_OE, 0);
 }
 
+#if 0 /* currently unused, requires inverting blanking signal in driver */
 static void enable_vga(struct display_info_t const *dev)
 {
        imx_iomux_v3_setup_multiple_pads(
@@ -587,6 +590,13 @@ static void enable_vga(struct display_info_t const *dev)
                ARRAY_SIZE(vga_pads));
        gpio_direction_output(VGA_PSAVE_NOT_GP, 1);
 }
+#endif
+
+static int detect_default(struct display_info_t const *dev)
+{
+       (void) dev;
+       return 1;
+}
 
 struct display_info_t const displays[] = {{
        .bus    = -1,
@@ -608,6 +618,47 @@ struct display_info_t const displays[] = {{
                .vsync_len      = 10,
                .sync           = FB_SYNC_EXT,
                .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       .bus    = -1,
+       .addr   = 0,
+       .di     = 1,
+       .pixfmt = IPU_PIX_FMT_RGB24,
+       .detect = detect_default,
+       .enable = enable_rgb,
+       .mode   = {
+               .name           = "vga-rgb",
+               .refresh        = 60,
+               .xres           = 640,
+               .yres           = 480,
+               .pixclock       = 33000,
+               .left_margin    = 48,
+               .right_margin   = 16,
+               .upper_margin   = 31,
+               .lower_margin   = 11,
+               .hsync_len      = 96,
+               .vsync_len      = 2,
+               .sync           = 0,
+               .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       .bus    = -1,
+       .addr   = 0,
+       .di     = 1,
+       .pixfmt = IPU_PIX_FMT_RGB24,
+       .enable = enable_rgb,
+       .mode   = {
+               .name           = "wvga-rgb",
+               .refresh        = 60,
+               .xres           = 800,
+               .yres           = 480,
+               .pixclock       = 25000,
+               .left_margin    = 40,
+               .right_margin   = 88,
+               .upper_margin   = 33,
+               .lower_margin   = 10,
+               .hsync_len      = 128,
+               .vsync_len      = 2,
+               .sync           = 0,
+               .vmode          = FB_VMODE_NONINTERLACED
 } }, {
        .bus    = -1,
        .addr   = 0,
@@ -628,26 +679,7 @@ struct display_info_t const displays[] = {{
                .vsync_len      = 10,
                .sync           = FB_SYNC_EXT,
                .vmode          = FB_VMODE_NONINTERLACED
-} }, {
-       .bus    = -1,
-       .addr   = 0,
-       .pixfmt = IPU_PIX_FMT_RGB666,
-       .detect = detect_i2c,
-       .enable = enable_rgb,
-       .mode   = {
-               .name           = "wvga-rgb",
-               .refresh        = 57,
-               .xres           = 800,
-               .yres           = 480,
-               .pixclock       = 37037,
-               .left_margin    = 40,
-               .right_margin   = 60,
-               .upper_margin   = 10,
-               .lower_margin   = 10,
-               .hsync_len      = 20,
-               .vsync_len      = 10,
-               .sync           = 0,
-               .vmode          = FB_VMODE_NONINTERLACED
+#if 0 /* currently unused, requires inverting blanking signal in driver */
 } }, {
        .bus    = -1,
        .addr   = 0,
@@ -666,6 +698,7 @@ struct display_info_t const displays[] = {{
                .hsync_len      = 60,
                .vsync_len      = 10,
                .sync           = FB_SYNC_EXT,
+#endif
 } } };
 size_t display_count = ARRAY_SIZE(displays);
 

diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index ea250267653ae986cf1e60434ae8323c8ba50b03..61c3eff54563abb258994edd047d148833c9b241 100644 (file)
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -68,6 +68,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
 
+#define OUTPUT_RGB (PAD_CTL_SPEED_MED|PAD_CTL_DSE_60ohm|PAD_CTL_SRE_FAST)
+
 u32 get_board_rev(void);
 
 int dram_init(void)
@@ -339,28 +341,28 @@ static iomux_v3_cfg_t const backlight_pads[] = {
 };
 
 static iomux_v3_cfg_t const rgb_pads[] = {
-               MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK,
-               MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15,
-               MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02,
-               MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03,
-               MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00,
-               MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01,
-               MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02,
-               MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03,
-               MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04,
-               MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05,
-               MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06,
-               MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07,
-               MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08,
-               MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09,
-               MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10,
-               MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11,
-               MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12,
-               MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13,
-               MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14,
-               MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15,
-               MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16,
-               MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17,
+               MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 | MUX_PAD_CTRL(OUTPUT_RGB),
+               MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 | MUX_PAD_CTRL(OUTPUT_RGB),
 };
 
 static void do_enable_hdmi(struct display_info_t const *dev)
@@ -377,6 +379,12 @@ static void enable_rgb(struct display_info_t const *dev)
        gpio_direction_output(RGB_BACKLIGHTPWM_GP, 0);
 }
 
+static int detect_default(struct display_info_t const *dev)
+{
+       (void) dev;
+       return 1;
+}
+
 struct display_info_t const displays[] = {{
        .bus    = -1,
        .addr   = 0,
@@ -401,18 +409,18 @@ struct display_info_t const displays[] = {{
        .bus    = -1,
        .addr   = 0,
        .pixfmt = IPU_PIX_FMT_RGB666,
-       .detect = NULL,
+       .detect = detect_default,
        .enable = enable_rgb,
        .mode   = {
                .name           = "vga-rgb",
                .refresh        = 60,
                .xres           = 640,
                .yres           = 480,
-               .pixclock       = 39682,
+               .pixclock       = 33000,
                .left_margin    = 48,
                .right_margin   = 16,
-               .upper_margin   = 33,
-               .lower_margin   = 10,
+               .upper_margin   = 31,
+               .lower_margin   = 11,
                .hsync_len      = 96,
                .vsync_len      = 2,
                .sync           = 0,
@@ -421,20 +429,19 @@ struct display_info_t const displays[] = {{
        .bus    = -1,
        .addr   = 0,
        .pixfmt = IPU_PIX_FMT_RGB666,
-       .detect = NULL,
        .enable = enable_rgb,
        .mode   = {
                .name           = "wvga-rgb",
-               .refresh        = 57,
+               .refresh        = 60,
                .xres           = 800,
                .yres           = 480,
-               .pixclock       = 37037,
+               .pixclock       = 25000,
                .left_margin    = 40,
-               .right_margin   = 60,
-               .upper_margin   = 10,
+               .right_margin   = 88,
+               .upper_margin   = 33,
                .lower_margin   = 10,
-               .hsync_len      = 20,
-               .vsync_len      = 10,
+               .hsync_len      = 128,
+               .vsync_len      = 2,
                .sync           = 0,
                .vmode          = FB_VMODE_NONINTERLACED
 } } };