drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32 #include <ttm/ttm_bo_api.h>
  33 #include <ttm/ttm_bo_driver.h>
  34 #include <ttm/ttm_placement.h>
  35 #include <ttm/ttm_module.h>
  36 #include <ttm/ttm_page_alloc.h>
  37 #include <drm/drmP.h>
  38 #include <drm/radeon_drm.h>
  39 #include <linux/seq_file.h>
  40 #include <linux/slab.h>
  41 #include <linux/swiotlb.h>
  42 #include <linux/debugfs.h>
  43 #include "radeon_reg.h"
  44 #include "radeon.h"
  45
  46 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
  47
  48 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  49 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
  50
  51 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  52 {
  53         struct radeon_mman *mman;
  54         struct radeon_device *rdev;
  55
  56         mman = container_of(bdev, struct radeon_mman, bdev);
  57         rdev = container_of(mman, struct radeon_device, mman);
  58         return rdev;
  59 }
  60
  61
  62 /*
  63  * Global memory.
  64  */
  65 static int radeon_ttm_mem_global_init(struct drm_global_reference *ref)
  66 {
  67         return ttm_mem_global_init(ref->object);
  68 }
  69
  70 static void radeon_ttm_mem_global_release(struct drm_global_reference *ref)
  71 {
  72         ttm_mem_global_release(ref->object);
  73 }
  74
  75 static int radeon_ttm_global_init(struct radeon_device *rdev)
  76 {
  77         struct drm_global_reference *global_ref;
  78         int r;
  79
  80         rdev->mman.mem_global_referenced = false;
  81         global_ref = &rdev->mman.mem_global_ref;
  82         global_ref->global_type = DRM_GLOBAL_TTM_MEM;
  83         global_ref->size = sizeof(struct ttm_mem_global);
  84         global_ref->init = &radeon_ttm_mem_global_init;
  85         global_ref->release = &radeon_ttm_mem_global_release;
  86         r = drm_global_item_ref(global_ref);
  87         if (r != 0) {
  88                 DRM_ERROR("Failed setting up TTM memory accounting "
  89                           "subsystem.\n");
  90                 return r;
  91         }
  92
  93         rdev->mman.bo_global_ref.mem_glob =
  94                 rdev->mman.mem_global_ref.object;
  95         global_ref = &rdev->mman.bo_global_ref.ref;
  96         global_ref->global_type = DRM_GLOBAL_TTM_BO;
  97         global_ref->size = sizeof(struct ttm_bo_global);
  98         global_ref->init = &ttm_bo_global_init;
  99         global_ref->release = &ttm_bo_global_release;
 100         r = drm_global_item_ref(global_ref);
 101         if (r != 0) {
 102                 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
 103                 drm_global_item_unref(&rdev->mman.mem_global_ref);
 104                 return r;
 105         }
 106
 107         rdev->mman.mem_global_referenced = true;
 108         return 0;
 109 }
 110
 111 static void radeon_ttm_global_fini(struct radeon_device *rdev)
 112 {
 113         if (rdev->mman.mem_global_referenced) {
 114                 drm_global_item_unref(&rdev->mman.bo_global_ref.ref);
 115                 drm_global_item_unref(&rdev->mman.mem_global_ref);
 116                 rdev->mman.mem_global_referenced = false;
 117         }
 118 }
 119
 120 static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
 121 {
 122         return 0;
 123 }
 124
 125 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
 126                                 struct ttm_mem_type_manager *man)
 127 {
 128         struct radeon_device *rdev;
 129
 130         rdev = radeon_get_rdev(bdev);
 131
 132         switch (type) {
 133         case TTM_PL_SYSTEM:
 134                 /* System memory */
 135                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 136                 man->available_caching = TTM_PL_MASK_CACHING;
 137                 man->default_caching = TTM_PL_FLAG_CACHED;
 138                 break;
 139         case TTM_PL_TT:
 140                 man->func = &ttm_bo_manager_func;
 141                 man->gpu_offset = rdev->mc.gtt_start;
 142                 man->available_caching = TTM_PL_MASK_CACHING;
 143                 man->default_caching = TTM_PL_FLAG_CACHED;
 144                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
 145 #if __OS_HAS_AGP
 146                 if (rdev->flags & RADEON_IS_AGP) {
 147                         if (!rdev->ddev->agp) {
 148                                 DRM_ERROR("AGP is not enabled for memory type %u\n",
 149                                           (unsigned)type);
 150                                 return -EINVAL;
 151                         }
 152                         if (!rdev->ddev->agp->cant_use_aperture)
 153                                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 154                         man->available_caching = TTM_PL_FLAG_UNCACHED |
 155                                                  TTM_PL_FLAG_WC;
 156                         man->default_caching = TTM_PL_FLAG_WC;
 157                 }
 158 #endif
 159                 break;
 160         case TTM_PL_VRAM:
 161                 /* "On-card" video ram */
 162                 man->func = &ttm_bo_manager_func;
 163                 man->gpu_offset = rdev->mc.vram_start;
 164                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
 165                              TTM_MEMTYPE_FLAG_MAPPABLE;
 166                 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
 167                 man->default_caching = TTM_PL_FLAG_WC;
 168                 break;
 169         default:
 170                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
 171                 return -EINVAL;
 172         }
 173         return 0;
 174 }
 175
 176 static void radeon_evict_flags(struct ttm_buffer_object *bo,
 177                                 struct ttm_placement *placement)
 178 {
 179         struct radeon_bo *rbo;
 180         static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
 181
 182         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
 183                 placement->fpfn = 0;
 184                 placement->lpfn = 0;
 185                 placement->placement = &placements;
 186                 placement->busy_placement = &placements;
 187                 placement->num_placement = 1;
 188                 placement->num_busy_placement = 1;
 189                 return;
 190         }
 191         rbo = container_of(bo, struct radeon_bo, tbo);
 192         switch (bo->mem.mem_type) {
 193         case TTM_PL_VRAM:
 194                 if (rbo->rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready == false)
 195                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 196                 else
 197                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 198                 break;
 199         case TTM_PL_TT:
 200         default:
 201                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 202         }
 203         *placement = rbo->placement;
 204 }
 205
 206 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 207 {
 208         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 209
 210         return drm_vma_node_verify_access(&rbo->gem_base.vma_node, filp);
 211 }
 212
 213 static void radeon_move_null(struct ttm_buffer_object *bo,
 214                              struct ttm_mem_reg *new_mem)
 215 {
 216         struct ttm_mem_reg *old_mem = &bo->mem;
 217
 218         BUG_ON(old_mem->mm_node != NULL);
 219         *old_mem = *new_mem;
 220         new_mem->mm_node = NULL;
 221 }
 222
 223 static int radeon_move_blit(struct ttm_buffer_object *bo,
 224                         bool evict, bool no_wait_gpu,
 225                         struct ttm_mem_reg *new_mem,
 226                         struct ttm_mem_reg *old_mem)
 227 {
 228         struct radeon_device *rdev;
 229         uint64_t old_start, new_start;
 230         struct radeon_fence *fence;
 231         int r, ridx;
 232
 233         rdev = radeon_get_rdev(bo->bdev);
 234         ridx = radeon_copy_ring_index(rdev);
 235         old_start = old_mem->start << PAGE_SHIFT;
 236         new_start = new_mem->start << PAGE_SHIFT;
 237
 238         switch (old_mem->mem_type) {
 239         case TTM_PL_VRAM:
 240                 old_start += rdev->mc.vram_start;
 241                 break;
 242         case TTM_PL_TT:
 243                 old_start += rdev->mc.gtt_start;
 244                 break;
 245         default:
 246                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 247                 return -EINVAL;
 248         }
 249         switch (new_mem->mem_type) {
 250         case TTM_PL_VRAM:
 251                 new_start += rdev->mc.vram_start;
 252                 break;
 253         case TTM_PL_TT:
 254                 new_start += rdev->mc.gtt_start;
 255                 break;
 256         default:
 257                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 258                 return -EINVAL;
 259         }
 260         if (!rdev->ring[ridx].ready) {
 261                 DRM_ERROR("Trying to move memory with ring turned off.\n");
 262                 return -EINVAL;
 263         }
 264
 265         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
 266
 267         /* sync other rings */
 268         fence = bo->sync_obj;
 269         r = radeon_copy(rdev, old_start, new_start,
 270                         new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE), /* GPU pages */
 271                         &fence);
 272         /* FIXME: handle copy error */
 273         r = ttm_bo_move_accel_cleanup(bo, (void *)fence,
 274                                       evict, no_wait_gpu, new_mem);
 275         radeon_fence_unref(&fence);
 276         return r;
 277 }
 278
 279 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 280                                 bool evict, bool interruptible,
 281                                 bool no_wait_gpu,
 282                                 struct ttm_mem_reg *new_mem)
 283 {
 284         struct radeon_device *rdev;
 285         struct ttm_mem_reg *old_mem = &bo->mem;
 286         struct ttm_mem_reg tmp_mem;
 287         u32 placements;
 288         struct ttm_placement placement;
 289         int r;
 290
 291         rdev = radeon_get_rdev(bo->bdev);
 292         tmp_mem = *new_mem;
 293         tmp_mem.mm_node = NULL;
 294         placement.fpfn = 0;
 295         placement.lpfn = 0;
 296         placement.num_placement = 1;
 297         placement.placement = &placements;
 298         placement.num_busy_placement = 1;
 299         placement.busy_placement = &placements;
 300         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 301         r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
 302                              interruptible, no_wait_gpu);
 303         if (unlikely(r)) {
 304                 return r;
 305         }
 306
 307         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
 308         if (unlikely(r)) {
 309                 goto out_cleanup;
 310         }
 311
 312         r = ttm_tt_bind(bo->ttm, &tmp_mem);
 313         if (unlikely(r)) {
 314                 goto out_cleanup;
 315         }
 316         r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);
 317         if (unlikely(r)) {
 318                 goto out_cleanup;
 319         }
 320         r = ttm_bo_move_ttm(bo, true, no_wait_gpu, new_mem);
 321 out_cleanup:
 322         ttm_bo_mem_put(bo, &tmp_mem);
 323         return r;
 324 }
 325
 326 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 327                                 bool evict, bool interruptible,
 328                                 bool no_wait_gpu,
 329                                 struct ttm_mem_reg *new_mem)
 330 {
 331         struct radeon_device *rdev;
 332         struct ttm_mem_reg *old_mem = &bo->mem;
 333         struct ttm_mem_reg tmp_mem;
 334         struct ttm_placement placement;
 335         u32 placements;
 336         int r;
 337
 338         rdev = radeon_get_rdev(bo->bdev);
 339         tmp_mem = *new_mem;
 340         tmp_mem.mm_node = NULL;
 341         placement.fpfn = 0;
 342         placement.lpfn = 0;
 343         placement.num_placement = 1;
 344         placement.placement = &placements;
 345         placement.num_busy_placement = 1;
 346         placement.busy_placement = &placements;
 347         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 348         r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
 349                              interruptible, no_wait_gpu);
 350         if (unlikely(r)) {
 351                 return r;
 352         }
 353         r = ttm_bo_move_ttm(bo, true, no_wait_gpu, &tmp_mem);
 354         if (unlikely(r)) {
 355                 goto out_cleanup;
 356         }
 357         r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);
 358         if (unlikely(r)) {
 359                 goto out_cleanup;
 360         }
 361 out_cleanup:
 362         ttm_bo_mem_put(bo, &tmp_mem);
 363         return r;
 364 }
 365
 366 static int radeon_bo_move(struct ttm_buffer_object *bo,
 367                         bool evict, bool interruptible,
 368                         bool no_wait_gpu,
 369                         struct ttm_mem_reg *new_mem)
 370 {
 371         struct radeon_device *rdev;
 372         struct ttm_mem_reg *old_mem = &bo->mem;
 373         int r;
 374
 375         rdev = radeon_get_rdev(bo->bdev);
 376         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 377                 radeon_move_null(bo, new_mem);
 378                 return 0;
 379         }
 380         if ((old_mem->mem_type == TTM_PL_TT &&
 381              new_mem->mem_type == TTM_PL_SYSTEM) ||
 382             (old_mem->mem_type == TTM_PL_SYSTEM &&
 383              new_mem->mem_type == TTM_PL_TT)) {
 384                 /* bind is enough */
 385                 radeon_move_null(bo, new_mem);
 386                 return 0;
 387         }
 388         if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
 389             rdev->asic->copy.copy == NULL) {
 390                 /* use memcpy */
 391                 goto memcpy;
 392         }
 393
 394         if (old_mem->mem_type == TTM_PL_VRAM &&
 395             new_mem->mem_type == TTM_PL_SYSTEM) {
 396                 r = radeon_move_vram_ram(bo, evict, interruptible,
 397                                         no_wait_gpu, new_mem);
 398         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 399                    new_mem->mem_type == TTM_PL_VRAM) {
 400                 r = radeon_move_ram_vram(bo, evict, interruptible,
 401                                             no_wait_gpu, new_mem);
 402         } else {
 403                 r = radeon_move_blit(bo, evict, no_wait_gpu, new_mem, old_mem);
 404         }
 405
 406         if (r) {
 407 memcpy:
 408                 r = ttm_bo_move_memcpy(bo, evict, no_wait_gpu, new_mem);
 409         }
 410         return r;
 411 }
 412
 413 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 414 {
 415         struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
 416         struct radeon_device *rdev = radeon_get_rdev(bdev);
 417
 418         mem->bus.addr = NULL;
 419         mem->bus.offset = 0;
 420         mem->bus.size = mem->num_pages << PAGE_SHIFT;
 421         mem->bus.base = 0;
 422         mem->bus.is_iomem = false;
 423         if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
 424                 return -EINVAL;
 425         switch (mem->mem_type) {
 426         case TTM_PL_SYSTEM:
 427                 /* system memory */
 428                 return 0;
 429         case TTM_PL_TT:
 430 #if __OS_HAS_AGP
 431                 if (rdev->flags & RADEON_IS_AGP) {
 432                         /* RADEON_IS_AGP is set only if AGP is active */
 433                         mem->bus.offset = mem->start << PAGE_SHIFT;
 434                         mem->bus.base = rdev->mc.agp_base;
 435                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
 436                 }
 437 #endif
 438                 break;
 439         case TTM_PL_VRAM:
 440                 mem->bus.offset = mem->start << PAGE_SHIFT;
 441                 /* check if it's visible */
 442                 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)
 443                         return -EINVAL;
 444                 mem->bus.base = rdev->mc.aper_base;
 445                 mem->bus.is_iomem = true;
 446 #ifdef __alpha__
 447                 /*
 448                  * Alpha: use bus.addr to hold the ioremap() return,
 449                  * so we can modify bus.base below.
 450                  */
 451                 if (mem->placement & TTM_PL_FLAG_WC)
 452                         mem->bus.addr =
 453                                 ioremap_wc(mem->bus.base + mem->bus.offset,
 454                                            mem->bus.size);
 455                 else
 456                         mem->bus.addr =
 457                                 ioremap_nocache(mem->bus.base + mem->bus.offset,
 458                                                 mem->bus.size);
 459
 460                 /*
 461                  * Alpha: Use just the bus offset plus
 462                  * the hose/domain memory base for bus.base.
 463                  * It then can be used to build PTEs for VRAM
 464                  * access, as done in ttm_bo_vm_fault().
 465                  */
 466                 mem->bus.base = (mem->bus.base & 0x0ffffffffUL) +
 467                         rdev->ddev->hose->dense_mem_base;
 468 #endif
 469                 break;
 470         default:
 471                 return -EINVAL;
 472         }
 473         return 0;
 474 }
 475
 476 static void radeon_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 477 {
 478 }
 479
 480 static int radeon_sync_obj_wait(void *sync_obj, bool lazy, bool interruptible)
 481 {
 482         return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
 483 }
 484
 485 static int radeon_sync_obj_flush(void *sync_obj)
 486 {
 487         return 0;
 488 }
 489
 490 static void radeon_sync_obj_unref(void **sync_obj)
 491 {
 492         radeon_fence_unref((struct radeon_fence **)sync_obj);
 493 }
 494
 495 static void *radeon_sync_obj_ref(void *sync_obj)
 496 {
 497         return radeon_fence_ref((struct radeon_fence *)sync_obj);
 498 }
 499
 500 static bool radeon_sync_obj_signaled(void *sync_obj)
 501 {
 502         return radeon_fence_signaled((struct radeon_fence *)sync_obj);
 503 }
 504
 505 /*
 506  * TTM backend functions.
 507  */
 508 struct radeon_ttm_tt {
 509         struct ttm_dma_tt               ttm;
 510         struct radeon_device            *rdev;
 511         u64                             offset;
 512 };
 513
 514 static int radeon_ttm_backend_bind(struct ttm_tt *ttm,
 515                                    struct ttm_mem_reg *bo_mem)
 516 {
 517         struct radeon_ttm_tt *gtt = (void*)ttm;
 518         int r;
 519
 520         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
 521         if (!ttm->num_pages) {
 522                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
 523                      ttm->num_pages, bo_mem, ttm);
 524         }
 525         r = radeon_gart_bind(gtt->rdev, gtt->offset,
 526                              ttm->num_pages, ttm->pages, gtt->ttm.dma_address);
 527         if (r) {
 528                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 529                           ttm->num_pages, (unsigned)gtt->offset);
 530                 return r;
 531         }
 532         return 0;
 533 }
 534
 535 static int radeon_ttm_backend_unbind(struct ttm_tt *ttm)
 536 {
 537         struct radeon_ttm_tt *gtt = (void *)ttm;
 538
 539         radeon_gart_unbind(gtt->rdev, gtt->offset, ttm->num_pages);
 540         return 0;
 541 }
 542
 543 static void radeon_ttm_backend_destroy(struct ttm_tt *ttm)
 544 {
 545         struct radeon_ttm_tt *gtt = (void *)ttm;
 546
 547         ttm_dma_tt_fini(&gtt->ttm);
 548         kfree(gtt);
 549 }
 550
 551 static struct ttm_backend_func radeon_backend_func = {
 552         .bind = &radeon_ttm_backend_bind,
 553         .unbind = &radeon_ttm_backend_unbind,
 554         .destroy = &radeon_ttm_backend_destroy,
 555 };
 556
 557 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_bo_device *bdev,
 558                                     unsigned long size, uint32_t page_flags,
 559                                     struct page *dummy_read_page)
 560 {
 561         struct radeon_device *rdev;
 562         struct radeon_ttm_tt *gtt;
 563
 564         rdev = radeon_get_rdev(bdev);
 565 #if __OS_HAS_AGP
 566         if (rdev->flags & RADEON_IS_AGP) {
 567                 return ttm_agp_tt_create(bdev, rdev->ddev->agp->bridge,
 568                                          size, page_flags, dummy_read_page);
 569         }
 570 #endif
 571
 572         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
 573         if (gtt == NULL) {
 574                 return NULL;
 575         }
 576         gtt->ttm.ttm.func = &radeon_backend_func;
 577         gtt->rdev = rdev;
 578         if (ttm_dma_tt_init(&gtt->ttm, bdev, size, page_flags, dummy_read_page)) {
 579                 kfree(gtt);
 580                 return NULL;
 581         }
 582         return &gtt->ttm.ttm;
 583 }
 584
 585 static int radeon_ttm_tt_populate(struct ttm_tt *ttm)
 586 {
 587         struct radeon_device *rdev;
 588         struct radeon_ttm_tt *gtt = (void *)ttm;
 589         unsigned i;
 590         int r;
 591         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 592
 593         if (ttm->state != tt_unpopulated)
 594                 return 0;
 595
 596         if (slave && ttm->sg) {
 597                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 598                                                  gtt->ttm.dma_address, ttm->num_pages);
 599                 ttm->state = tt_unbound;
 600                 return 0;
 601         }
 602
 603         rdev = radeon_get_rdev(ttm->bdev);
 604 #if __OS_HAS_AGP
 605         if (rdev->flags & RADEON_IS_AGP) {
 606                 return ttm_agp_tt_populate(ttm);
 607         }
 608 #endif
 609
 610 #ifdef CONFIG_SWIOTLB
 611         if (swiotlb_nr_tbl()) {
 612                 return ttm_dma_populate(&gtt->ttm, rdev->dev);
 613         }
 614 #endif
 615
 616         r = ttm_pool_populate(ttm);
 617         if (r) {
 618                 return r;
 619         }
 620
 621         for (i = 0; i < ttm->num_pages; i++) {
 622                 gtt->ttm.dma_address[i] = pci_map_page(rdev->pdev, ttm->pages[i],
 623                                                        0, PAGE_SIZE,
 624                                                        PCI_DMA_BIDIRECTIONAL);
 625                 if (pci_dma_mapping_error(rdev->pdev, gtt->ttm.dma_address[i])) {
 626                         while (--i) {
 627                                 pci_unmap_page(rdev->pdev, gtt->ttm.dma_address[i],
 628                                                PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 629                                 gtt->ttm.dma_address[i] = 0;
 630                         }
 631                         ttm_pool_unpopulate(ttm);
 632                         return -EFAULT;
 633                 }
 634         }
 635         return 0;
 636 }
 637
 638 static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm)
 639 {
 640         struct radeon_device *rdev;
 641         struct radeon_ttm_tt *gtt = (void *)ttm;
 642         unsigned i;
 643         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 644
 645         if (slave)
 646                 return;
 647
 648         rdev = radeon_get_rdev(ttm->bdev);
 649 #if __OS_HAS_AGP
 650         if (rdev->flags & RADEON_IS_AGP) {
 651                 ttm_agp_tt_unpopulate(ttm);
 652                 return;
 653         }
 654 #endif
 655
 656 #ifdef CONFIG_SWIOTLB
 657         if (swiotlb_nr_tbl()) {
 658                 ttm_dma_unpopulate(&gtt->ttm, rdev->dev);
 659                 return;
 660         }
 661 #endif
 662
 663         for (i = 0; i < ttm->num_pages; i++) {
 664                 if (gtt->ttm.dma_address[i]) {
 665                         pci_unmap_page(rdev->pdev, gtt->ttm.dma_address[i],
 666                                        PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 667                 }
 668         }
 669
 670         ttm_pool_unpopulate(ttm);
 671 }
 672
 673 static struct ttm_bo_driver radeon_bo_driver = {
 674         .ttm_tt_create = &radeon_ttm_tt_create,
 675         .ttm_tt_populate = &radeon_ttm_tt_populate,
 676         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
 677         .invalidate_caches = &radeon_invalidate_caches,
 678         .init_mem_type = &radeon_init_mem_type,
 679         .evict_flags = &radeon_evict_flags,
 680         .move = &radeon_bo_move,
 681         .verify_access = &radeon_verify_access,
 682         .sync_obj_signaled = &radeon_sync_obj_signaled,
 683         .sync_obj_wait = &radeon_sync_obj_wait,
 684         .sync_obj_flush = &radeon_sync_obj_flush,
 685         .sync_obj_unref = &radeon_sync_obj_unref,
 686         .sync_obj_ref = &radeon_sync_obj_ref,
 687         .move_notify = &radeon_bo_move_notify,
 688         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
 689         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 690         .io_mem_free = &radeon_ttm_io_mem_free,
 691 };
 692
 693 int radeon_ttm_init(struct radeon_device *rdev)
 694 {
 695         int r;
 696
 697         r = radeon_ttm_global_init(rdev);
 698         if (r) {
 699                 return r;
 700         }
 701         /* No others user of address space so set it to 0 */
 702         r = ttm_bo_device_init(&rdev->mman.bdev,
 703                                rdev->mman.bo_global_ref.ref.object,
 704                                &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
 705                                rdev->need_dma32);
 706         if (r) {
 707                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 708                 return r;
 709         }
 710         rdev->mman.initialized = true;
 711         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
 712                                 rdev->mc.real_vram_size >> PAGE_SHIFT);
 713         if (r) {
 714                 DRM_ERROR("Failed initializing VRAM heap.\n");
 715                 return r;
 716         }
 717         /* Change the size here instead of the init above so only lpfn is affected */
 718         radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
 719
 720         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 721                              RADEON_GEM_DOMAIN_VRAM,
 722                              NULL, &rdev->stollen_vga_memory);
 723         if (r) {
 724                 return r;
 725         }
 726         r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 727         if (r)
 728                 return r;
 729         r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 730         radeon_bo_unreserve(rdev->stollen_vga_memory);
 731         if (r) {
 732                 radeon_bo_unref(&rdev->stollen_vga_memory);
 733                 return r;
 734         }
 735         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 736                  (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
 737         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
 738                                 rdev->mc.gtt_size >> PAGE_SHIFT);
 739         if (r) {
 740                 DRM_ERROR("Failed initializing GTT heap.\n");
 741                 return r;
 742         }
 743         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 744                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 745         rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
 746
 747         r = radeon_ttm_debugfs_init(rdev);
 748         if (r) {
 749                 DRM_ERROR("Failed to init debugfs\n");
 750                 return r;
 751         }
 752         return 0;
 753 }
 754
 755 void radeon_ttm_fini(struct radeon_device *rdev)
 756 {
 757         int r;
 758
 759         if (!rdev->mman.initialized)
 760                 return;
 761         radeon_ttm_debugfs_fini(rdev);
 762         if (rdev->stollen_vga_memory) {
 763                 r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 764                 if (r == 0) {
 765                         radeon_bo_unpin(rdev->stollen_vga_memory);
 766                         radeon_bo_unreserve(rdev->stollen_vga_memory);
 767                 }
 768                 radeon_bo_unref(&rdev->stollen_vga_memory);
 769         }
 770         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 771         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
 772         ttm_bo_device_release(&rdev->mman.bdev);
 773         radeon_gart_fini(rdev);
 774         radeon_ttm_global_fini(rdev);
 775         rdev->mman.initialized = false;
 776         DRM_INFO("radeon: ttm finalized\n");
 777 }
 778
 779 /* this should only be called at bootup or when userspace
 780  * isn't running */
 781 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
 782 {
 783         struct ttm_mem_type_manager *man;
 784
 785         if (!rdev->mman.initialized)
 786                 return;
 787
 788         man = &rdev->mman.bdev.man[TTM_PL_VRAM];
 789         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
 790         man->size = size >> PAGE_SHIFT;
 791 }
 792
 793 static struct vm_operations_struct radeon_ttm_vm_ops;
 794 static const struct vm_operations_struct *ttm_vm_ops = NULL;
 795
 796 static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 797 {
 798         struct ttm_buffer_object *bo;
 799         struct radeon_device *rdev;
 800         int r;
 801
 802         bo = (struct ttm_buffer_object *)vma->vm_private_data;
 803         if (bo == NULL) {
 804                 return VM_FAULT_NOPAGE;
 805         }
 806         rdev = radeon_get_rdev(bo->bdev);
 807         down_read(&rdev->pm.mclk_lock);
 808         r = ttm_vm_ops->fault(vma, vmf);
 809         up_read(&rdev->pm.mclk_lock);
 810         return r;
 811 }
 812
 813 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 814 {
 815         struct drm_file *file_priv;
 816         struct radeon_device *rdev;
 817         int r;
 818
 819         if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
 820                 return drm_mmap(filp, vma);
 821         }
 822
 823         file_priv = filp->private_data;
 824         rdev = file_priv->minor->dev->dev_private;
 825         if (rdev == NULL) {
 826                 return -EINVAL;
 827         }
 828         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 829         if (unlikely(r != 0)) {
 830                 return r;
 831         }
 832         if (unlikely(ttm_vm_ops == NULL)) {
 833                 ttm_vm_ops = vma->vm_ops;
 834                 radeon_ttm_vm_ops = *ttm_vm_ops;
 835                 radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
 836         }
 837         vma->vm_ops = &radeon_ttm_vm_ops;
 838         return 0;
 839 }
 840
 841 #if defined(CONFIG_DEBUG_FS)
 842
 843 static int radeon_mm_dump_table(struct seq_file *m, void *data)
 844 {
 845         struct drm_info_node *node = (struct drm_info_node *)m->private;
 846         unsigned ttm_pl = *(int *)node->info_ent->data;
 847         struct drm_device *dev = node->minor->dev;
 848         struct radeon_device *rdev = dev->dev_private;
 849         struct drm_mm *mm = (struct drm_mm *)rdev->mman.bdev.man[ttm_pl].priv;
 850         int ret;
 851         struct ttm_bo_global *glob = rdev->mman.bdev.glob;
 852
 853         spin_lock(&glob->lru_lock);
 854         ret = drm_mm_dump_table(m, mm);
 855         spin_unlock(&glob->lru_lock);
 856         return ret;
 857 }
 858
 859 static int ttm_pl_vram = TTM_PL_VRAM;
 860 static int ttm_pl_tt = TTM_PL_TT;
 861
 862 static struct drm_info_list radeon_ttm_debugfs_list[] = {
 863         {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
 864         {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
 865         {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
 866 #ifdef CONFIG_SWIOTLB
 867         {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
 868 #endif
 869 };
 870
 871 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
 872 {
 873         struct radeon_device *rdev = inode->i_private;
 874         i_size_write(inode, rdev->mc.mc_vram_size);
 875         filep->private_data = inode->i_private;
 876         return 0;
 877 }
 878
 879 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
 880                                     size_t size, loff_t *pos)
 881 {
 882         struct radeon_device *rdev = f->private_data;
 883         ssize_t result = 0;
 884         int r;
 885
 886         if (size & 0x3 || *pos & 0x3)
 887                 return -EINVAL;
 888
 889         while (size) {
 890                 unsigned long flags;
 891                 uint32_t value;
 892
 893                 if (*pos >= rdev->mc.mc_vram_size)
 894                         return result;
 895
 896                 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
 897                 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
 898                 if (rdev->family >= CHIP_CEDAR)
 899                         WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
 900                 value = RREG32(RADEON_MM_DATA);
 901                 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
 902
 903                 r = put_user(value, (uint32_t *)buf);
 904                 if (r)
 905                         return r;
 906
 907                 result += 4;
 908                 buf += 4;
 909                 *pos += 4;
 910                 size -= 4;
 911         }
 912
 913         return result;
 914 }
 915
 916 static const struct file_operations radeon_ttm_vram_fops = {
 917         .owner = THIS_MODULE,
 918         .open = radeon_ttm_vram_open,
 919         .read = radeon_ttm_vram_read,
 920         .llseek = default_llseek
 921 };
 922
 923 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
 924 {
 925         struct radeon_device *rdev = inode->i_private;
 926         i_size_write(inode, rdev->mc.gtt_size);
 927         filep->private_data = inode->i_private;
 928         return 0;
 929 }
 930
 931 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
 932                                    size_t size, loff_t *pos)
 933 {
 934         struct radeon_device *rdev = f->private_data;
 935         ssize_t result = 0;
 936         int r;
 937
 938         while (size) {
 939                 loff_t p = *pos / PAGE_SIZE;
 940                 unsigned off = *pos & ~PAGE_MASK;
 941                 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
 942                 struct page *page;
 943                 void *ptr;
 944
 945                 if (p >= rdev->gart.num_cpu_pages)
 946                         return result;
 947
 948                 page = rdev->gart.pages[p];
 949                 if (page) {
 950                         ptr = kmap(page);
 951                         ptr += off;
 952
 953                         r = copy_to_user(buf, ptr, cur_size);
 954                         kunmap(rdev->gart.pages[p]);
 955                 } else
 956                         r = clear_user(buf, cur_size);
 957
 958                 if (r)
 959                         return -EFAULT;
 960
 961                 result += cur_size;
 962                 buf += cur_size;
 963                 *pos += cur_size;
 964                 size -= cur_size;
 965         }
 966
 967         return result;
 968 }
 969
 970 static const struct file_operations radeon_ttm_gtt_fops = {
 971         .owner = THIS_MODULE,
 972         .open = radeon_ttm_gtt_open,
 973         .read = radeon_ttm_gtt_read,
 974         .llseek = default_llseek
 975 };
 976
 977 #endif
 978
 979 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
 980 {
 981 #if defined(CONFIG_DEBUG_FS)
 982         unsigned count;
 983
 984         struct drm_minor *minor = rdev->ddev->primary;
 985         struct dentry *ent, *root = minor->debugfs_root;
 986
 987         ent = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO, root,
 988                                   rdev, &radeon_ttm_vram_fops);
 989         if (IS_ERR(ent))
 990                 return PTR_ERR(ent);
 991         rdev->mman.vram = ent;
 992
 993         ent = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO, root,
 994                                   rdev, &radeon_ttm_gtt_fops);
 995         if (IS_ERR(ent))
 996                 return PTR_ERR(ent);
 997         rdev->mman.gtt = ent;
 998
 999         count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1000
1001 #ifdef CONFIG_SWIOTLB
1002         if (!swiotlb_nr_tbl())
1003                 --count;
1004 #endif
1005
1006         return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1007 #else
1008
1009         return 0;
1010 #endif
1011 }
1012
1013 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1014 {
1015 #if defined(CONFIG_DEBUG_FS)
1016
1017         debugfs_remove(rdev->mman.vram);
1018         rdev->mman.vram = NULL;
1019
1020         debugfs_remove(rdev->mman.gtt);
1021         rdev->mman.gtt = NULL;
1022 #endif
1023 }