Merge branch 'async-scsi-resume' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux.git] / arch / arm / kernel / kprobes-test-arm.c
1 /*
2  * arch/arm/kernel/kprobes-test-arm.c
3  *
4  * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <asm/system_info.h>
14 #include <asm/opcodes.h>
15
16 #include "kprobes-test.h"
17
18
19 #define TEST_ISA "32"
20
21 #define TEST_ARM_TO_THUMB_INTERWORK_R(code1, reg, val, code2)   \
22         TESTCASE_START(code1 #reg code2)                        \
23         TEST_ARG_REG(reg, val)                                  \
24         TEST_ARG_REG(14, 99f)                                   \
25         TEST_ARG_END("")                                        \
26         "50:    nop                     \n\t"                   \
27         "1:     "code1 #reg code2"      \n\t"                   \
28         "       bx      lr              \n\t"                   \
29         ".thumb                         \n\t"                   \
30         "3:     adr     lr, 2f          \n\t"                   \
31         "       bx      lr              \n\t"                   \
32         ".arm                           \n\t"                   \
33         "2:     nop                     \n\t"                   \
34         TESTCASE_END
35
36 #define TEST_ARM_TO_THUMB_INTERWORK_P(code1, reg, val, code2)   \
37         TESTCASE_START(code1 #reg code2)                        \
38         TEST_ARG_PTR(reg, val)                                  \
39         TEST_ARG_REG(14, 99f)                                   \
40         TEST_ARG_MEM(15, 3f+1)                                  \
41         TEST_ARG_END("")                                        \
42         "50:    nop                     \n\t"                   \
43         "1:     "code1 #reg code2"      \n\t"                   \
44         "       bx      lr              \n\t"                   \
45         ".thumb                         \n\t"                   \
46         "3:     adr     lr, 2f          \n\t"                   \
47         "       bx      lr              \n\t"                   \
48         ".arm                           \n\t"                   \
49         "2:     nop                     \n\t"                   \
50         TESTCASE_END
51
52
53 void kprobe_arm_test_cases(void)
54 {
55         kprobe_test_flags = 0;
56
57         TEST_GROUP("Data-processing (register), (register-shifted register), (immediate)")
58
59 #define _DATA_PROCESSING_DNM(op,s,val)                                          \
60         TEST_RR(  op "eq" s "   r0,  r",1, VAL1,", r",2, val, "")               \
61         TEST_RR(  op "ne" s "   r1,  r",1, VAL1,", r",2, val, ", lsl #3")       \
62         TEST_RR(  op "cs" s "   r2,  r",3, VAL1,", r",2, val, ", lsr #4")       \
63         TEST_RR(  op "cc" s "   r3,  r",3, VAL1,", r",2, val, ", asr #5")       \
64         TEST_RR(  op "mi" s "   r4,  r",5, VAL1,", r",2, N(val),", asr #6")     \
65         TEST_RR(  op "pl" s "   r5,  r",5, VAL1,", r",2, val, ", ror #7")       \
66         TEST_RR(  op "vs" s "   r6,  r",7, VAL1,", r",2, val, ", rrx")          \
67         TEST_R(   op "vc" s "   r6,  r",7, VAL1,", pc, lsl #3")                 \
68         TEST_R(   op "vc" s "   r6,  r",7, VAL1,", sp, lsr #4")                 \
69         TEST_R(   op "vc" s "   r6,  pc, r",7, VAL1,", asr #5")                 \
70         TEST_R(   op "vc" s "   r6,  sp, r",7, VAL1,", ror #6")                 \
71         TEST_RRR( op "hi" s "   r8,  r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")\
72         TEST_RRR( op "ls" s "   r9,  r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")\
73         TEST_RRR( op "ge" s "   r10, r",11,VAL1,", r",14,val, ", asr r",7, 5,"")\
74         TEST_RRR( op "lt" s "   r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\
75         TEST_RR(  op "gt" s "   r12, r13"       ", r",14,val, ", ror r",14,7,"")\
76         TEST_RR(  op "le" s "   r14, r",0, val, ", r13"       ", lsl r",14,8,"")\
77         TEST_RR(  op s "        r12, pc"        ", r",14,val, ", ror r",14,7,"")\
78         TEST_RR(  op s "        r14, r",0, val, ", pc"        ", lsl r",14,8,"")\
79         TEST_R(   op "eq" s "   r0,  r",11,VAL1,", #0xf5")                      \
80         TEST_R(   op "ne" s "   r11, r",0, VAL1,", #0xf5000000")                \
81         TEST_R(   op s "        r7,  r",8, VAL2,", #0x000af000")                \
82         TEST(     op s "        r4,  pc"        ", #0x00005a00")
83
84 #define DATA_PROCESSING_DNM(op,val)             \
85         _DATA_PROCESSING_DNM(op,"",val)         \
86         _DATA_PROCESSING_DNM(op,"s",val)
87
88 #define DATA_PROCESSING_NM(op,val)                                              \
89         TEST_RR(  op "ne        r",1, VAL1,", r",2, val, "")                    \
90         TEST_RR(  op "eq        r",1, VAL1,", r",2, val, ", lsl #3")            \
91         TEST_RR(  op "cc        r",3, VAL1,", r",2, val, ", lsr #4")            \
92         TEST_RR(  op "cs        r",3, VAL1,", r",2, val, ", asr #5")            \
93         TEST_RR(  op "pl        r",5, VAL1,", r",2, N(val),", asr #6")          \
94         TEST_RR(  op "mi        r",5, VAL1,", r",2, val, ", ror #7")            \
95         TEST_RR(  op "vc        r",7, VAL1,", r",2, val, ", rrx")               \
96         TEST_R (  op "vs        r",7, VAL1,", pc, lsl #3")                      \
97         TEST_R (  op "vs        r",7, VAL1,", sp, lsr #4")                      \
98         TEST_R(   op "vs        pc, r",7, VAL1,", asr #5")                      \
99         TEST_R(   op "vs        sp, r",7, VAL1,", ror #6")                      \
100         TEST_RRR( op "ls        r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")     \
101         TEST_RRR( op "hi        r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")     \
102         TEST_RRR( op "lt        r",11,VAL1,", r",14,val, ", asr r",7, 5,"")     \
103         TEST_RRR( op "ge        r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")   \
104         TEST_RR(  op "le        r13"       ", r",14,val, ", ror r",14,7,"")     \
105         TEST_RR(  op "gt        r",0, val, ", r13"       ", lsl r",14,8,"")     \
106         TEST_RR(  op "  pc"        ", r",14,val, ", ror r",14,7,"")             \
107         TEST_RR(  op "  r",0, val, ", pc"        ", lsl r",14,8,"")             \
108         TEST_R(   op "eq        r",11,VAL1,", #0xf5")                           \
109         TEST_R(   op "ne        r",0, VAL1,", #0xf5000000")                     \
110         TEST_R(   op "  r",8, VAL2,", #0x000af000")
111
112 #define _DATA_PROCESSING_DM(op,s,val)                                   \
113         TEST_R(   op "eq" s "   r0,  r",1, val, "")                     \
114         TEST_R(   op "ne" s "   r1,  r",1, val, ", lsl #3")             \
115         TEST_R(   op "cs" s "   r2,  r",3, val, ", lsr #4")             \
116         TEST_R(   op "cc" s "   r3,  r",3, val, ", asr #5")             \
117         TEST_R(   op "mi" s "   r4,  r",5, N(val),", asr #6")           \
118         TEST_R(   op "pl" s "   r5,  r",5, val, ", ror #7")             \
119         TEST_R(   op "vs" s "   r6,  r",10,val, ", rrx")                \
120         TEST(     op "vs" s "   r7,  pc, lsl #3")                       \
121         TEST(     op "vs" s "   r7,  sp, lsr #4")                       \
122         TEST_RR(  op "vc" s "   r8,  r",7, val, ", lsl r",0, 3,"")      \
123         TEST_RR(  op "hi" s "   r9,  r",9, val, ", lsr r",7, 4,"")      \
124         TEST_RR(  op "ls" s "   r10, r",9, val, ", asr r",7, 5,"")      \
125         TEST_RR(  op "ge" s "   r11, r",11,N(val),", asr r",7, 6,"")    \
126         TEST_RR(  op "lt" s "   r12, r",11,val, ", ror r",14,7,"")      \
127         TEST_R(   op "gt" s "   r14, r13"       ", lsl r",14,8,"")      \
128         TEST_R(   op "le" s "   r14, pc"        ", lsl r",14,8,"")      \
129         TEST(     op "eq" s "   r0,  #0xf5")                            \
130         TEST(     op "ne" s "   r11, #0xf5000000")                      \
131         TEST(     op s "        r7,  #0x000af000")                      \
132         TEST(     op s "        r4,  #0x00005a00")
133
134 #define DATA_PROCESSING_DM(op,val)              \
135         _DATA_PROCESSING_DM(op,"",val)          \
136         _DATA_PROCESSING_DM(op,"s",val)
137
138         DATA_PROCESSING_DNM("and",0xf00f00ff)
139         DATA_PROCESSING_DNM("eor",0xf00f00ff)
140         DATA_PROCESSING_DNM("sub",VAL2)
141         DATA_PROCESSING_DNM("rsb",VAL2)
142         DATA_PROCESSING_DNM("add",VAL2)
143         DATA_PROCESSING_DNM("adc",VAL2)
144         DATA_PROCESSING_DNM("sbc",VAL2)
145         DATA_PROCESSING_DNM("rsc",VAL2)
146         DATA_PROCESSING_NM("tst",0xf00f00ff)
147         DATA_PROCESSING_NM("teq",0xf00f00ff)
148         DATA_PROCESSING_NM("cmp",VAL2)
149         DATA_PROCESSING_NM("cmn",VAL2)
150         DATA_PROCESSING_DNM("orr",0xf00f00ff)
151         DATA_PROCESSING_DM("mov",VAL2)
152         DATA_PROCESSING_DNM("bic",0xf00f00ff)
153         DATA_PROCESSING_DM("mvn",VAL2)
154
155         TEST("mov       ip, sp") /* This has special case emulation code */
156
157         TEST_SUPPORTED("mov     pc, #0x1000");
158         TEST_SUPPORTED("mov     sp, #0x1000");
159         TEST_SUPPORTED("cmp     pc, #0x1000");
160         TEST_SUPPORTED("cmp     sp, #0x1000");
161
162         /* Data-processing with PC as shift*/
163         TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) "       @ cmp   r12, r14, asl pc")
164         TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) "       @ mov   r12, r14, asl pc")
165         TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) "       @ add   r10, r12, r14, asl pc")
166
167         /* Data-processing with PC as shift*/
168         TEST_UNSUPPORTED("movs  pc, r1")
169         TEST_UNSUPPORTED("movs  pc, r1, lsl r2")
170         TEST_UNSUPPORTED("movs  pc, #0x10000")
171         TEST_UNSUPPORTED("adds  pc, lr, r1")
172         TEST_UNSUPPORTED("adds  pc, lr, r1, lsl r2")
173         TEST_UNSUPPORTED("adds  pc, lr, #4")
174
175         /* Data-processing with SP as target */
176         TEST("add       sp, sp, #16")
177         TEST("sub       sp, sp, #8")
178         TEST("bic       sp, sp, #0x20")
179         TEST("orr       sp, sp, #0x20")
180         TEST_PR( "add   sp, r",10,0,", r",11,4,"")
181         TEST_PRR("add   sp, r",10,0,", r",11,4,", asl r",12,1,"")
182         TEST_P(  "mov   sp, r",10,0,"")
183         TEST_PR( "mov   sp, r",10,0,", asl r",12,0,"")
184
185         /* Data-processing with PC as target */
186         TEST_BF(   "add pc, pc, #2f-1b-8")
187         TEST_BF_R ("add pc, pc, r",14,2f-1f-8,"")
188         TEST_BF_R ("add pc, r",14,2f-1f-8,", pc")
189         TEST_BF_R ("mov pc, r",0,2f,"")
190         TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"")
191         TEST_BB(   "sub pc, pc, #1b-2b+8")
192 #if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
193         TEST_BB(   "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
194 #endif
195         TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"")
196         TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc")
197         TEST_RR(   "add pc, pc, r",10,-2,", asl r",11,1,"")
198 #ifdef CONFIG_THUMB2_KERNEL
199         TEST_ARM_TO_THUMB_INTERWORK_R("add      pc, pc, r",0,3f-1f-8+1,"")
200         TEST_ARM_TO_THUMB_INTERWORK_R("sub      pc, r",0,3f+8+1,", #8")
201 #endif
202         TEST_GROUP("Miscellaneous instructions")
203
204         TEST("mrs       r0, cpsr")
205         TEST("mrspl     r7, cpsr")
206         TEST("mrs       r14, cpsr")
207         TEST_UNSUPPORTED(__inst_arm(0xe10ff000) "       @ mrs r15, cpsr")
208         TEST_UNSUPPORTED("mrs   r0, spsr")
209         TEST_UNSUPPORTED("mrs   lr, spsr")
210
211         TEST_UNSUPPORTED("msr   cpsr, r0")
212         TEST_UNSUPPORTED("msr   cpsr_f, lr")
213         TEST_UNSUPPORTED("msr   spsr, r0")
214
215         TEST_BF_R("bx   r",0,2f,"")
216         TEST_BB_R("bx   r",7,2f,"")
217         TEST_BF_R("bxeq r",14,2f,"")
218
219         TEST_R("clz     r0, r",0, 0x0,"")
220         TEST_R("clzeq   r7, r",14,0x1,"")
221         TEST_R("clz     lr, r",7, 0xffffffff,"")
222         TEST(  "clz     r4, sp")
223         TEST_UNSUPPORTED(__inst_arm(0x016fff10) "       @ clz pc, r0")
224         TEST_UNSUPPORTED(__inst_arm(0x016f0f1f) "       @ clz r0, pc")
225
226 #if __LINUX_ARM_ARCH__ >= 6
227         TEST_UNSUPPORTED("bxj   r0")
228 #endif
229
230         TEST_BF_R("blx  r",0,2f,"")
231         TEST_BB_R("blx  r",7,2f,"")
232         TEST_BF_R("blxeq        r",14,2f,"")
233         TEST_UNSUPPORTED(__inst_arm(0x0120003f) "       @ blx pc")
234
235         TEST_RR(   "qadd        r0, r",1, VAL1,", r",2, VAL2,"")
236         TEST_RR(   "qaddvs      lr, r",9, VAL2,", r",8, VAL1,"")
237         TEST_R(    "qadd        lr, r",9, VAL2,", r13")
238         TEST_RR(   "qsub        r0, r",1, VAL1,", r",2, VAL2,"")
239         TEST_RR(   "qsubvs      lr, r",9, VAL2,", r",8, VAL1,"")
240         TEST_R(    "qsub        lr, r",9, VAL2,", r13")
241         TEST_RR(   "qdadd       r0, r",1, VAL1,", r",2, VAL2,"")
242         TEST_RR(   "qdaddvs     lr, r",9, VAL2,", r",8, VAL1,"")
243         TEST_R(    "qdadd       lr, r",9, VAL2,", r13")
244         TEST_RR(   "qdsub       r0, r",1, VAL1,", r",2, VAL2,"")
245         TEST_RR(   "qdsubvs     lr, r",9, VAL2,", r",8, VAL1,"")
246         TEST_R(    "qdsub       lr, r",9, VAL2,", r13")
247         TEST_UNSUPPORTED(__inst_arm(0xe101f050) "       @ qadd pc, r0, r1")
248         TEST_UNSUPPORTED(__inst_arm(0xe121f050) "       @ qsub pc, r0, r1")
249         TEST_UNSUPPORTED(__inst_arm(0xe141f050) "       @ qdadd pc, r0, r1")
250         TEST_UNSUPPORTED(__inst_arm(0xe161f050) "       @ qdsub pc, r0, r1")
251         TEST_UNSUPPORTED(__inst_arm(0xe16f2050) "       @ qdsub r2, r0, pc")
252         TEST_UNSUPPORTED(__inst_arm(0xe161205f) "       @ qdsub r2, pc, r1")
253
254         TEST_UNSUPPORTED("bkpt  0xffff")
255         TEST_UNSUPPORTED("bkpt  0x0000")
256
257         TEST_UNSUPPORTED(__inst_arm(0xe1600070) " @ smc #0")
258
259         TEST_GROUP("Halfword multiply and multiply-accumulate")
260
261         TEST_RRR(    "smlabb    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
262         TEST_RRR(    "smlabbge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
263         TEST_RR(     "smlabb    lr, r",1, VAL2,", r",2, VAL3,", r13")
264         TEST_UNSUPPORTED(__inst_arm(0xe10f3281) " @ smlabb pc, r1, r2, r3")
265         TEST_RRR(    "smlatb    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
266         TEST_RRR(    "smlatbge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
267         TEST_RR(     "smlatb    lr, r",1, VAL2,", r",2, VAL3,", r13")
268         TEST_UNSUPPORTED(__inst_arm(0xe10f32a1) " @ smlatb pc, r1, r2, r3")
269         TEST_RRR(    "smlabt    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
270         TEST_RRR(    "smlabtge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
271         TEST_RR(     "smlabt    lr, r",1, VAL2,", r",2, VAL3,", r13")
272         TEST_UNSUPPORTED(__inst_arm(0xe10f32c1) " @ smlabt pc, r1, r2, r3")
273         TEST_RRR(    "smlatt    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
274         TEST_RRR(    "smlattge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
275         TEST_RR(     "smlatt    lr, r",1, VAL2,", r",2, VAL3,", r13")
276         TEST_UNSUPPORTED(__inst_arm(0xe10f32e1) " @ smlatt pc, r1, r2, r3")
277
278         TEST_RRR(    "smlawb    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
279         TEST_RRR(    "smlawbge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
280         TEST_RR(     "smlawb    lr, r",1, VAL2,", r",2, VAL3,", r13")
281         TEST_UNSUPPORTED(__inst_arm(0xe12f3281) " @ smlawb pc, r1, r2, r3")
282         TEST_RRR(    "smlawt    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
283         TEST_RRR(    "smlawtge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
284         TEST_RR(     "smlawt    lr, r",1, VAL2,", r",2, VAL3,", r13")
285         TEST_UNSUPPORTED(__inst_arm(0xe12f32c1) " @ smlawt pc, r1, r2, r3")
286         TEST_UNSUPPORTED(__inst_arm(0xe12032cf) " @ smlawt r0, pc, r2, r3")
287         TEST_UNSUPPORTED(__inst_arm(0xe1203fc1) " @ smlawt r0, r1, pc, r3")
288         TEST_UNSUPPORTED(__inst_arm(0xe120f2c1) " @ smlawt r0, r1, r2, pc")
289
290         TEST_RR(    "smulwb     r0, r",1, VAL1,", r",2, VAL2,"")
291         TEST_RR(    "smulwbge   r7, r",8, VAL3,", r",9, VAL1,"")
292         TEST_R(     "smulwb     lr, r",1, VAL2,", r13")
293         TEST_UNSUPPORTED(__inst_arm(0xe12f02a1) " @ smulwb pc, r1, r2")
294         TEST_RR(    "smulwt     r0, r",1, VAL1,", r",2, VAL2,"")
295         TEST_RR(    "smulwtge   r7, r",8, VAL3,", r",9, VAL1,"")
296         TEST_R(     "smulwt     lr, r",1, VAL2,", r13")
297         TEST_UNSUPPORTED(__inst_arm(0xe12f02e1) " @ smulwt pc, r1, r2")
298
299         TEST_RRRR(  "smlalbb    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
300         TEST_RRRR(  "smlalbble  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
301         TEST_RRR(   "smlalbb    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
302         TEST_UNSUPPORTED(__inst_arm(0xe14f1382) " @ smlalbb pc, r1, r2, r3")
303         TEST_UNSUPPORTED(__inst_arm(0xe141f382) " @ smlalbb r1, pc, r2, r3")
304         TEST_RRRR(  "smlaltb    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
305         TEST_RRRR(  "smlaltble  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
306         TEST_RRR(   "smlaltb    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
307         TEST_UNSUPPORTED(__inst_arm(0xe14f13a2) " @ smlaltb pc, r1, r2, r3")
308         TEST_UNSUPPORTED(__inst_arm(0xe141f3a2) " @ smlaltb r1, pc, r2, r3")
309         TEST_RRRR(  "smlalbt    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
310         TEST_RRRR(  "smlalbtle  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
311         TEST_RRR(   "smlalbt    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
312         TEST_UNSUPPORTED(__inst_arm(0xe14f13c2) " @ smlalbt pc, r1, r2, r3")
313         TEST_UNSUPPORTED(__inst_arm(0xe141f3c2) " @ smlalbt r1, pc, r2, r3")
314         TEST_RRRR(  "smlaltt    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
315         TEST_RRRR(  "smlalttle  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
316         TEST_RRR(   "smlaltt    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
317         TEST_UNSUPPORTED(__inst_arm(0xe14f13e2) " @ smlalbb pc, r1, r2, r3")
318         TEST_UNSUPPORTED(__inst_arm(0xe140f3e2) " @ smlalbb r0, pc, r2, r3")
319         TEST_UNSUPPORTED(__inst_arm(0xe14013ef) " @ smlalbb r0, r1, pc, r3")
320         TEST_UNSUPPORTED(__inst_arm(0xe1401fe2) " @ smlalbb r0, r1, r2, pc")
321
322         TEST_RR(    "smulbb     r0, r",1, VAL1,", r",2, VAL2,"")
323         TEST_RR(    "smulbbge   r7, r",8, VAL3,", r",9, VAL1,"")
324         TEST_R(     "smulbb     lr, r",1, VAL2,", r13")
325         TEST_UNSUPPORTED(__inst_arm(0xe16f0281) " @ smulbb pc, r1, r2")
326         TEST_RR(    "smultb     r0, r",1, VAL1,", r",2, VAL2,"")
327         TEST_RR(    "smultbge   r7, r",8, VAL3,", r",9, VAL1,"")
328         TEST_R(     "smultb     lr, r",1, VAL2,", r13")
329         TEST_UNSUPPORTED(__inst_arm(0xe16f02a1) " @ smultb pc, r1, r2")
330         TEST_RR(    "smulbt     r0, r",1, VAL1,", r",2, VAL2,"")
331         TEST_RR(    "smulbtge   r7, r",8, VAL3,", r",9, VAL1,"")
332         TEST_R(     "smulbt     lr, r",1, VAL2,", r13")
333         TEST_UNSUPPORTED(__inst_arm(0xe16f02c1) " @ smultb pc, r1, r2")
334         TEST_RR(    "smultt     r0, r",1, VAL1,", r",2, VAL2,"")
335         TEST_RR(    "smulttge   r7, r",8, VAL3,", r",9, VAL1,"")
336         TEST_R(     "smultt     lr, r",1, VAL2,", r13")
337         TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2")
338         TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2")
339         TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc")
340
341         TEST_GROUP("Multiply and multiply-accumulate")
342
343         TEST_RR(    "mul        r0, r",1, VAL1,", r",2, VAL2,"")
344         TEST_RR(    "mulls      r7, r",8, VAL2,", r",9, VAL2,"")
345         TEST_R(     "mul        lr, r",4, VAL3,", r13")
346         TEST_UNSUPPORTED(__inst_arm(0xe00f0291) " @ mul pc, r1, r2")
347         TEST_UNSUPPORTED(__inst_arm(0xe000029f) " @ mul r0, pc, r2")
348         TEST_UNSUPPORTED(__inst_arm(0xe0000f91) " @ mul r0, r1, pc")
349         TEST_RR(    "muls       r0, r",1, VAL1,", r",2, VAL2,"")
350         TEST_RR(    "mullss     r7, r",8, VAL2,", r",9, VAL2,"")
351         TEST_R(     "muls       lr, r",4, VAL3,", r13")
352         TEST_UNSUPPORTED(__inst_arm(0xe01f0291) " @ muls pc, r1, r2")
353
354         TEST_RRR(    "mla       r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
355         TEST_RRR(    "mlahi     r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
356         TEST_RR(     "mla       lr, r",1, VAL2,", r",2, VAL3,", r13")
357         TEST_UNSUPPORTED(__inst_arm(0xe02f3291) " @ mla pc, r1, r2, r3")
358         TEST_RRR(    "mlas      r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
359         TEST_RRR(    "mlahis    r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
360         TEST_RR(     "mlas      lr, r",1, VAL2,", r",2, VAL3,", r13")
361         TEST_UNSUPPORTED(__inst_arm(0xe03f3291) " @ mlas pc, r1, r2, r3")
362
363 #if __LINUX_ARM_ARCH__ >= 6
364         TEST_RR(  "umaal        r0, r1, r",2, VAL1,", r",3, VAL2,"")
365         TEST_RR(  "umaalls      r7, r8, r",9, VAL2,", r",10, VAL1,"")
366         TEST_R(   "umaal        lr, r12, r",11,VAL3,", r13")
367         TEST_UNSUPPORTED(__inst_arm(0xe041f392) " @ umaal pc, r1, r2, r3")
368         TEST_UNSUPPORTED(__inst_arm(0xe04f0392) " @ umaal r0, pc, r2, r3")
369         TEST_UNSUPPORTED(__inst_arm(0xe0500090) " @ undef")
370         TEST_UNSUPPORTED(__inst_arm(0xe05fff9f) " @ undef")
371 #endif
372
373 #if __LINUX_ARM_ARCH__ >= 7
374         TEST_RRR(  "mls         r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
375         TEST_RRR(  "mlshi       r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
376         TEST_RR(   "mls         lr, r",1, VAL2,", r",2, VAL3,", r13")
377         TEST_UNSUPPORTED(__inst_arm(0xe06f3291) " @ mls pc, r1, r2, r3")
378         TEST_UNSUPPORTED(__inst_arm(0xe060329f) " @ mls r0, pc, r2, r3")
379         TEST_UNSUPPORTED(__inst_arm(0xe0603f91) " @ mls r0, r1, pc, r3")
380         TEST_UNSUPPORTED(__inst_arm(0xe060f291) " @ mls r0, r1, r2, pc")
381 #endif
382
383         TEST_UNSUPPORTED(__inst_arm(0xe0700090) " @ undef")
384         TEST_UNSUPPORTED(__inst_arm(0xe07fff9f) " @ undef")
385
386         TEST_RR(  "umull        r0, r1, r",2, VAL1,", r",3, VAL2,"")
387         TEST_RR(  "umullls      r7, r8, r",9, VAL2,", r",10, VAL1,"")
388         TEST_R(   "umull        lr, r12, r",11,VAL3,", r13")
389         TEST_UNSUPPORTED(__inst_arm(0xe081f392) " @ umull pc, r1, r2, r3")
390         TEST_UNSUPPORTED(__inst_arm(0xe08f1392) " @ umull r1, pc, r2, r3")
391         TEST_RR(  "umulls       r0, r1, r",2, VAL1,", r",3, VAL2,"")
392         TEST_RR(  "umulllss     r7, r8, r",9, VAL2,", r",10, VAL1,"")
393         TEST_R(   "umulls       lr, r12, r",11,VAL3,", r13")
394         TEST_UNSUPPORTED(__inst_arm(0xe091f392) " @ umulls pc, r1, r2, r3")
395         TEST_UNSUPPORTED(__inst_arm(0xe09f1392) " @ umulls r1, pc, r2, r3")
396
397         TEST_RRRR(  "umlal      r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
398         TEST_RRRR(  "umlalle    r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
399         TEST_RRR(   "umlal      r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
400         TEST_UNSUPPORTED(__inst_arm(0xe0af1392) " @ umlal pc, r1, r2, r3")
401         TEST_UNSUPPORTED(__inst_arm(0xe0a1f392) " @ umlal r1, pc, r2, r3")
402         TEST_RRRR(  "umlals     r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
403         TEST_RRRR(  "umlalles   r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
404         TEST_RRR(   "umlals     r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
405         TEST_UNSUPPORTED(__inst_arm(0xe0bf1392) " @ umlals pc, r1, r2, r3")
406         TEST_UNSUPPORTED(__inst_arm(0xe0b1f392) " @ umlals r1, pc, r2, r3")
407
408         TEST_RR(  "smull        r0, r1, r",2, VAL1,", r",3, VAL2,"")
409         TEST_RR(  "smullls      r7, r8, r",9, VAL2,", r",10, VAL1,"")
410         TEST_R(   "smull        lr, r12, r",11,VAL3,", r13")
411         TEST_UNSUPPORTED(__inst_arm(0xe0c1f392) " @ smull pc, r1, r2, r3")
412         TEST_UNSUPPORTED(__inst_arm(0xe0cf1392) " @ smull r1, pc, r2, r3")
413         TEST_RR(  "smulls       r0, r1, r",2, VAL1,", r",3, VAL2,"")
414         TEST_RR(  "smulllss     r7, r8, r",9, VAL2,", r",10, VAL1,"")
415         TEST_R(   "smulls       lr, r12, r",11,VAL3,", r13")
416         TEST_UNSUPPORTED(__inst_arm(0xe0d1f392) " @ smulls pc, r1, r2, r3")
417         TEST_UNSUPPORTED(__inst_arm(0xe0df1392) " @ smulls r1, pc, r2, r3")
418
419         TEST_RRRR(  "smlal      r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
420         TEST_RRRR(  "smlalle    r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
421         TEST_RRR(   "smlal      r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
422         TEST_UNSUPPORTED(__inst_arm(0xe0ef1392) " @ smlal pc, r1, r2, r3")
423         TEST_UNSUPPORTED(__inst_arm(0xe0e1f392) " @ smlal r1, pc, r2, r3")
424         TEST_RRRR(  "smlals     r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
425         TEST_RRRR(  "smlalles   r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
426         TEST_RRR(   "smlals     r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
427         TEST_UNSUPPORTED(__inst_arm(0xe0ff1392) " @ smlals pc, r1, r2, r3")
428         TEST_UNSUPPORTED(__inst_arm(0xe0f0f392) " @ smlals r0, pc, r2, r3")
429         TEST_UNSUPPORTED(__inst_arm(0xe0f0139f) " @ smlals r0, r1, pc, r3")
430         TEST_UNSUPPORTED(__inst_arm(0xe0f01f92) " @ smlals r0, r1, r2, pc")
431
432         TEST_GROUP("Synchronization primitives")
433
434 #if __LINUX_ARM_ARCH__ < 6
435         TEST_RP("swp    lr, r",7,VAL2,", [r",8,0,"]")
436         TEST_R( "swpvs  r0, r",1,VAL1,", [sp]")
437         TEST_RP("swp    sp, r",14,VAL2,", [r",12,13*4,"]")
438 #else
439         TEST_UNSUPPORTED(__inst_arm(0xe108e097) " @ swp lr, r7, [r8]")
440         TEST_UNSUPPORTED(__inst_arm(0x610d0091) " @ swpvs       r0, r1, [sp]")
441         TEST_UNSUPPORTED(__inst_arm(0xe10cd09e) " @ swp sp, r14 [r12]")
442 #endif
443         TEST_UNSUPPORTED(__inst_arm(0xe102f091) " @ swp pc, r1, [r2]")
444         TEST_UNSUPPORTED(__inst_arm(0xe102009f) " @ swp r0, pc, [r2]")
445         TEST_UNSUPPORTED(__inst_arm(0xe10f0091) " @ swp r0, r1, [pc]")
446 #if __LINUX_ARM_ARCH__ < 6
447         TEST_RP("swpb   lr, r",7,VAL2,", [r",8,0,"]")
448         TEST_R( "swpvsb r0, r",1,VAL1,", [sp]")
449 #else
450         TEST_UNSUPPORTED(__inst_arm(0xe148e097) " @ swpb        lr, r7, [r8]")
451         TEST_UNSUPPORTED(__inst_arm(0x614d0091) " @ swpvsb      r0, r1, [sp]")
452 #endif
453         TEST_UNSUPPORTED(__inst_arm(0xe142f091) " @ swpb pc, r1, [r2]")
454
455         TEST_UNSUPPORTED(__inst_arm(0xe1100090)) /* Unallocated space */
456         TEST_UNSUPPORTED(__inst_arm(0xe1200090)) /* Unallocated space */
457         TEST_UNSUPPORTED(__inst_arm(0xe1300090)) /* Unallocated space */
458         TEST_UNSUPPORTED(__inst_arm(0xe1500090)) /* Unallocated space */
459         TEST_UNSUPPORTED(__inst_arm(0xe1600090)) /* Unallocated space */
460         TEST_UNSUPPORTED(__inst_arm(0xe1700090)) /* Unallocated space */
461 #if __LINUX_ARM_ARCH__ >= 6
462         TEST_UNSUPPORTED("ldrex r2, [sp]")
463 #endif
464 #if (__LINUX_ARM_ARCH__ >= 7) || defined(CONFIG_CPU_32v6K)
465         TEST_UNSUPPORTED("strexd        r0, r2, r3, [sp]")
466         TEST_UNSUPPORTED("ldrexd        r2, r3, [sp]")
467         TEST_UNSUPPORTED("strexb        r0, r2, [sp]")
468         TEST_UNSUPPORTED("ldrexb        r2, [sp]")
469         TEST_UNSUPPORTED("strexh        r0, r2, [sp]")
470         TEST_UNSUPPORTED("ldrexh        r2, [sp]")
471 #endif
472         TEST_GROUP("Extra load/store instructions")
473
474         TEST_RPR(  "strh        r",0, VAL1,", [r",1, 48,", -r",2, 24,"]")
475         TEST_RPR(  "streqh      r",14,VAL2,", [r",13,0, ", r",12, 48,"]")
476         TEST_RPR(  "strh        r",1, VAL1,", [r",2, 24,", r",3,  48,"]!")
477         TEST_RPR(  "strneh      r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
478         TEST_RPR(  "strh        r",2, VAL1,", [r",3, 24,"], r",4, 48,"")
479         TEST_RPR(  "strh        r",10,VAL2,", [r",9, 48,"], -r",11,24,"")
480         TEST_UNSUPPORTED(__inst_arm(0xe1afc0ba) "       @ strh r12, [pc, r10]!")
481         TEST_UNSUPPORTED(__inst_arm(0xe089f0bb) "       @ strh pc, [r9], r11")
482         TEST_UNSUPPORTED(__inst_arm(0xe089a0bf) "       @ strh r10, [r9], pc")
483
484         TEST_PR(   "ldrh        r0, [r",0,  48,", -r",2, 24,"]")
485         TEST_PR(   "ldrcsh      r14, [r",13,0, ", r",12, 48,"]")
486         TEST_PR(   "ldrh        r1, [r",2,  24,", r",3,  48,"]!")
487         TEST_PR(   "ldrcch      r12, [r",11,48,", -r",10,24,"]!")
488         TEST_PR(   "ldrh        r2, [r",3,  24,"], r",4, 48,"")
489         TEST_PR(   "ldrh        r10, [r",9, 48,"], -r",11,24,"")
490         TEST_UNSUPPORTED(__inst_arm(0xe1bfc0ba) "       @ ldrh r12, [pc, r10]!")
491         TEST_UNSUPPORTED(__inst_arm(0xe099f0bb) "       @ ldrh pc, [r9], r11")
492         TEST_UNSUPPORTED(__inst_arm(0xe099a0bf) "       @ ldrh r10, [r9], pc")
493
494         TEST_RP(   "strh        r",0, VAL1,", [r",1, 24,", #-2]")
495         TEST_RP(   "strmih      r",14,VAL2,", [r",13,0, ", #2]")
496         TEST_RP(   "strh        r",1, VAL1,", [r",2, 24,", #4]!")
497         TEST_RP(   "strplh      r",12,VAL2,", [r",11,24,", #-4]!")
498         TEST_RP(   "strh        r",2, VAL1,", [r",3, 24,"], #48")
499         TEST_RP(   "strh        r",10,VAL2,", [r",9, 64,"], #-48")
500         TEST_UNSUPPORTED(__inst_arm(0xe1efc3b0) "       @ strh r12, [pc, #48]!")
501         TEST_UNSUPPORTED(__inst_arm(0xe0c9f3b0) "       @ strh pc, [r9], #48")
502
503         TEST_P(    "ldrh        r0, [r",0,  24,", #-2]")
504         TEST_P(    "ldrvsh      r14, [r",13,0, ", #2]")
505         TEST_P(    "ldrh        r1, [r",2,  24,", #4]!")
506         TEST_P(    "ldrvch      r12, [r",11,24,", #-4]!")
507         TEST_P(    "ldrh        r2, [r",3,  24,"], #48")
508         TEST_P(    "ldrh        r10, [r",9, 64,"], #-48")
509         TEST(      "ldrh        r0, [pc, #0]")
510         TEST_UNSUPPORTED(__inst_arm(0xe1ffc3b0) "       @ ldrh r12, [pc, #48]!")
511         TEST_UNSUPPORTED(__inst_arm(0xe0d9f3b0) "       @ ldrh pc, [r9], #48")
512
513         TEST_PR(   "ldrsb       r0, [r",0,  48,", -r",2, 24,"]")
514         TEST_PR(   "ldrhisb     r14, [r",13,0,", r",12,  48,"]")
515         TEST_PR(   "ldrsb       r1, [r",2,  24,", r",3,  48,"]!")
516         TEST_PR(   "ldrlssb     r12, [r",11,48,", -r",10,24,"]!")
517         TEST_PR(   "ldrsb       r2, [r",3,  24,"], r",4, 48,"")
518         TEST_PR(   "ldrsb       r10, [r",9, 48,"], -r",11,24,"")
519         TEST_UNSUPPORTED(__inst_arm(0xe1bfc0da) "       @ ldrsb r12, [pc, r10]!")
520         TEST_UNSUPPORTED(__inst_arm(0xe099f0db) "       @ ldrsb pc, [r9], r11")
521
522         TEST_P(    "ldrsb       r0, [r",0,  24,", #-1]")
523         TEST_P(    "ldrgesb     r14, [r",13,0, ", #1]")
524         TEST_P(    "ldrsb       r1, [r",2,  24,", #4]!")
525         TEST_P(    "ldrltsb     r12, [r",11,24,", #-4]!")
526         TEST_P(    "ldrsb       r2, [r",3,  24,"], #48")
527         TEST_P(    "ldrsb       r10, [r",9, 64,"], #-48")
528         TEST(      "ldrsb       r0, [pc, #0]")
529         TEST_UNSUPPORTED(__inst_arm(0xe1ffc3d0) "       @ ldrsb r12, [pc, #48]!")
530         TEST_UNSUPPORTED(__inst_arm(0xe0d9f3d0) "       @ ldrsb pc, [r9], #48")
531
532         TEST_PR(   "ldrsh       r0, [r",0,  48,", -r",2, 24,"]")
533         TEST_PR(   "ldrgtsh     r14, [r",13,0, ", r",12, 48,"]")
534         TEST_PR(   "ldrsh       r1, [r",2,  24,", r",3,  48,"]!")
535         TEST_PR(   "ldrlesh     r12, [r",11,48,", -r",10,24,"]!")
536         TEST_PR(   "ldrsh       r2, [r",3,  24,"], r",4, 48,"")
537         TEST_PR(   "ldrsh       r10, [r",9, 48,"], -r",11,24,"")
538         TEST_UNSUPPORTED(__inst_arm(0xe1bfc0fa) "       @ ldrsh r12, [pc, r10]!")
539         TEST_UNSUPPORTED(__inst_arm(0xe099f0fb) "       @ ldrsh pc, [r9], r11")
540
541         TEST_P(    "ldrsh       r0, [r",0,  24,", #-1]")
542         TEST_P(    "ldreqsh     r14, [r",13,0 ,", #1]")
543         TEST_P(    "ldrsh       r1, [r",2,  24,", #4]!")
544         TEST_P(    "ldrnesh     r12, [r",11,24,", #-4]!")
545         TEST_P(    "ldrsh       r2, [r",3,  24,"], #48")
546         TEST_P(    "ldrsh       r10, [r",9, 64,"], #-48")
547         TEST(      "ldrsh       r0, [pc, #0]")
548         TEST_UNSUPPORTED(__inst_arm(0xe1ffc3f0) "       @ ldrsh r12, [pc, #48]!")
549         TEST_UNSUPPORTED(__inst_arm(0xe0d9f3f0) "       @ ldrsh pc, [r9], #48")
550
551 #if __LINUX_ARM_ARCH__ >= 7
552         TEST_UNSUPPORTED("strht r1, [r2], r3")
553         TEST_UNSUPPORTED("ldrht r1, [r2], r3")
554         TEST_UNSUPPORTED("strht r1, [r2], #48")
555         TEST_UNSUPPORTED("ldrht r1, [r2], #48")
556         TEST_UNSUPPORTED("ldrsbt        r1, [r2], r3")
557         TEST_UNSUPPORTED("ldrsbt        r1, [r2], #48")
558         TEST_UNSUPPORTED("ldrsht        r1, [r2], r3")
559         TEST_UNSUPPORTED("ldrsht        r1, [r2], #48")
560 #endif
561
562         TEST_RPR(  "strd        r",0, VAL1,", [r",1, 48,", -r",2,24,"]")
563         TEST_RPR(  "strccd      r",8, VAL2,", [r",13,0, ", r",12,48,"]")
564         TEST_RPR(  "strd        r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
565         TEST_RPR(  "strcsd      r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
566         TEST_RPR(  "strd        r",2, VAL1,", [r",5, 24,"], r",4,48,"")
567         TEST_RPR(  "strd        r",10,VAL2,", [r",9, 48,"], -r",7,24,"")
568         TEST_UNSUPPORTED(__inst_arm(0xe1afc0fa) "       @ strd r12, [pc, r10]!")
569
570         TEST_PR(   "ldrd        r0, [r",0, 48,", -r",2,24,"]")
571         TEST_PR(   "ldrmid      r8, [r",13,0, ", r",12,48,"]")
572         TEST_PR(   "ldrd        r4, [r",2, 24,", r",3, 48,"]!")
573         TEST_PR(   "ldrpld      r6, [r",11,48,", -r",10,24,"]!")
574         TEST_PR(   "ldrd        r2, [r",5, 24,"], r",4,48,"")
575         TEST_PR(   "ldrd        r10, [r",9,48,"], -r",7,24,"")
576         TEST_UNSUPPORTED(__inst_arm(0xe1afc0da) "       @ ldrd r12, [pc, r10]!")
577         TEST_UNSUPPORTED(__inst_arm(0xe089f0db) "       @ ldrd pc, [r9], r11")
578         TEST_UNSUPPORTED(__inst_arm(0xe089e0db) "       @ ldrd lr, [r9], r11")
579         TEST_UNSUPPORTED(__inst_arm(0xe089c0df) "       @ ldrd r12, [r9], pc")
580
581         TEST_RP(   "strd        r",0, VAL1,", [r",1, 24,", #-8]")
582         TEST_RP(   "strvsd      r",8, VAL2,", [r",13,0, ", #8]")
583         TEST_RP(   "strd        r",4, VAL1,", [r",2, 24,", #16]!")
584         TEST_RP(   "strvcd      r",12,VAL2,", [r",11,24,", #-16]!")
585         TEST_RP(   "strd        r",2, VAL1,", [r",4, 24,"], #48")
586         TEST_RP(   "strd        r",10,VAL2,", [r",9, 64,"], #-48")
587         TEST_UNSUPPORTED(__inst_arm(0xe1efc3f0) "       @ strd r12, [pc, #48]!")
588
589         TEST_P(    "ldrd        r0, [r",0, 24,", #-8]")
590         TEST_P(    "ldrhid      r8, [r",13,0, ", #8]")
591         TEST_P(    "ldrd        r4, [r",2, 24,", #16]!")
592         TEST_P(    "ldrlsd      r6, [r",11,24,", #-16]!")
593         TEST_P(    "ldrd        r2, [r",5, 24,"], #48")
594         TEST_P(    "ldrd        r10, [r",9,6,"], #-48")
595         TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) "       @ ldrd r12, [pc, #48]!")
596         TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) "       @ ldrd pc, [r9], #48")
597         TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) "       @ ldrd lr, [r9], #48")
598
599         TEST_GROUP("Miscellaneous")
600
601 #if __LINUX_ARM_ARCH__ >= 7
602         TEST("movw      r0, #0")
603         TEST("movw      r0, #0xffff")
604         TEST("movw      lr, #0xffff")
605         TEST_UNSUPPORTED(__inst_arm(0xe300f000) "       @ movw pc, #0")
606         TEST_R("movt    r",0, VAL1,", #0")
607         TEST_R("movt    r",0, VAL2,", #0xffff")
608         TEST_R("movt    r",14,VAL1,", #0xffff")
609         TEST_UNSUPPORTED(__inst_arm(0xe340f000) "       @ movt pc, #0")
610 #endif
611
612         TEST_UNSUPPORTED("msr   cpsr, 0x13")
613         TEST_UNSUPPORTED("msr   cpsr_f, 0xf0000000")
614         TEST_UNSUPPORTED("msr   spsr, 0x13")
615
616 #if __LINUX_ARM_ARCH__ >= 7
617         TEST_SUPPORTED("yield")
618         TEST("sev")
619         TEST("nop")
620         TEST("wfi")
621         TEST_SUPPORTED("wfe")
622         TEST_UNSUPPORTED("dbg #0")
623 #endif
624
625         TEST_GROUP("Load/store word and unsigned byte")
626
627 #define LOAD_STORE(byte)                                                        \
628         TEST_RP( "str"byte"     r",0, VAL1,", [r",1, 24,", #-2]")               \
629         TEST_RP( "str"byte"     r",14,VAL2,", [r",13,0, ", #2]")                \
630         TEST_RP( "str"byte"     r",1, VAL1,", [r",2, 24,", #4]!")               \
631         TEST_RP( "str"byte"     r",12,VAL2,", [r",11,24,", #-4]!")              \
632         TEST_RP( "str"byte"     r",2, VAL1,", [r",3, 24,"], #48")               \
633         TEST_RP( "str"byte"     r",10,VAL2,", [r",9, 64,"], #-48")              \
634         TEST_RPR("str"byte"     r",0, VAL1,", [r",1, 48,", -r",2, 24,"]")       \
635         TEST_RPR("str"byte"     r",14,VAL2,", [r",13,0, ", r",12, 48,"]")       \
636         TEST_RPR("str"byte"     r",1, VAL1,", [r",2, 24,", r",3,  48,"]!")      \
637         TEST_RPR("str"byte"     r",12,VAL2,", [r",11,48,", -r",10,24,"]!")      \
638         TEST_RPR("str"byte"     r",2, VAL1,", [r",3, 24,"], r",4, 48,"")        \
639         TEST_RPR("str"byte"     r",10,VAL2,", [r",9, 48,"], -r",11,24,"")       \
640         TEST_RPR("str"byte"     r",0, VAL1,", [r",1, 24,", r",2,  32,", asl #1]")\
641         TEST_RPR("str"byte"     r",14,VAL2,", [r",13,0, ", r",12, 32,", lsr #2]")\
642         TEST_RPR("str"byte"     r",1, VAL1,", [r",2, 24,", r",3,  32,", asr #3]!")\
643         TEST_RPR("str"byte"     r",12,VAL2,", [r",11,24,", r",10, 4,", ror #31]!")\
644         TEST_P(  "ldr"byte"     r0, [r",0,  24,", #-2]")                        \
645         TEST_P(  "ldr"byte"     r14, [r",13,0, ", #2]")                         \
646         TEST_P(  "ldr"byte"     r1, [r",2,  24,", #4]!")                        \
647         TEST_P(  "ldr"byte"     r12, [r",11,24,", #-4]!")                       \
648         TEST_P(  "ldr"byte"     r2, [r",3,  24,"], #48")                        \
649         TEST_P(  "ldr"byte"     r10, [r",9, 64,"], #-48")                       \
650         TEST_PR( "ldr"byte"     r0, [r",0,  48,", -r",2, 24,"]")                \
651         TEST_PR( "ldr"byte"     r14, [r",13,0, ", r",12, 48,"]")                \
652         TEST_PR( "ldr"byte"     r1, [r",2,  24,", r",3, 48,"]!")                \
653         TEST_PR( "ldr"byte"     r12, [r",11,48,", -r",10,24,"]!")               \
654         TEST_PR( "ldr"byte"     r2, [r",3,  24,"], r",4, 48,"")                 \
655         TEST_PR( "ldr"byte"     r10, [r",9, 48,"], -r",11,24,"")                \
656         TEST_PR( "ldr"byte"     r0, [r",0,  24,", r",2,  32,", asl #1]")        \
657         TEST_PR( "ldr"byte"     r14, [r",13,0, ", r",12, 32,", lsr #2]")        \
658         TEST_PR( "ldr"byte"     r1, [r",2,  24,", r",3,  32,", asr #3]!")       \
659         TEST_PR( "ldr"byte"     r12, [r",11,24,", r",10, 4,", ror #31]!")       \
660         TEST(    "ldr"byte"     r0, [pc, #0]")                                  \
661         TEST_R(  "ldr"byte"     r12, [pc, r",14,0,"]")
662
663         LOAD_STORE("")
664         TEST_P(   "str  pc, [r",0,0,", #15*4]")
665         TEST_R(   "str  pc, [sp, r",2,15*4,"]")
666         TEST_BF(  "ldr  pc, [sp, #15*4]")
667         TEST_BF_R("ldr  pc, [sp, r",2,15*4,"]")
668
669         TEST_P(   "str  sp, [r",0,0,", #13*4]")
670         TEST_R(   "str  sp, [sp, r",2,13*4,"]")
671         TEST_BF(  "ldr  sp, [sp, #13*4]")
672         TEST_BF_R("ldr  sp, [sp, r",2,13*4,"]")
673
674 #ifdef CONFIG_THUMB2_KERNEL
675         TEST_ARM_TO_THUMB_INTERWORK_P("ldr      pc, [r",0,0,", #15*4]")
676 #endif
677         TEST_UNSUPPORTED(__inst_arm(0xe5af6008) "       @ str r6, [pc, #8]!")
678         TEST_UNSUPPORTED(__inst_arm(0xe7af6008) "       @ str r6, [pc, r8]!")
679         TEST_UNSUPPORTED(__inst_arm(0xe5bf6008) "       @ ldr r6, [pc, #8]!")
680         TEST_UNSUPPORTED(__inst_arm(0xe7bf6008) "       @ ldr r6, [pc, r8]!")
681         TEST_UNSUPPORTED(__inst_arm(0xe788600f) "       @ str r6, [r8, pc]")
682         TEST_UNSUPPORTED(__inst_arm(0xe798600f) "       @ ldr r6, [r8, pc]")
683
684         LOAD_STORE("b")
685         TEST_UNSUPPORTED(__inst_arm(0xe5f7f008) "       @ ldrb pc, [r7, #8]!")
686         TEST_UNSUPPORTED(__inst_arm(0xe7f7f008) "       @ ldrb pc, [r7, r8]!")
687         TEST_UNSUPPORTED(__inst_arm(0xe5ef6008) "       @ strb r6, [pc, #8]!")
688         TEST_UNSUPPORTED(__inst_arm(0xe7ef6008) "       @ strb r6, [pc, r3]!")
689         TEST_UNSUPPORTED(__inst_arm(0xe5ff6008) "       @ ldrb r6, [pc, #8]!")
690         TEST_UNSUPPORTED(__inst_arm(0xe7ff6008) "       @ ldrb r6, [pc, r3]!")
691
692         TEST_UNSUPPORTED("ldrt  r0, [r1], #4")
693         TEST_UNSUPPORTED("ldrt  r1, [r2], r3")
694         TEST_UNSUPPORTED("strt  r2, [r3], #4")
695         TEST_UNSUPPORTED("strt  r3, [r4], r5")
696         TEST_UNSUPPORTED("ldrbt r4, [r5], #4")
697         TEST_UNSUPPORTED("ldrbt r5, [r6], r7")
698         TEST_UNSUPPORTED("strbt r6, [r7], #4")
699         TEST_UNSUPPORTED("strbt r7, [r8], r9")
700
701 #if __LINUX_ARM_ARCH__ >= 7
702         TEST_GROUP("Parallel addition and subtraction, signed")
703
704         TEST_UNSUPPORTED(__inst_arm(0xe6000010) "") /* Unallocated space */
705         TEST_UNSUPPORTED(__inst_arm(0xe60fffff) "") /* Unallocated space */
706
707         TEST_RR(    "sadd16     r0, r",0,  HH1,", r",1, HH2,"")
708         TEST_RR(    "sadd16     r14, r",12,HH2,", r",10,HH1,"")
709         TEST_UNSUPPORTED(__inst_arm(0xe61cff1a) "       @ sadd16        pc, r12, r10")
710         TEST_RR(    "sasx       r0, r",0,  HH1,", r",1, HH2,"")
711         TEST_RR(    "sasx       r14, r",12,HH2,", r",10,HH1,"")
712         TEST_UNSUPPORTED(__inst_arm(0xe61cff3a) "       @ sasx  pc, r12, r10")
713         TEST_RR(    "ssax       r0, r",0,  HH1,", r",1, HH2,"")
714         TEST_RR(    "ssax       r14, r",12,HH2,", r",10,HH1,"")
715         TEST_UNSUPPORTED(__inst_arm(0xe61cff5a) "       @ ssax  pc, r12, r10")
716         TEST_RR(    "ssub16     r0, r",0,  HH1,", r",1, HH2,"")
717         TEST_RR(    "ssub16     r14, r",12,HH2,", r",10,HH1,"")
718         TEST_UNSUPPORTED(__inst_arm(0xe61cff7a) "       @ ssub16        pc, r12, r10")
719         TEST_RR(    "sadd8      r0, r",0,  HH1,", r",1, HH2,"")
720         TEST_RR(    "sadd8      r14, r",12,HH2,", r",10,HH1,"")
721         TEST_UNSUPPORTED(__inst_arm(0xe61cff9a) "       @ sadd8 pc, r12, r10")
722         TEST_UNSUPPORTED(__inst_arm(0xe61000b0) "") /* Unallocated space */
723         TEST_UNSUPPORTED(__inst_arm(0xe61fffbf) "") /* Unallocated space */
724         TEST_UNSUPPORTED(__inst_arm(0xe61000d0) "") /* Unallocated space */
725         TEST_UNSUPPORTED(__inst_arm(0xe61fffdf) "") /* Unallocated space */
726         TEST_RR(    "ssub8      r0, r",0,  HH1,", r",1, HH2,"")
727         TEST_RR(    "ssub8      r14, r",12,HH2,", r",10,HH1,"")
728         TEST_UNSUPPORTED(__inst_arm(0xe61cfffa) "       @ ssub8 pc, r12, r10")
729
730         TEST_RR(    "qadd16     r0, r",0,  HH1,", r",1, HH2,"")
731         TEST_RR(    "qadd16     r14, r",12,HH2,", r",10,HH1,"")
732         TEST_UNSUPPORTED(__inst_arm(0xe62cff1a) "       @ qadd16        pc, r12, r10")
733         TEST_RR(    "qasx       r0, r",0,  HH1,", r",1, HH2,"")
734         TEST_RR(    "qasx       r14, r",12,HH2,", r",10,HH1,"")
735         TEST_UNSUPPORTED(__inst_arm(0xe62cff3a) "       @ qasx  pc, r12, r10")
736         TEST_RR(    "qsax       r0, r",0,  HH1,", r",1, HH2,"")
737         TEST_RR(    "qsax       r14, r",12,HH2,", r",10,HH1,"")
738         TEST_UNSUPPORTED(__inst_arm(0xe62cff5a) "       @ qsax  pc, r12, r10")
739         TEST_RR(    "qsub16     r0, r",0,  HH1,", r",1, HH2,"")
740         TEST_RR(    "qsub16     r14, r",12,HH2,", r",10,HH1,"")
741         TEST_UNSUPPORTED(__inst_arm(0xe62cff7a) "       @ qsub16        pc, r12, r10")
742         TEST_RR(    "qadd8      r0, r",0,  HH1,", r",1, HH2,"")
743         TEST_RR(    "qadd8      r14, r",12,HH2,", r",10,HH1,"")
744         TEST_UNSUPPORTED(__inst_arm(0xe62cff9a) "       @ qadd8 pc, r12, r10")
745         TEST_UNSUPPORTED(__inst_arm(0xe62000b0) "") /* Unallocated space */
746         TEST_UNSUPPORTED(__inst_arm(0xe62fffbf) "") /* Unallocated space */
747         TEST_UNSUPPORTED(__inst_arm(0xe62000d0) "") /* Unallocated space */
748         TEST_UNSUPPORTED(__inst_arm(0xe62fffdf) "") /* Unallocated space */
749         TEST_RR(    "qsub8      r0, r",0,  HH1,", r",1, HH2,"")
750         TEST_RR(    "qsub8      r14, r",12,HH2,", r",10,HH1,"")
751         TEST_UNSUPPORTED(__inst_arm(0xe62cfffa) "       @ qsub8 pc, r12, r10")
752
753         TEST_RR(    "shadd16    r0, r",0,  HH1,", r",1, HH2,"")
754         TEST_RR(    "shadd16    r14, r",12,HH2,", r",10,HH1,"")
755         TEST_UNSUPPORTED(__inst_arm(0xe63cff1a) "       @ shadd16       pc, r12, r10")
756         TEST_RR(    "shasx      r0, r",0,  HH1,", r",1, HH2,"")
757         TEST_RR(    "shasx      r14, r",12,HH2,", r",10,HH1,"")
758         TEST_UNSUPPORTED(__inst_arm(0xe63cff3a) "       @ shasx pc, r12, r10")
759         TEST_RR(    "shsax      r0, r",0,  HH1,", r",1, HH2,"")
760         TEST_RR(    "shsax      r14, r",12,HH2,", r",10,HH1,"")
761         TEST_UNSUPPORTED(__inst_arm(0xe63cff5a) "       @ shsax pc, r12, r10")
762         TEST_RR(    "shsub16    r0, r",0,  HH1,", r",1, HH2,"")
763         TEST_RR(    "shsub16    r14, r",12,HH2,", r",10,HH1,"")
764         TEST_UNSUPPORTED(__inst_arm(0xe63cff7a) "       @ shsub16       pc, r12, r10")
765         TEST_RR(    "shadd8     r0, r",0,  HH1,", r",1, HH2,"")
766         TEST_RR(    "shadd8     r14, r",12,HH2,", r",10,HH1,"")
767         TEST_UNSUPPORTED(__inst_arm(0xe63cff9a) "       @ shadd8        pc, r12, r10")
768         TEST_UNSUPPORTED(__inst_arm(0xe63000b0) "") /* Unallocated space */
769         TEST_UNSUPPORTED(__inst_arm(0xe63fffbf) "") /* Unallocated space */
770         TEST_UNSUPPORTED(__inst_arm(0xe63000d0) "") /* Unallocated space */
771         TEST_UNSUPPORTED(__inst_arm(0xe63fffdf) "") /* Unallocated space */
772         TEST_RR(    "shsub8     r0, r",0,  HH1,", r",1, HH2,"")
773         TEST_RR(    "shsub8     r14, r",12,HH2,", r",10,HH1,"")
774         TEST_UNSUPPORTED(__inst_arm(0xe63cfffa) "       @ shsub8        pc, r12, r10")
775
776         TEST_GROUP("Parallel addition and subtraction, unsigned")
777
778         TEST_UNSUPPORTED(__inst_arm(0xe6400010) "") /* Unallocated space */
779         TEST_UNSUPPORTED(__inst_arm(0xe64fffff) "") /* Unallocated space */
780
781         TEST_RR(    "uadd16     r0, r",0,  HH1,", r",1, HH2,"")
782         TEST_RR(    "uadd16     r14, r",12,HH2,", r",10,HH1,"")
783         TEST_UNSUPPORTED(__inst_arm(0xe65cff1a) "       @ uadd16        pc, r12, r10")
784         TEST_RR(    "uasx       r0, r",0,  HH1,", r",1, HH2,"")
785         TEST_RR(    "uasx       r14, r",12,HH2,", r",10,HH1,"")
786         TEST_UNSUPPORTED(__inst_arm(0xe65cff3a) "       @ uasx  pc, r12, r10")
787         TEST_RR(    "usax       r0, r",0,  HH1,", r",1, HH2,"")
788         TEST_RR(    "usax       r14, r",12,HH2,", r",10,HH1,"")
789         TEST_UNSUPPORTED(__inst_arm(0xe65cff5a) "       @ usax  pc, r12, r10")
790         TEST_RR(    "usub16     r0, r",0,  HH1,", r",1, HH2,"")
791         TEST_RR(    "usub16     r14, r",12,HH2,", r",10,HH1,"")
792         TEST_UNSUPPORTED(__inst_arm(0xe65cff7a) "       @ usub16        pc, r12, r10")
793         TEST_RR(    "uadd8      r0, r",0,  HH1,", r",1, HH2,"")
794         TEST_RR(    "uadd8      r14, r",12,HH2,", r",10,HH1,"")
795         TEST_UNSUPPORTED(__inst_arm(0xe65cff9a) "       @ uadd8 pc, r12, r10")
796         TEST_UNSUPPORTED(__inst_arm(0xe65000b0) "") /* Unallocated space */
797         TEST_UNSUPPORTED(__inst_arm(0xe65fffbf) "") /* Unallocated space */
798         TEST_UNSUPPORTED(__inst_arm(0xe65000d0) "") /* Unallocated space */
799         TEST_UNSUPPORTED(__inst_arm(0xe65fffdf) "") /* Unallocated space */
800         TEST_RR(    "usub8      r0, r",0,  HH1,", r",1, HH2,"")
801         TEST_RR(    "usub8      r14, r",12,HH2,", r",10,HH1,"")
802         TEST_UNSUPPORTED(__inst_arm(0xe65cfffa) "       @ usub8 pc, r12, r10")
803
804         TEST_RR(    "uqadd16    r0, r",0,  HH1,", r",1, HH2,"")
805         TEST_RR(    "uqadd16    r14, r",12,HH2,", r",10,HH1,"")
806         TEST_UNSUPPORTED(__inst_arm(0xe66cff1a) "       @ uqadd16       pc, r12, r10")
807         TEST_RR(    "uqasx      r0, r",0,  HH1,", r",1, HH2,"")
808         TEST_RR(    "uqasx      r14, r",12,HH2,", r",10,HH1,"")
809         TEST_UNSUPPORTED(__inst_arm(0xe66cff3a) "       @ uqasx pc, r12, r10")
810         TEST_RR(    "uqsax      r0, r",0,  HH1,", r",1, HH2,"")
811         TEST_RR(    "uqsax      r14, r",12,HH2,", r",10,HH1,"")
812         TEST_UNSUPPORTED(__inst_arm(0xe66cff5a) "       @ uqsax pc, r12, r10")
813         TEST_RR(    "uqsub16    r0, r",0,  HH1,", r",1, HH2,"")
814         TEST_RR(    "uqsub16    r14, r",12,HH2,", r",10,HH1,"")
815         TEST_UNSUPPORTED(__inst_arm(0xe66cff7a) "       @ uqsub16       pc, r12, r10")
816         TEST_RR(    "uqadd8     r0, r",0,  HH1,", r",1, HH2,"")
817         TEST_RR(    "uqadd8     r14, r",12,HH2,", r",10,HH1,"")
818         TEST_UNSUPPORTED(__inst_arm(0xe66cff9a) "       @ uqadd8        pc, r12, r10")
819         TEST_UNSUPPORTED(__inst_arm(0xe66000b0) "") /* Unallocated space */
820         TEST_UNSUPPORTED(__inst_arm(0xe66fffbf) "") /* Unallocated space */
821         TEST_UNSUPPORTED(__inst_arm(0xe66000d0) "") /* Unallocated space */
822         TEST_UNSUPPORTED(__inst_arm(0xe66fffdf) "") /* Unallocated space */
823         TEST_RR(    "uqsub8     r0, r",0,  HH1,", r",1, HH2,"")
824         TEST_RR(    "uqsub8     r14, r",12,HH2,", r",10,HH1,"")
825         TEST_UNSUPPORTED(__inst_arm(0xe66cfffa) "       @ uqsub8        pc, r12, r10")
826
827         TEST_RR(    "uhadd16    r0, r",0,  HH1,", r",1, HH2,"")
828         TEST_RR(    "uhadd16    r14, r",12,HH2,", r",10,HH1,"")
829         TEST_UNSUPPORTED(__inst_arm(0xe67cff1a) "       @ uhadd16       pc, r12, r10")
830         TEST_RR(    "uhasx      r0, r",0,  HH1,", r",1, HH2,"")
831         TEST_RR(    "uhasx      r14, r",12,HH2,", r",10,HH1,"")
832         TEST_UNSUPPORTED(__inst_arm(0xe67cff3a) "       @ uhasx pc, r12, r10")
833         TEST_RR(    "uhsax      r0, r",0,  HH1,", r",1, HH2,"")
834         TEST_RR(    "uhsax      r14, r",12,HH2,", r",10,HH1,"")
835         TEST_UNSUPPORTED(__inst_arm(0xe67cff5a) "       @ uhsax pc, r12, r10")
836         TEST_RR(    "uhsub16    r0, r",0,  HH1,", r",1, HH2,"")
837         TEST_RR(    "uhsub16    r14, r",12,HH2,", r",10,HH1,"")
838         TEST_UNSUPPORTED(__inst_arm(0xe67cff7a) "       @ uhsub16       pc, r12, r10")
839         TEST_RR(    "uhadd8     r0, r",0,  HH1,", r",1, HH2,"")
840         TEST_RR(    "uhadd8     r14, r",12,HH2,", r",10,HH1,"")
841         TEST_UNSUPPORTED(__inst_arm(0xe67cff9a) "       @ uhadd8        pc, r12, r10")
842         TEST_UNSUPPORTED(__inst_arm(0xe67000b0) "") /* Unallocated space */
843         TEST_UNSUPPORTED(__inst_arm(0xe67fffbf) "") /* Unallocated space */
844         TEST_UNSUPPORTED(__inst_arm(0xe67000d0) "") /* Unallocated space */
845         TEST_UNSUPPORTED(__inst_arm(0xe67fffdf) "") /* Unallocated space */
846         TEST_RR(    "uhsub8     r0, r",0,  HH1,", r",1, HH2,"")
847         TEST_RR(    "uhsub8     r14, r",12,HH2,", r",10,HH1,"")
848         TEST_UNSUPPORTED(__inst_arm(0xe67cfffa) "       @ uhsub8        pc, r12, r10")
849         TEST_UNSUPPORTED(__inst_arm(0xe67feffa) "       @ uhsub8        r14, pc, r10")
850         TEST_UNSUPPORTED(__inst_arm(0xe67cefff) "       @ uhsub8        r14, r12, pc")
851 #endif /* __LINUX_ARM_ARCH__ >= 7 */
852
853 #if __LINUX_ARM_ARCH__ >= 6
854         TEST_GROUP("Packing, unpacking, saturation, and reversal")
855
856         TEST_RR(    "pkhbt      r0, r",0,  HH1,", r",1, HH2,"")
857         TEST_RR(    "pkhbt      r14,r",12, HH1,", r",10,HH2,", lsl #2")
858         TEST_UNSUPPORTED(__inst_arm(0xe68cf11a) "       @ pkhbt pc, r12, r10, lsl #2")
859         TEST_RR(    "pkhtb      r0, r",0,  HH1,", r",1, HH2,"")
860         TEST_RR(    "pkhtb      r14,r",12, HH1,", r",10,HH2,", asr #2")
861         TEST_UNSUPPORTED(__inst_arm(0xe68cf15a) "       @ pkhtb pc, r12, r10, asr #2")
862         TEST_UNSUPPORTED(__inst_arm(0xe68fe15a) "       @ pkhtb r14, pc, r10, asr #2")
863         TEST_UNSUPPORTED(__inst_arm(0xe68ce15f) "       @ pkhtb r14, r12, pc, asr #2")
864         TEST_UNSUPPORTED(__inst_arm(0xe6900010) "") /* Unallocated space */
865         TEST_UNSUPPORTED(__inst_arm(0xe69fffdf) "") /* Unallocated space */
866
867         TEST_R(     "ssat       r0, #24, r",0,   VAL1,"")
868         TEST_R(     "ssat       r14, #24, r",12, VAL2,"")
869         TEST_R(     "ssat       r0, #24, r",0,   VAL1,", lsl #8")
870         TEST_R(     "ssat       r14, #24, r",12, VAL2,", asr #8")
871         TEST_UNSUPPORTED(__inst_arm(0xe6b7f01c) "       @ ssat  pc, #24, r12")
872
873         TEST_R(     "usat       r0, #24, r",0,   VAL1,"")
874         TEST_R(     "usat       r14, #24, r",12, VAL2,"")
875         TEST_R(     "usat       r0, #24, r",0,   VAL1,", lsl #8")
876         TEST_R(     "usat       r14, #24, r",12, VAL2,", asr #8")
877         TEST_UNSUPPORTED(__inst_arm(0xe6f7f01c) "       @ usat  pc, #24, r12")
878
879         TEST_RR(    "sxtab16    r0, r",0,  HH1,", r",1, HH2,"")
880         TEST_RR(    "sxtab16    r14,r",12, HH2,", r",10,HH1,", ror #8")
881         TEST_R(     "sxtb16     r8, r",7,  HH1,"")
882         TEST_UNSUPPORTED(__inst_arm(0xe68cf47a) "       @ sxtab16       pc,r12, r10, ror #8")
883
884         TEST_RR(    "sel        r0, r",0,  VAL1,", r",1, VAL2,"")
885         TEST_RR(    "sel        r14, r",12,VAL1,", r",10, VAL2,"")
886         TEST_UNSUPPORTED(__inst_arm(0xe68cffba) "       @ sel   pc, r12, r10")
887         TEST_UNSUPPORTED(__inst_arm(0xe68fefba) "       @ sel   r14, pc, r10")
888         TEST_UNSUPPORTED(__inst_arm(0xe68cefbf) "       @ sel   r14, r12, pc")
889
890         TEST_R(     "ssat16     r0, #12, r",0,   HH1,"")
891         TEST_R(     "ssat16     r14, #12, r",12, HH2,"")
892         TEST_UNSUPPORTED(__inst_arm(0xe6abff3c) "       @ ssat16        pc, #12, r12")
893
894         TEST_RR(    "sxtab      r0, r",0,  HH1,", r",1, HH2,"")
895         TEST_RR(    "sxtab      r14,r",12, HH2,", r",10,HH1,", ror #8")
896         TEST_R(     "sxtb       r8, r",7,  HH1,"")
897         TEST_UNSUPPORTED(__inst_arm(0xe6acf47a) "       @ sxtab pc,r12, r10, ror #8")
898
899         TEST_R(     "rev        r0, r",0,   VAL1,"")
900         TEST_R(     "rev        r14, r",12, VAL2,"")
901         TEST_UNSUPPORTED(__inst_arm(0xe6bfff3c) "       @ rev   pc, r12")
902
903         TEST_RR(    "sxtah      r0, r",0,  HH1,", r",1, HH2,"")
904         TEST_RR(    "sxtah      r14,r",12, HH2,", r",10,HH1,", ror #8")
905         TEST_R(     "sxth       r8, r",7,  HH1,"")
906         TEST_UNSUPPORTED(__inst_arm(0xe6bcf47a) "       @ sxtah pc,r12, r10, ror #8")
907
908         TEST_R(     "rev16      r0, r",0,   VAL1,"")
909         TEST_R(     "rev16      r14, r",12, VAL2,"")
910         TEST_UNSUPPORTED(__inst_arm(0xe6bfffbc) "       @ rev16 pc, r12")
911
912         TEST_RR(    "uxtab16    r0, r",0,  HH1,", r",1, HH2,"")
913         TEST_RR(    "uxtab16    r14,r",12, HH2,", r",10,HH1,", ror #8")
914         TEST_R(     "uxtb16     r8, r",7,  HH1,"")
915         TEST_UNSUPPORTED(__inst_arm(0xe6ccf47a) "       @ uxtab16       pc,r12, r10, ror #8")
916
917         TEST_R(     "usat16     r0, #12, r",0,   HH1,"")
918         TEST_R(     "usat16     r14, #12, r",12, HH2,"")
919         TEST_UNSUPPORTED(__inst_arm(0xe6ecff3c) "       @ usat16        pc, #12, r12")
920         TEST_UNSUPPORTED(__inst_arm(0xe6ecef3f) "       @ usat16        r14, #12, pc")
921
922         TEST_RR(    "uxtab      r0, r",0,  HH1,", r",1, HH2,"")
923         TEST_RR(    "uxtab      r14,r",12, HH2,", r",10,HH1,", ror #8")
924         TEST_R(     "uxtb       r8, r",7,  HH1,"")
925         TEST_UNSUPPORTED(__inst_arm(0xe6ecf47a) "       @ uxtab pc,r12, r10, ror #8")
926
927 #if __LINUX_ARM_ARCH__ >= 7
928         TEST_R(     "rbit       r0, r",0,   VAL1,"")
929         TEST_R(     "rbit       r14, r",12, VAL2,"")
930         TEST_UNSUPPORTED(__inst_arm(0xe6ffff3c) "       @ rbit  pc, r12")
931 #endif
932
933         TEST_RR(    "uxtah      r0, r",0,  HH1,", r",1, HH2,"")
934         TEST_RR(    "uxtah      r14,r",12, HH2,", r",10,HH1,", ror #8")
935         TEST_R(     "uxth       r8, r",7,  HH1,"")
936         TEST_UNSUPPORTED(__inst_arm(0xe6fff077) "       @ uxth  pc, r7")
937         TEST_UNSUPPORTED(__inst_arm(0xe6ff807f) "       @ uxth  r8, pc")
938         TEST_UNSUPPORTED(__inst_arm(0xe6fcf47a) "       @ uxtah pc, r12, r10, ror #8")
939         TEST_UNSUPPORTED(__inst_arm(0xe6fce47f) "       @ uxtah r14, r12, pc, ror #8")
940
941         TEST_R(     "revsh      r0, r",0,   VAL1,"")
942         TEST_R(     "revsh      r14, r",12, VAL2,"")
943         TEST_UNSUPPORTED(__inst_arm(0xe6ffff3c) "       @ revsh pc, r12")
944         TEST_UNSUPPORTED(__inst_arm(0xe6ffef3f) "       @ revsh r14, pc")
945
946         TEST_UNSUPPORTED(__inst_arm(0xe6900070) "") /* Unallocated space */
947         TEST_UNSUPPORTED(__inst_arm(0xe69fff7f) "") /* Unallocated space */
948
949         TEST_UNSUPPORTED(__inst_arm(0xe6d00070) "") /* Unallocated space */
950         TEST_UNSUPPORTED(__inst_arm(0xe6dfff7f) "") /* Unallocated space */
951 #endif /* __LINUX_ARM_ARCH__ >= 6 */
952
953 #if __LINUX_ARM_ARCH__ >= 6
954         TEST_GROUP("Signed multiplies")
955
956         TEST_RRR(   "smlad      r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
957         TEST_RRR(   "smlad      r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
958         TEST_UNSUPPORTED(__inst_arm(0xe70f8a1c) "       @ smlad pc, r12, r10, r8")
959         TEST_RRR(   "smladx     r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
960         TEST_RRR(   "smladx     r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
961         TEST_UNSUPPORTED(__inst_arm(0xe70f8a3c) "       @ smladx        pc, r12, r10, r8")
962
963         TEST_RR(   "smuad       r0, r",0,  HH1,", r",1, HH2,"")
964         TEST_RR(   "smuad       r14, r",12,HH2,", r",10,HH1,"")
965         TEST_UNSUPPORTED(__inst_arm(0xe70ffa1c) "       @ smuad pc, r12, r10")
966         TEST_RR(   "smuadx      r0, r",0,  HH1,", r",1, HH2,"")
967         TEST_RR(   "smuadx      r14, r",12,HH2,", r",10,HH1,"")
968         TEST_UNSUPPORTED(__inst_arm(0xe70ffa3c) "       @ smuadx        pc, r12, r10")
969
970         TEST_RRR(   "smlsd      r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
971         TEST_RRR(   "smlsd      r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
972         TEST_UNSUPPORTED(__inst_arm(0xe70f8a5c) "       @ smlsd pc, r12, r10, r8")
973         TEST_RRR(   "smlsdx     r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
974         TEST_RRR(   "smlsdx     r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
975         TEST_UNSUPPORTED(__inst_arm(0xe70f8a7c) "       @ smlsdx        pc, r12, r10, r8")
976
977         TEST_RR(   "smusd       r0, r",0,  HH1,", r",1, HH2,"")
978         TEST_RR(   "smusd       r14, r",12,HH2,", r",10,HH1,"")
979         TEST_UNSUPPORTED(__inst_arm(0xe70ffa5c) "       @ smusd pc, r12, r10")
980         TEST_RR(   "smusdx      r0, r",0,  HH1,", r",1, HH2,"")
981         TEST_RR(   "smusdx      r14, r",12,HH2,", r",10,HH1,"")
982         TEST_UNSUPPORTED(__inst_arm(0xe70ffa7c) "       @ smusdx        pc, r12, r10")
983
984         TEST_RRRR( "smlald      r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
985         TEST_RRRR( "smlald      r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
986         TEST_UNSUPPORTED(__inst_arm(0xe74af819) "       @ smlald        pc, r10, r9, r8")
987         TEST_UNSUPPORTED(__inst_arm(0xe74fb819) "       @ smlald        r11, pc, r9, r8")
988         TEST_UNSUPPORTED(__inst_arm(0xe74ab81f) "       @ smlald        r11, r10, pc, r8")
989         TEST_UNSUPPORTED(__inst_arm(0xe74abf19) "       @ smlald        r11, r10, r9, pc")
990
991         TEST_RRRR( "smlaldx     r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
992         TEST_RRRR( "smlaldx     r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
993         TEST_UNSUPPORTED(__inst_arm(0xe74af839) "       @ smlaldx       pc, r10, r9, r8")
994         TEST_UNSUPPORTED(__inst_arm(0xe74fb839) "       @ smlaldx       r11, pc, r9, r8")
995
996         TEST_RRR(  "smmla       r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
997         TEST_RRR(  "smmla       r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
998         TEST_UNSUPPORTED(__inst_arm(0xe75f8a1c) "       @ smmla pc, r12, r10, r8")
999         TEST_RRR(  "smmlar      r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1000         TEST_RRR(  "smmlar      r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1001         TEST_UNSUPPORTED(__inst_arm(0xe75f8a3c) "       @ smmlar        pc, r12, r10, r8")
1002
1003         TEST_RR(   "smmul       r0, r",0,  VAL1,", r",1, VAL2,"")
1004         TEST_RR(   "smmul       r14, r",12,VAL2,", r",10,VAL1,"")
1005         TEST_UNSUPPORTED(__inst_arm(0xe75ffa1c) "       @ smmul pc, r12, r10")
1006         TEST_RR(   "smmulr      r0, r",0,  VAL1,", r",1, VAL2,"")
1007         TEST_RR(   "smmulr      r14, r",12,VAL2,", r",10,VAL1,"")
1008         TEST_UNSUPPORTED(__inst_arm(0xe75ffa3c) "       @ smmulr        pc, r12, r10")
1009
1010         TEST_RRR(  "smmls       r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1011         TEST_RRR(  "smmls       r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1012         TEST_UNSUPPORTED(__inst_arm(0xe75f8adc) "       @ smmls pc, r12, r10, r8")
1013         TEST_RRR(  "smmlsr      r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1014         TEST_RRR(  "smmlsr      r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1015         TEST_UNSUPPORTED(__inst_arm(0xe75f8afc) "       @ smmlsr        pc, r12, r10, r8")
1016         TEST_UNSUPPORTED(__inst_arm(0xe75e8aff) "       @ smmlsr        r14, pc, r10, r8")
1017         TEST_UNSUPPORTED(__inst_arm(0xe75e8ffc) "       @ smmlsr        r14, r12, pc, r8")
1018         TEST_UNSUPPORTED(__inst_arm(0xe75efafc) "       @ smmlsr        r14, r12, r10, pc")
1019
1020         TEST_RR(   "usad8       r0, r",0,  VAL1,", r",1, VAL2,"")
1021         TEST_RR(   "usad8       r14, r",12,VAL2,", r",10,VAL1,"")
1022         TEST_UNSUPPORTED(__inst_arm(0xe75ffa1c) "       @ usad8 pc, r12, r10")
1023         TEST_UNSUPPORTED(__inst_arm(0xe75efa1f) "       @ usad8 r14, pc, r10")
1024         TEST_UNSUPPORTED(__inst_arm(0xe75eff1c) "       @ usad8 r14, r12, pc")
1025
1026         TEST_RRR(  "usada8      r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL3,"")
1027         TEST_RRR(  "usada8      r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL3,"")
1028         TEST_UNSUPPORTED(__inst_arm(0xe78f8a1c) "       @ usada8        pc, r12, r10, r8")
1029         TEST_UNSUPPORTED(__inst_arm(0xe78e8a1f) "       @ usada8        r14, pc, r10, r8")
1030         TEST_UNSUPPORTED(__inst_arm(0xe78e8f1c) "       @ usada8        r14, r12, pc, r8")
1031 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1032
1033 #if __LINUX_ARM_ARCH__ >= 7
1034         TEST_GROUP("Bit Field")
1035
1036         TEST_R(     "sbfx       r0, r",0  , VAL1,", #0, #31")
1037         TEST_R(     "sbfxeq     r14, r",12, VAL2,", #8, #16")
1038         TEST_R(     "sbfx       r4, r",10,  VAL1,", #16, #15")
1039         TEST_UNSUPPORTED(__inst_arm(0xe7aff45c) "       @ sbfx  pc, r12, #8, #16")
1040
1041         TEST_R(     "ubfx       r0, r",0  , VAL1,", #0, #31")
1042         TEST_R(     "ubfxcs     r14, r",12, VAL2,", #8, #16")
1043         TEST_R(     "ubfx       r4, r",10,  VAL1,", #16, #15")
1044         TEST_UNSUPPORTED(__inst_arm(0xe7eff45c) "       @ ubfx  pc, r12, #8, #16")
1045         TEST_UNSUPPORTED(__inst_arm(0xe7efc45f) "       @ ubfx  r12, pc, #8, #16")
1046
1047         TEST_R(     "bfc        r",0, VAL1,", #4, #20")
1048         TEST_R(     "bfcvs      r",14,VAL2,", #4, #20")
1049         TEST_R(     "bfc        r",7, VAL1,", #0, #31")
1050         TEST_R(     "bfc        r",8, VAL2,", #0, #31")
1051         TEST_UNSUPPORTED(__inst_arm(0xe7def01f) "       @ bfc   pc, #0, #31");
1052
1053         TEST_RR(    "bfi        r",0, VAL1,", r",0  , VAL2,", #0, #31")
1054         TEST_RR(    "bfipl      r",12,VAL1,", r",14 , VAL2,", #4, #20")
1055         TEST_UNSUPPORTED(__inst_arm(0xe7d7f21e) "       @ bfi   pc, r14, #4, #20")
1056
1057         TEST_UNSUPPORTED(__inst_arm(0x07f000f0) "")  /* Permanently UNDEFINED */
1058         TEST_UNSUPPORTED(__inst_arm(0x07ffffff) "")  /* Permanently UNDEFINED */
1059 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1060
1061         TEST_GROUP("Branch, branch with link, and block data transfer")
1062
1063         TEST_P(   "stmda        r",0, 16*4,", {r0}")
1064         TEST_P(   "stmeqda      r",4, 16*4,", {r0-r15}")
1065         TEST_P(   "stmneda      r",8, 16*4,"!, {r8-r15}")
1066         TEST_P(   "stmda        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1067         TEST_P(   "stmda        r",13,0,   "!, {pc}")
1068
1069         TEST_P(   "ldmda        r",0, 16*4,", {r0}")
1070         TEST_BF_P("ldmcsda      r",4, 15*4,", {r0-r15}")
1071         TEST_BF_P("ldmccda      r",7, 15*4,"!, {r8-r15}")
1072         TEST_P(   "ldmda        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1073         TEST_BF_P("ldmda        r",14,15*4,"!, {pc}")
1074
1075         TEST_P(   "stmia        r",0, 16*4,", {r0}")
1076         TEST_P(   "stmmiia      r",4, 16*4,", {r0-r15}")
1077         TEST_P(   "stmplia      r",8, 16*4,"!, {r8-r15}")
1078         TEST_P(   "stmia        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1079         TEST_P(   "stmia        r",14,0,   "!, {pc}")
1080
1081         TEST_P(   "ldmia        r",0, 16*4,", {r0}")
1082         TEST_BF_P("ldmvsia      r",4, 0,   ", {r0-r15}")
1083         TEST_BF_P("ldmvcia      r",7, 8*4, "!, {r8-r15}")
1084         TEST_P(   "ldmia        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1085         TEST_BF_P("ldmia        r",14,15*4,"!, {pc}")
1086
1087         TEST_P(   "stmdb        r",0, 16*4,", {r0}")
1088         TEST_P(   "stmhidb      r",4, 16*4,", {r0-r15}")
1089         TEST_P(   "stmlsdb      r",8, 16*4,"!, {r8-r15}")
1090         TEST_P(   "stmdb        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1091         TEST_P(   "stmdb        r",13,4,   "!, {pc}")
1092
1093         TEST_P(   "ldmdb        r",0, 16*4,", {r0}")
1094         TEST_BF_P("ldmgedb      r",4, 16*4,", {r0-r15}")
1095         TEST_BF_P("ldmltdb      r",7, 16*4,"!, {r8-r15}")
1096         TEST_P(   "ldmdb        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1097         TEST_BF_P("ldmdb        r",14,16*4,"!, {pc}")
1098
1099         TEST_P(   "stmib        r",0, 16*4,", {r0}")
1100         TEST_P(   "stmgtib      r",4, 16*4,", {r0-r15}")
1101         TEST_P(   "stmleib      r",8, 16*4,"!, {r8-r15}")
1102         TEST_P(   "stmib        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1103         TEST_P(   "stmib        r",13,-4,  "!, {pc}")
1104
1105         TEST_P(   "ldmib        r",0, 16*4,", {r0}")
1106         TEST_BF_P("ldmeqib      r",4, -4,", {r0-r15}")
1107         TEST_BF_P("ldmneib      r",7, 7*4,"!, {r8-r15}")
1108         TEST_P(   "ldmib        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1109         TEST_BF_P("ldmib        r",14,14*4,"!, {pc}")
1110
1111         TEST_P(   "stmdb        r",13,16*4,"!, {r3-r12,lr}")
1112         TEST_P(   "stmeqdb      r",13,16*4,"!, {r3-r12}")
1113         TEST_P(   "stmnedb      r",2, 16*4,", {r3-r12,lr}")
1114         TEST_P(   "stmdb        r",13,16*4,"!, {r2-r12,lr}")
1115         TEST_P(   "stmdb        r",0, 16*4,", {r0-r12}")
1116         TEST_P(   "stmdb        r",0, 16*4,", {r0-r12,lr}")
1117
1118         TEST_BF_P("ldmia        r",13,5*4, "!, {r3-r12,pc}")
1119         TEST_P(   "ldmccia      r",13,5*4, "!, {r3-r12}")
1120         TEST_BF_P("ldmcsia      r",2, 5*4, "!, {r3-r12,pc}")
1121         TEST_BF_P("ldmia        r",13,4*4, "!, {r2-r12,pc}")
1122         TEST_P(   "ldmia        r",0, 16*4,", {r0-r12}")
1123         TEST_P(   "ldmia        r",0, 16*4,", {r0-r12,lr}")
1124
1125 #ifdef CONFIG_THUMB2_KERNEL
1126         TEST_ARM_TO_THUMB_INTERWORK_P("ldmplia  r",0,15*4,", {pc}")
1127         TEST_ARM_TO_THUMB_INTERWORK_P("ldmmiia  r",13,0,", {r0-r15}")
1128 #endif
1129         TEST_BF("b      2f")
1130         TEST_BF("bl     2f")
1131         TEST_BB("b      2b")
1132         TEST_BB("bl     2b")
1133
1134         TEST_BF("beq    2f")
1135         TEST_BF("bleq   2f")
1136         TEST_BB("bne    2b")
1137         TEST_BB("blne   2b")
1138
1139         TEST_BF("bgt    2f")
1140         TEST_BF("blgt   2f")
1141         TEST_BB("blt    2b")
1142         TEST_BB("bllt   2b")
1143
1144         TEST_GROUP("Supervisor Call, and coprocessor instructions")
1145
1146         /*
1147          * We can't really test these by executing them, so all
1148          * we can do is check that probes are, or are not allowed.
1149          * At the moment none are allowed...
1150          */
1151 #define TEST_COPROCESSOR(code) TEST_UNSUPPORTED(code)
1152
1153 #define COPROCESSOR_INSTRUCTIONS_ST_LD(two,cc)                                  \
1154         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #4]")                     \
1155         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #-4]")                    \
1156         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #4]!")                    \
1157         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #-4]!")                   \
1158         TEST_COPROCESSOR("stc"two"      0, cr0, [r13], #4")                     \
1159         TEST_COPROCESSOR("stc"two"      0, cr0, [r13], #-4")                    \
1160         TEST_COPROCESSOR("stc"two"      0, cr0, [r13], {1}")                    \
1161         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #4]")                     \
1162         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #-4]")                    \
1163         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #4]!")                    \
1164         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #-4]!")                   \
1165         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13], #4")                     \
1166         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13], #-4")                    \
1167         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13], {1}")                    \
1168         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #4]")                     \
1169         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #-4]")                    \
1170         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #4]!")                    \
1171         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #-4]!")                   \
1172         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13], #4")                     \
1173         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13], #-4")                    \
1174         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13], {1}")                    \
1175         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #4]")                     \
1176         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #-4]")                    \
1177         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #4]!")                    \
1178         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #-4]!")                   \
1179         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13], #4")                     \
1180         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13], #-4")                    \
1181         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13], {1}")                    \
1182                                                                                 \
1183         TEST_COPROCESSOR( "stc"two"     0, cr0, [r15, #4]")                     \
1184         TEST_COPROCESSOR( "stc"two"     0, cr0, [r15, #-4]")                    \
1185         TEST_UNSUPPORTED(__inst_arm(0x##cc##daf0001) "  @ stc"two"      0, cr0, [r15, #4]!")    \
1186         TEST_UNSUPPORTED(__inst_arm(0x##cc##d2f0001) "  @ stc"two"      0, cr0, [r15, #-4]!")   \
1187         TEST_UNSUPPORTED(__inst_arm(0x##cc##caf0001) "  @ stc"two"      0, cr0, [r15], #4")     \
1188         TEST_UNSUPPORTED(__inst_arm(0x##cc##c2f0001) "  @ stc"two"      0, cr0, [r15], #-4")    \
1189         TEST_COPROCESSOR( "stc"two"     0, cr0, [r15], {1}")                    \
1190         TEST_COPROCESSOR( "stc"two"l    0, cr0, [r15, #4]")                     \
1191         TEST_COPROCESSOR( "stc"two"l    0, cr0, [r15, #-4]")                    \
1192         TEST_UNSUPPORTED(__inst_arm(0x##cc##def0001) "  @ stc"two"l     0, cr0, [r15, #4]!")    \
1193         TEST_UNSUPPORTED(__inst_arm(0x##cc##d6f0001) "  @ stc"two"l     0, cr0, [r15, #-4]!")   \
1194         TEST_UNSUPPORTED(__inst_arm(0x##cc##cef0001) "  @ stc"two"l     0, cr0, [r15], #4")     \
1195         TEST_UNSUPPORTED(__inst_arm(0x##cc##c6f0001) "  @ stc"two"l     0, cr0, [r15], #-4")    \
1196         TEST_COPROCESSOR( "stc"two"l    0, cr0, [r15], {1}")                    \
1197         TEST_COPROCESSOR( "ldc"two"     0, cr0, [r15, #4]")                     \
1198         TEST_COPROCESSOR( "ldc"two"     0, cr0, [r15, #-4]")                    \
1199         TEST_UNSUPPORTED(__inst_arm(0x##cc##dbf0001) "  @ ldc"two"      0, cr0, [r15, #4]!")    \
1200         TEST_UNSUPPORTED(__inst_arm(0x##cc##d3f0001) "  @ ldc"two"      0, cr0, [r15, #-4]!")   \
1201         TEST_UNSUPPORTED(__inst_arm(0x##cc##cbf0001) "  @ ldc"two"      0, cr0, [r15], #4")     \
1202         TEST_UNSUPPORTED(__inst_arm(0x##cc##c3f0001) "  @ ldc"two"      0, cr0, [r15], #-4")    \
1203         TEST_COPROCESSOR( "ldc"two"     0, cr0, [r15], {1}")                    \
1204         TEST_COPROCESSOR( "ldc"two"l    0, cr0, [r15, #4]")                     \
1205         TEST_COPROCESSOR( "ldc"two"l    0, cr0, [r15, #-4]")                    \
1206         TEST_UNSUPPORTED(__inst_arm(0x##cc##dff0001) "  @ ldc"two"l     0, cr0, [r15, #4]!")    \
1207         TEST_UNSUPPORTED(__inst_arm(0x##cc##d7f0001) "  @ ldc"two"l     0, cr0, [r15, #-4]!")   \
1208         TEST_UNSUPPORTED(__inst_arm(0x##cc##cff0001) "  @ ldc"two"l     0, cr0, [r15], #4")     \
1209         TEST_UNSUPPORTED(__inst_arm(0x##cc##c7f0001) "  @ ldc"two"l     0, cr0, [r15], #-4")    \
1210         TEST_COPROCESSOR( "ldc"two"l    0, cr0, [r15], {1}")
1211
1212 #define COPROCESSOR_INSTRUCTIONS_MC_MR(two,cc)                                  \
1213                                                                                 \
1214         TEST_COPROCESSOR( "mcrr"two"    0, 15, r0, r14, cr0")                   \
1215         TEST_COPROCESSOR( "mcrr"two"    15, 0, r14, r0, cr15")                  \
1216         TEST_UNSUPPORTED(__inst_arm(0x##cc##c4f00f0) "  @ mcrr"two"     0, 15, r0, r15, cr0")   \
1217         TEST_UNSUPPORTED(__inst_arm(0x##cc##c40ff0f) "  @ mcrr"two"     15, 0, r15, r0, cr15")  \
1218         TEST_COPROCESSOR( "mrrc"two"    0, 15, r0, r14, cr0")                   \
1219         TEST_COPROCESSOR( "mrrc"two"    15, 0, r14, r0, cr15")                  \
1220         TEST_UNSUPPORTED(__inst_arm(0x##cc##c5f00f0) "  @ mrrc"two"     0, 15, r0, r15, cr0")   \
1221         TEST_UNSUPPORTED(__inst_arm(0x##cc##c50ff0f) "  @ mrrc"two"     15, 0, r15, r0, cr15")  \
1222         TEST_COPROCESSOR( "cdp"two"     15, 15, cr15, cr15, cr15, 7")           \
1223         TEST_COPROCESSOR( "cdp"two"     0, 0, cr0, cr0, cr0, 0")                \
1224         TEST_COPROCESSOR( "mcr"two"     15, 7, r15, cr15, cr15, 7")             \
1225         TEST_COPROCESSOR( "mcr"two"     0, 0, r0, cr0, cr0, 0")                 \
1226         TEST_COPROCESSOR( "mrc"two"     15, 7, r15, cr15, cr15, 7")             \
1227         TEST_COPROCESSOR( "mrc"two"     0, 0, r0, cr0, cr0, 0")
1228
1229         COPROCESSOR_INSTRUCTIONS_ST_LD("",e)
1230         COPROCESSOR_INSTRUCTIONS_MC_MR("",e)
1231         TEST_UNSUPPORTED("svc   0")
1232         TEST_UNSUPPORTED("svc   0xffffff")
1233
1234         TEST_UNSUPPORTED("svc   0")
1235
1236         TEST_GROUP("Unconditional instruction")
1237
1238 #if __LINUX_ARM_ARCH__ >= 6
1239         TEST_UNSUPPORTED("srsda sp, 0x13")
1240         TEST_UNSUPPORTED("srsdb sp, 0x13")
1241         TEST_UNSUPPORTED("srsia sp, 0x13")
1242         TEST_UNSUPPORTED("srsib sp, 0x13")
1243         TEST_UNSUPPORTED("srsda sp!, 0x13")
1244         TEST_UNSUPPORTED("srsdb sp!, 0x13")
1245         TEST_UNSUPPORTED("srsia sp!, 0x13")
1246         TEST_UNSUPPORTED("srsib sp!, 0x13")
1247
1248         TEST_UNSUPPORTED("rfeda sp")
1249         TEST_UNSUPPORTED("rfedb sp")
1250         TEST_UNSUPPORTED("rfeia sp")
1251         TEST_UNSUPPORTED("rfeib sp")
1252         TEST_UNSUPPORTED("rfeda sp!")
1253         TEST_UNSUPPORTED("rfedb sp!")
1254         TEST_UNSUPPORTED("rfeia sp!")
1255         TEST_UNSUPPORTED("rfeib sp!")
1256         TEST_UNSUPPORTED(__inst_arm(0xf81d0a00) "       @ rfeda pc")
1257         TEST_UNSUPPORTED(__inst_arm(0xf91d0a00) "       @ rfedb pc")
1258         TEST_UNSUPPORTED(__inst_arm(0xf89d0a00) "       @ rfeia pc")
1259         TEST_UNSUPPORTED(__inst_arm(0xf99d0a00) "       @ rfeib pc")
1260         TEST_UNSUPPORTED(__inst_arm(0xf83d0a00) "       @ rfeda pc!")
1261         TEST_UNSUPPORTED(__inst_arm(0xf93d0a00) "       @ rfedb pc!")
1262         TEST_UNSUPPORTED(__inst_arm(0xf8bd0a00) "       @ rfeia pc!")
1263         TEST_UNSUPPORTED(__inst_arm(0xf9bd0a00) "       @ rfeib pc!")
1264 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1265
1266 #if __LINUX_ARM_ARCH__ >= 6
1267         TEST_X( "blx    __dummy_thumb_subroutine_even",
1268                 ".thumb                         \n\t"
1269                 ".space 4                       \n\t"
1270                 ".type __dummy_thumb_subroutine_even, %%function \n\t"
1271                 "__dummy_thumb_subroutine_even: \n\t"
1272                 "mov    r0, pc                  \n\t"
1273                 "bx     lr                      \n\t"
1274                 ".arm                           \n\t"
1275         )
1276         TEST(   "blx    __dummy_thumb_subroutine_even")
1277
1278         TEST_X( "blx    __dummy_thumb_subroutine_odd",
1279                 ".thumb                         \n\t"
1280                 ".space 2                       \n\t"
1281                 ".type __dummy_thumb_subroutine_odd, %%function \n\t"
1282                 "__dummy_thumb_subroutine_odd:  \n\t"
1283                 "mov    r0, pc                  \n\t"
1284                 "bx     lr                      \n\t"
1285                 ".arm                           \n\t"
1286         )
1287         TEST(   "blx    __dummy_thumb_subroutine_odd")
1288 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1289
1290         COPROCESSOR_INSTRUCTIONS_ST_LD("2",f)
1291 #if __LINUX_ARM_ARCH__ >= 6
1292         COPROCESSOR_INSTRUCTIONS_MC_MR("2",f)
1293 #endif
1294
1295         TEST_GROUP("Miscellaneous instructions, memory hints, and Advanced SIMD instructions")
1296
1297 #if __LINUX_ARM_ARCH__ >= 6
1298         TEST_UNSUPPORTED("cps   0x13")
1299         TEST_UNSUPPORTED("cpsie i")
1300         TEST_UNSUPPORTED("cpsid i")
1301         TEST_UNSUPPORTED("cpsie i,0x13")
1302         TEST_UNSUPPORTED("cpsid i,0x13")
1303         TEST_UNSUPPORTED("setend        le")
1304         TEST_UNSUPPORTED("setend        be")
1305 #endif
1306
1307 #if __LINUX_ARM_ARCH__ >= 7
1308         TEST_P("pli     [r",0,0b,", #16]")
1309         TEST(  "pli     [pc, #0]")
1310         TEST_RR("pli    [r",12,0b,", r",0, 16,"]")
1311         TEST_RR("pli    [r",0, 0b,", -r",12,16,", lsl #4]")
1312 #endif
1313
1314 #if __LINUX_ARM_ARCH__ >= 5
1315         TEST_P("pld     [r",0,32,", #-16]")
1316         TEST(  "pld     [pc, #0]")
1317         TEST_PR("pld    [r",7, 24, ", r",0, 16,"]")
1318         TEST_PR("pld    [r",8, 24, ", -r",12,16,", lsl #4]")
1319 #endif
1320
1321 #if __LINUX_ARM_ARCH__ >= 7
1322         TEST_SUPPORTED(  __inst_arm(0xf590f000) "       @ pldw [r0, #0]")
1323         TEST_SUPPORTED(  __inst_arm(0xf797f000) "       @ pldw  [r7, r0]")
1324         TEST_SUPPORTED(  __inst_arm(0xf798f18c) "       @ pldw  [r8, r12, lsl #3]");
1325 #endif
1326
1327 #if __LINUX_ARM_ARCH__ >= 7
1328         TEST_UNSUPPORTED("clrex")
1329         TEST_UNSUPPORTED("dsb")
1330         TEST_UNSUPPORTED("dmb")
1331         TEST_UNSUPPORTED("isb")
1332 #endif
1333
1334         verbose("\n");
1335 }
1336