arch/arm/boot/dts/vf610.dtsi

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include "skeleton.dtsi"
  11 #include "vf610-pinfunc.h"
  12 #include <dt-bindings/clock/vf610-clock.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14
  15 / {
  16         aliases {
  17                 serial0 = &uart0;
  18                 serial1 = &uart1;
  19                 serial2 = &uart2;
  20                 serial3 = &uart3;
  21                 serial4 = &uart4;
  22                 serial5 = &uart5;
  23                 gpio0 = &gpio1;
  24                 gpio1 = &gpio2;
  25                 gpio2 = &gpio3;
  26                 gpio3 = &gpio4;
  27                 gpio4 = &gpio5;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         compatible = "arm,cortex-a5";
  36                         device_type = "cpu";
  37                         reg = <0x0>;
  38                         next-level-cache = <&L2>;
  39                 };
  40         };
  41
  42         clocks {
  43                 #address-cells = <1>;
  44                 #size-cells = <0>;
  45
  46                 sxosc {
  47                         compatible = "fixed-clock";
  48                         clock-frequency = <32768>;
  49                 };
  50
  51                 fxosc {
  52                         compatible = "fixed-clock";
  53                         clock-frequency = <24000000>;
  54                 };
  55         };
  56
  57         soc {
  58                 #address-cells = <1>;
  59                 #size-cells = <1>;
  60                 compatible = "simple-bus";
  61                 interrupt-parent = <&intc>;
  62                 ranges;
  63
  64                 aips0: aips-bus@40000000 {
  65                         compatible = "fsl,aips-bus", "simple-bus";
  66                         #address-cells = <1>;
  67                         #size-cells = <1>;
  68                         interrupt-parent = <&intc>;
  69                         reg = <0x40000000 0x70000>;
  70                         ranges;
  71
  72                         intc: interrupt-controller@40002000 {
  73                                 compatible = "arm,cortex-a9-gic";
  74                                 #interrupt-cells = <3>;
  75                                 #address-cells = <1>;
  76                                 #size-cells = <1>;
  77                                 interrupt-controller;
  78                                 reg = <0x40003000 0x1000>,
  79                                       <0x40002100 0x100>;
  80                         };
  81
  82                         L2: l2-cache@40006000 {
  83                                 compatible = "arm,pl310-cache";
  84                                 reg = <0x40006000 0x1000>;
  85                                 cache-unified;
  86                                 cache-level = <2>;
  87                                 arm,data-latency = <1 1 1>;
  88                                 arm,tag-latency = <2 2 2>;
  89                         };
  90
  91                         edma0: dma-controller@40018000 {
  92                                 #dma-cells = <2>;
  93                                 compatible = "fsl,vf610-edma";
  94                                 reg = <0x40018000 0x2000>,
  95                                         <0x40024000 0x1000>,
  96                                         <0x40025000 0x1000>;
  97                                 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
  98                                                 <0 9 IRQ_TYPE_LEVEL_HIGH>;
  99                                 interrupt-names = "edma-tx", "edma-err";
 100                                 dma-channels = <32>;
 101                                 clock-names = "dmamux0", "dmamux1";
 102                                 clocks = <&clks VF610_CLK_DMAMUX0>,
 103                                         <&clks VF610_CLK_DMAMUX1>;
 104                         };
 105
 106                         uart0: serial@40027000 {
 107                                 compatible = "fsl,vf610-lpuart";
 108                                 reg = <0x40027000 0x1000>;
 109                                 interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
 110                                 clocks = <&clks VF610_CLK_UART0>;
 111                                 clock-names = "ipg";
 112                                 dmas = <&edma0 0 2>,
 113                                         <&edma0 0 3>;
 114                                 dma-names = "rx","tx";
 115                                 status = "disabled";
 116                         };
 117
 118                         uart1: serial@40028000 {
 119                                 compatible = "fsl,vf610-lpuart";
 120                                 reg = <0x40028000 0x1000>;
 121                                 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
 122                                 clocks = <&clks VF610_CLK_UART1>;
 123                                 clock-names = "ipg";
 124                                 dmas = <&edma0 0 4>,
 125                                         <&edma0 0 5>;
 126                                 dma-names = "rx","tx";
 127                                 status = "disabled";
 128                         };
 129
 130                         uart2: serial@40029000 {
 131                                 compatible = "fsl,vf610-lpuart";
 132                                 reg = <0x40029000 0x1000>;
 133                                 interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
 134                                 clocks = <&clks VF610_CLK_UART2>;
 135                                 clock-names = "ipg";
 136                                 dmas = <&edma0 0 6>,
 137                                         <&edma0 0 7>;
 138                                 dma-names = "rx","tx";
 139                                 status = "disabled";
 140                         };
 141
 142                         uart3: serial@4002a000 {
 143                                 compatible = "fsl,vf610-lpuart";
 144                                 reg = <0x4002a000 0x1000>;
 145                                 interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
 146                                 clocks = <&clks VF610_CLK_UART3>;
 147                                 clock-names = "ipg";
 148                                 dmas = <&edma0 0 8>,
 149                                         <&edma0 0 9>;
 150                                 dma-names = "rx","tx";
 151                                 status = "disabled";
 152                         };
 153
 154                         dspi0: dspi0@4002c000 {
 155                                 #address-cells = <1>;
 156                                 #size-cells = <0>;
 157                                 compatible = "fsl,vf610-dspi";
 158                                 reg = <0x4002c000 0x1000>;
 159                                 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
 160                                 clocks = <&clks VF610_CLK_DSPI0>;
 161                                 clock-names = "dspi";
 162                                 spi-num-chipselects = <5>;
 163                                 status = "disabled";
 164                         };
 165
 166                         sai2: sai@40031000 {
 167                                 compatible = "fsl,vf610-sai";
 168                                 reg = <0x40031000 0x1000>;
 169                                 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
 170                                 clocks = <&clks VF610_CLK_SAI2>;
 171                                 clock-names = "sai";
 172                                 dma-names = "tx", "rx";
 173                                 dmas = <&edma0 0 21>,
 174                                         <&edma0 0 20>;
 175                                 status = "disabled";
 176                         };
 177
 178                         pit: pit@40037000 {
 179                                 compatible = "fsl,vf610-pit";
 180                                 reg = <0x40037000 0x1000>;
 181                                 interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
 182                                 clocks = <&clks VF610_CLK_PIT>;
 183                                 clock-names = "pit";
 184                         };
 185
 186                         adc0: adc@4003b000 {
 187                                 compatible = "fsl,vf610-adc";
 188                                 reg = <0x4003b000 0x1000>;
 189                                 interrupts = <0 53 0x04>;
 190                                 clocks = <&clks VF610_CLK_ADC0>;
 191                                 clock-names = "adc";
 192                                 status = "disabled";
 193                         };
 194
 195                         wdog@4003e000 {
 196                                 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
 197                                 reg = <0x4003e000 0x1000>;
 198                                 clocks = <&clks VF610_CLK_WDT>;
 199                                 clock-names = "wdog";
 200                         };
 201
 202                         qspi0: quadspi@40044000 {
 203                                 #address-cells = <1>;
 204                                 #size-cells = <0>;
 205                                 compatible = "fsl,vf610-qspi";
 206                                 reg = <0x40044000 0x1000>;
 207                                 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
 208                                 clocks = <&clks VF610_CLK_QSPI0_EN>,
 209                                         <&clks VF610_CLK_QSPI0>;
 210                                 clock-names = "qspi_en", "qspi";
 211                                 status = "disabled";
 212                         };
 213
 214                         iomuxc: iomuxc@40048000 {
 215                                 compatible = "fsl,vf610-iomuxc";
 216                                 reg = <0x40048000 0x1000>;
 217                                 #gpio-range-cells = <3>;
 218                         };
 219
 220                         gpio1: gpio@40049000 {
 221                                 compatible = "fsl,vf610-gpio";
 222                                 reg = <0x40049000 0x1000 0x400ff000 0x40>;
 223                                 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
 224                                 gpio-controller;
 225                                 #gpio-cells = <2>;
 226                                 interrupt-controller;
 227                                 #interrupt-cells = <2>;
 228                                 gpio-ranges = <&iomuxc 0 0 32>;
 229                         };
 230
 231                         gpio2: gpio@4004a000 {
 232                                 compatible = "fsl,vf610-gpio";
 233                                 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
 234                                 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
 235                                 gpio-controller;
 236                                 #gpio-cells = <2>;
 237                                 interrupt-controller;
 238                                 #interrupt-cells = <2>;
 239                                 gpio-ranges = <&iomuxc 0 32 32>;
 240                         };
 241
 242                         gpio3: gpio@4004b000 {
 243                                 compatible = "fsl,vf610-gpio";
 244                                 reg = <0x4004b000 0x1000 0x400ff080 0x40>;
 245                                 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
 246                                 gpio-controller;
 247                                 #gpio-cells = <2>;
 248                                 interrupt-controller;
 249                                 #interrupt-cells = <2>;
 250                                 gpio-ranges = <&iomuxc 0 64 32>;
 251                         };
 252
 253                         gpio4: gpio@4004c000 {
 254                                 compatible = "fsl,vf610-gpio";
 255                                 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
 256                                 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
 257                                 gpio-controller;
 258                                 #gpio-cells = <2>;
 259                                 interrupt-controller;
 260                                 #interrupt-cells = <2>;
 261                                 gpio-ranges = <&iomuxc 0 96 32>;
 262                         };
 263
 264                         gpio5: gpio@4004d000 {
 265                                 compatible = "fsl,vf610-gpio";
 266                                 reg = <0x4004d000 0x1000 0x400ff100 0x40>;
 267                                 interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
 268                                 gpio-controller;
 269                                 #gpio-cells = <2>;
 270                                 interrupt-controller;
 271                                 #interrupt-cells = <2>;
 272                                 gpio-ranges = <&iomuxc 0 128 7>;
 273                         };
 274
 275                         anatop@40050000 {
 276                                 compatible = "fsl,vf610-anatop";
 277                                 reg = <0x40050000 0x1000>;
 278                         };
 279
 280                         i2c0: i2c@40066000 {
 281                                 #address-cells = <1>;
 282                                 #size-cells = <0>;
 283                                 compatible = "fsl,vf610-i2c";
 284                                 reg = <0x40066000 0x1000>;
 285                                 interrupts =<0 71 IRQ_TYPE_LEVEL_HIGH>;
 286                                 clocks = <&clks VF610_CLK_I2C0>;
 287                                 clock-names = "ipg";
 288                                 dmas = <&edma0 0 50>,
 289                                         <&edma0 0 51>;
 290                                 dma-names = "rx","tx";
 291                                 status = "disabled";
 292                         };
 293
 294                         clks: ccm@4006b000 {
 295                                 compatible = "fsl,vf610-ccm";
 296                                 reg = <0x4006b000 0x1000>;
 297                                 #clock-cells = <1>;
 298                         };
 299                 };
 300
 301                 aips1: aips-bus@40080000 {
 302                         compatible = "fsl,aips-bus", "simple-bus";
 303                         #address-cells = <1>;
 304                         #size-cells = <1>;
 305                         reg = <0x40080000 0x80000>;
 306                         ranges;
 307
 308                         edma1: dma-controller@40098000 {
 309                                 #dma-cells = <2>;
 310                                 compatible = "fsl,vf610-edma";
 311                                 reg = <0x40098000 0x2000>,
 312                                         <0x400a1000 0x1000>,
 313                                         <0x400a2000 0x1000>;
 314                                 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>,
 315                                                 <0 11 IRQ_TYPE_LEVEL_HIGH>;
 316                                 interrupt-names = "edma-tx", "edma-err";
 317                                 dma-channels = <32>;
 318                                 clock-names = "dmamux0", "dmamux1";
 319                                 clocks = <&clks VF610_CLK_DMAMUX2>,
 320                                         <&clks VF610_CLK_DMAMUX3>;
 321                         };
 322
 323                         uart4: serial@400a9000 {
 324                                 compatible = "fsl,vf610-lpuart";
 325                                 reg = <0x400a9000 0x1000>;
 326                                 interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
 327                                 clocks = <&clks VF610_CLK_UART4>;
 328                                 clock-names = "ipg";
 329                                 status = "disabled";
 330                         };
 331
 332                         uart5: serial@400aa000 {
 333                                 compatible = "fsl,vf610-lpuart";
 334                                 reg = <0x400aa000 0x1000>;
 335                                 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
 336                                 clocks = <&clks VF610_CLK_UART5>;
 337                                 clock-names = "ipg";
 338                                 status = "disabled";
 339                         };
 340
 341                         adc1: adc@400bb000 {
 342                                 compatible = "fsl,vf610-adc";
 343                                 reg = <0x400bb000 0x1000>;
 344                                 interrupts = <0 54 0x04>;
 345                                 clocks = <&clks VF610_CLK_ADC1>;
 346                                 clock-names = "adc";
 347                                 status = "disabled";
 348                         };
 349
 350                         fec0: ethernet@400d0000 {
 351                                 compatible = "fsl,mvf600-fec";
 352                                 reg = <0x400d0000 0x1000>;
 353                                 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
 354                                 clocks = <&clks VF610_CLK_ENET0>,
 355                                         <&clks VF610_CLK_ENET0>,
 356                                         <&clks VF610_CLK_ENET>;
 357                                 clock-names = "ipg", "ahb", "ptp";
 358                                 status = "disabled";
 359                         };
 360
 361                         fec1: ethernet@400d1000 {
 362                                 compatible = "fsl,mvf600-fec";
 363                                 reg = <0x400d1000 0x1000>;
 364                                 interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
 365                                 clocks = <&clks VF610_CLK_ENET1>,
 366                                         <&clks VF610_CLK_ENET1>,
 367                                         <&clks VF610_CLK_ENET>;
 368                                 clock-names = "ipg", "ahb", "ptp";
 369                                 status = "disabled";
 370                         };
 371                 };
 372         };
 373 };