Merge remote-tracking branches 'asoc/topic/wm5100', 'asoc/topic/wm8523', 'asoc/topic...
[linux.git] / arch / arm / boot / dts / tegra124-venice2.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include "tegra124.dtsi"
5
6 / {
7         model = "NVIDIA Tegra124 Venice2";
8         compatible = "nvidia,venice2", "nvidia,tegra124";
9
10         aliases {
11                 rtc0 = "/i2c@7000d000/as3722@40";
12                 rtc1 = "/rtc@7000e000";
13         };
14
15         memory {
16                 reg = <0x80000000 0x80000000>;
17         };
18
19         pinmux: pinmux@70000868 {
20                 pinctrl-names = "default";
21                 pinctrl-0 = <&pinmux_default>;
22
23                 pinmux_default: common {
24                         dap_mclk1_pw4 {
25                                 nvidia,pins = "dap_mclk1_pw4";
26                                 nvidia,function = "extperiph1";
27                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
28                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
29                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
30                         };
31                         dap1_din_pn1 {
32                                 nvidia,pins = "dap1_din_pn1";
33                                 nvidia,function = "i2s0";
34                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
35                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
36                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
37                         };
38                         dap1_dout_pn2 {
39                                 nvidia,pins = "dap1_dout_pn2",
40                                               "dap1_fs_pn0",
41                                               "dap1_sclk_pn3";
42                                 nvidia,function = "i2s0";
43                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
44                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
45                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
46                         };
47                         dap2_din_pa4 {
48                                 nvidia,pins = "dap2_din_pa4";
49                                 nvidia,function = "i2s1";
50                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
51                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
52                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
53                         };
54                         dap2_dout_pa5 {
55                                 nvidia,pins = "dap2_dout_pa5",
56                                               "dap2_fs_pa2",
57                                               "dap2_sclk_pa3";
58                                 nvidia,function = "i2s1";
59                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
60                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
61                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
62                         };
63                         dvfs_pwm_px0 {
64                                 nvidia,pins = "dvfs_pwm_px0",
65                                               "dvfs_clk_px2";
66                                 nvidia,function = "cldvfs";
67                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
68                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
69                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
70                         };
71                         ulpi_clk_py0 {
72                                 nvidia,pins = "ulpi_clk_py0",
73                                               "ulpi_nxt_py2",
74                                               "ulpi_stp_py3";
75                                 nvidia,function = "spi1";
76                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
77                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
78                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
79                         };
80                         ulpi_dir_py1 {
81                                 nvidia,pins = "ulpi_dir_py1";
82                                 nvidia,function = "spi1";
83                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
84                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
85                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
86                         };
87                         cam_i2c_scl_pbb1 {
88                                 nvidia,pins = "cam_i2c_scl_pbb1",
89                                               "cam_i2c_sda_pbb2";
90                                 nvidia,function = "i2c3";
91                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
92                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
93                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
94                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
95                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
96                         };
97                         gen2_i2c_scl_pt5 {
98                                 nvidia,pins = "gen2_i2c_scl_pt5",
99                                               "gen2_i2c_sda_pt6";
100                                 nvidia,function = "i2c2";
101                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
102                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
103                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
104                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
105                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
106                         };
107                         pg4 {
108                                 nvidia,pins = "pg4",
109                                               "pg5",
110                                               "pg6",
111                                               "pi3";
112                                 nvidia,function = "spi4";
113                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
114                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
115                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
116                         };
117                         pg7 {
118                                 nvidia,pins = "pg7";
119                                 nvidia,function = "spi4";
120                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
121                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
122                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
123                         };
124                         ph1 {
125                                 nvidia,pins = "ph1";
126                                 nvidia,function = "pwm1";
127                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
128                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
129                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
130                         };
131                         pk0 {
132                                 nvidia,pins = "pk0",
133                                               "kb_row15_ps7",
134                                               "clk_32k_out_pa0";
135                                 nvidia,function = "soc";
136                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
137                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
138                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
139                         };
140                         sdmmc1_clk_pz0 {
141                                 nvidia,pins = "sdmmc1_clk_pz0",
142                                               "sdmmc1_cmd_pz1",
143                                               "sdmmc1_dat0_py7",
144                                               "sdmmc1_dat1_py6",
145                                               "sdmmc1_dat2_py5",
146                                               "sdmmc1_dat3_py4";
147                                 nvidia,function = "sdmmc1";
148                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
149                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
150                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
151                         };
152                         sdmmc1_cmd_pz1 {
153                                 nvidia,pins = "sdmmc1_cmd_pz1",
154                                               "sdmmc1_dat0_py7",
155                                               "sdmmc1_dat1_py6",
156                                               "sdmmc1_dat2_py5",
157                                               "sdmmc1_dat3_py4";
158                                 nvidia,function = "sdmmc1";
159                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
160                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
161                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
162                         };
163                         sdmmc3_clk_pa6 {
164                                 nvidia,pins = "sdmmc3_clk_pa6";
165                                 nvidia,function = "sdmmc3";
166                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
167                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
168                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
169                         };
170                         sdmmc3_cmd_pa7 {
171                                 nvidia,pins = "sdmmc3_cmd_pa7",
172                                               "sdmmc3_dat0_pb7",
173                                               "sdmmc3_dat1_pb6",
174                                               "sdmmc3_dat2_pb5",
175                                               "sdmmc3_dat3_pb4",
176                                               "sdmmc3_clk_lb_out_pee4",
177                                               "sdmmc3_clk_lb_in_pee5";
178                                 nvidia,function = "sdmmc3";
179                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
180                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
181                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
182                         };
183                         sdmmc4_clk_pcc4 {
184                                 nvidia,pins = "sdmmc4_clk_pcc4";
185                                 nvidia,function = "sdmmc4";
186                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
187                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
188                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
189                         };
190                         sdmmc4_cmd_pt7 {
191                                 nvidia,pins = "sdmmc4_cmd_pt7",
192                                               "sdmmc4_dat0_paa0",
193                                               "sdmmc4_dat1_paa1",
194                                               "sdmmc4_dat2_paa2",
195                                               "sdmmc4_dat3_paa3",
196                                               "sdmmc4_dat4_paa4",
197                                               "sdmmc4_dat5_paa5",
198                                               "sdmmc4_dat6_paa6",
199                                               "sdmmc4_dat7_paa7";
200                                 nvidia,function = "sdmmc4";
201                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
202                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
203                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
204                         };
205                         pwr_i2c_scl_pz6 {
206                                 nvidia,pins = "pwr_i2c_scl_pz6",
207                                               "pwr_i2c_sda_pz7";
208                                 nvidia,function = "i2cpwr";
209                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
210                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
211                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
212                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
213                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
214                         };
215                         jtag_rtck {
216                                 nvidia,pins = "jtag_rtck";
217                                 nvidia,function = "rtck";
218                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
219                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
220                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
221                         };
222                         clk_32k_in {
223                                 nvidia,pins = "clk_32k_in";
224                                 nvidia,function = "clk";
225                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
226                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
227                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
228                         };
229                         core_pwr_req {
230                                 nvidia,pins = "core_pwr_req";
231                                 nvidia,function = "pwron";
232                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
233                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
234                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
235                         };
236                         cpu_pwr_req {
237                                 nvidia,pins = "cpu_pwr_req";
238                                 nvidia,function = "cpu";
239                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
240                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
241                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
242                         };
243                         pwr_int_n {
244                                 nvidia,pins = "pwr_int_n";
245                                 nvidia,function = "pmi";
246                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
247                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
248                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
249                         };
250                         reset_out_n {
251                                 nvidia,pins = "reset_out_n";
252                                 nvidia,function = "reset_out_n";
253                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
254                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
255                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
256                         };
257                         clk3_out_pee0 {
258                                 nvidia,pins = "clk3_out_pee0";
259                                 nvidia,function = "extperiph3";
260                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
261                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
262                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
263                         };
264                         dap4_din_pp5 {
265                                 nvidia,pins = "dap4_din_pp5";
266                                 nvidia,function = "i2s3";
267                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
268                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
269                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
270                         };
271                         dap4_dout_pp6 {
272                                 nvidia,pins = "dap4_dout_pp6",
273                                               "dap4_fs_pp4",
274                                               "dap4_sclk_pp7";
275                                 nvidia,function = "i2s3";
276                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
277                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
278                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
279                         };
280                         gen1_i2c_sda_pc5 {
281                                 nvidia,pins = "gen1_i2c_sda_pc5",
282                                               "gen1_i2c_scl_pc4";
283                                 nvidia,function = "i2c1";
284                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
285                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
286                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
287                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
288                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
289                         };
290                         uart2_cts_n_pj5 {
291                                 nvidia,pins = "uart2_cts_n_pj5";
292                                 nvidia,function = "uartb";
293                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
294                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
295                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
296                         };
297                         uart2_rts_n_pj6 {
298                                 nvidia,pins = "uart2_rts_n_pj6";
299                                 nvidia,function = "uartb";
300                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
301                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
302                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
303                         };
304                         uart2_rxd_pc3 {
305                                 nvidia,pins = "uart2_rxd_pc3";
306                                 nvidia,function = "irda";
307                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
308                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
309                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
310                         };
311                         uart2_txd_pc2 {
312                                 nvidia,pins = "uart2_txd_pc2";
313                                 nvidia,function = "irda";
314                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
315                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
316                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
317                         };
318                         uart3_cts_n_pa1 {
319                                 nvidia,pins = "uart3_cts_n_pa1",
320                                               "uart3_rxd_pw7";
321                                 nvidia,function = "uartc";
322                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
323                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
324                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
325                         };
326                         uart3_rts_n_pc0 {
327                                 nvidia,pins = "uart3_rts_n_pc0",
328                                               "uart3_txd_pw6";
329                                 nvidia,function = "uartc";
330                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
331                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
332                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
333                         };
334                         hdmi_cec_pee3 {
335                                 nvidia,pins = "hdmi_cec_pee3";
336                                 nvidia,function = "cec";
337                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
338                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
339                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
340                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
341                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
342                         };
343                         hdmi_int_pn7 {
344                                 nvidia,pins = "hdmi_int_pn7";
345                                 nvidia,function = "rsvd1";
346                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
347                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
348                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
349                         };
350                         ddc_scl_pv4 {
351                                 nvidia,pins = "ddc_scl_pv4",
352                                               "ddc_sda_pv5";
353                                 nvidia,function = "i2c4";
354                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
355                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
356                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
357                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
358                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
359                         };
360                         pj7 {
361                                 nvidia,pins = "pj7",
362                                               "pk7";
363                                 nvidia,function = "uartd";
364                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
365                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
366                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
367                         };
368                         pb0 {
369                                 nvidia,pins = "pb0",
370                                               "pb1";
371                                 nvidia,function = "uartd";
372                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
373                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
374                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
375                         };
376                         ph0 {
377                                 nvidia,pins = "ph0";
378                                 nvidia,function = "pwm0";
379                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
380                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
381                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
382                         };
383                         kb_row10_ps2 {
384                                 nvidia,pins = "kb_row10_ps2";
385                                 nvidia,function = "uarta";
386                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
387                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
388                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
389                         };
390                         kb_row9_ps1 {
391                                 nvidia,pins = "kb_row9_ps1";
392                                 nvidia,function = "uarta";
393                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
394                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
395                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
396                         };
397                         kb_row6_pr6 {
398                                 nvidia,pins = "kb_row6_pr6";
399                                 nvidia,function = "displaya_alt";
400                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
401                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
402                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
403                         };
404                         usb_vbus_en0_pn4 {
405                                 nvidia,pins = "usb_vbus_en0_pn4";
406                                 nvidia,function = "usb";
407                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
408                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
409                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
410                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
411                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
412                         };
413                         usb_vbus_en1_pn5 {
414                                 nvidia,pins = "usb_vbus_en1_pn5";
415                                 nvidia,function = "usb";
416                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
417                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
418                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
419                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
420                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
421                         };
422                         drive_sdio1 {
423                                 nvidia,pins = "drive_sdio1";
424                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
425                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
426                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
427                                 nvidia,pull-down-strength = <32>;
428                                 nvidia,pull-up-strength = <42>;
429                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
430                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
431                         };
432                         drive_sdio3 {
433                                 nvidia,pins = "drive_sdio3";
434                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
435                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
436                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
437                                 nvidia,pull-down-strength = <20>;
438                                 nvidia,pull-up-strength = <36>;
439                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
440                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
441                         };
442                         drive_gma {
443                                 nvidia,pins = "drive_gma";
444                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
445                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
446                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
447                                 nvidia,pull-down-strength = <1>;
448                                 nvidia,pull-up-strength = <2>;
449                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
450                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
451                                 nvidia,drive-type = <1>;
452                         };
453                         als_irq_l {
454                                 nvidia,pins = "gpio_x3_aud_px3";
455                                 nvidia,function = "gmi";
456                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
457                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
458                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
459                         };
460                         codec_irq_l {
461                                 nvidia,pins = "ph4";
462                                 nvidia,function = "gmi";
463                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
464                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
465                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
466                         };
467                         lcd_bl_en {
468                                 nvidia,pins = "ph2";
469                                 nvidia,function = "gmi";
470                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
471                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
472                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
473                         };
474                         touch_irq_l {
475                                 nvidia,pins = "gpio_w3_aud_pw3";
476                                 nvidia,function = "spi6";
477                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
478                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
479                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
480                         };
481                         tpm_davint_l {
482                                 nvidia,pins = "ph6";
483                                 nvidia,function = "gmi";
484                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
485                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
486                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
487                         };
488                         ts_irq_l {
489                                 nvidia,pins = "pk2";
490                                 nvidia,function = "gmi";
491                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
492                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
493                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
494                         };
495                         ts_reset_l {
496                                 nvidia,pins = "pk4";
497                                 nvidia,function = "gmi";
498                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
499                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
500                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
501                         };
502                         ts_shdn_l {
503                                 nvidia,pins = "pk1";
504                                 nvidia,function = "gmi";
505                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
506                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
507                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
508                         };
509                         ph7 {
510                                 nvidia,pins = "ph7";
511                                 nvidia,function = "gmi";
512                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
513                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
514                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
515                         };
516                         kb_col0_ap {
517                                 nvidia,pins = "kb_col0_pq0";
518                                 nvidia,function = "rsvd4";
519                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
520                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
521                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522                         };
523                         lid_open {
524                                 nvidia,pins = "kb_row4_pr4";
525                                 nvidia,function = "rsvd3";
526                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
527                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
528                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
529                         };
530                         en_vdd_sd {
531                                 nvidia,pins = "kb_row0_pr0";
532                                 nvidia,function = "rsvd4";
533                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
534                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
535                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
536                         };
537                         ac_ok {
538                                 nvidia,pins = "pj0";
539                                 nvidia,function = "gmi";
540                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
541                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
542                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
543                         };
544                         sensor_irq_l {
545                                 nvidia,pins = "pi6";
546                                 nvidia,function = "gmi";
547                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
548                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
549                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
550                         };
551                         wifi_en {
552                                 nvidia,pins = "gpio_x7_aud_px7";
553                                 nvidia,function = "rsvd4";
554                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
555                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
556                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
557                         };
558                         wifi_rst_l {
559                                 nvidia,pins = "clk2_req_pcc5";
560                                 nvidia,function = "dap";
561                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
562                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
563                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
564                         };
565                         hp_det_l {
566                                 nvidia,pins = "ulpi_data1_po2";
567                                 nvidia,function = "spi3";
568                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
569                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
570                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
571                         };
572                 };
573         };
574
575         serial@70006000 {
576                 status = "okay";
577         };
578
579         pwm: pwm@7000a000 {
580                 status = "okay";
581         };
582
583         i2c@7000c000 {
584                 status = "okay";
585                 clock-frequency = <100000>;
586
587                 acodec: audio-codec@10 {
588                         compatible = "maxim,max98090";
589                         reg = <0x10>;
590                         interrupt-parent = <&gpio>;
591                         interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
592                 };
593         };
594
595         i2c@7000c400 {
596                 status = "okay";
597                 clock-frequency = <100000>;
598         };
599
600         i2c@7000c500 {
601                 status = "okay";
602                 clock-frequency = <100000>;
603         };
604
605         i2c@7000c700 {
606                 status = "okay";
607                 clock-frequency = <100000>;
608         };
609
610         i2c@7000d000 {
611                 status = "okay";
612                 clock-frequency = <400000>;
613
614                 as3722: as3722@40 {
615                         compatible = "ams,as3722";
616                         reg = <0x40>;
617                         interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
618
619                         #interrupt-cells = <2>;
620                         interrupt-controller;
621
622                         gpio-controller;
623                         #gpio-cells = <2>;
624
625                         pinctrl-names = "default";
626                         pinctrl-0 = <&as3722_default>;
627
628                         as3722_default: pinmux {
629                                 gpio0 {
630                                         pins = "gpio0";
631                                         function = "gpio";
632                                         bias-pull-down;
633                                 };
634
635                                 gpio1_2_4_7 {
636                                         pins = "gpio1", "gpio2", "gpio4", "gpio7";
637                                         function = "gpio";
638                                         bias-pull-up;
639                                 };
640
641                                 gpio3_6 {
642                                         pins = "gpio3", "gpio6";
643                                         bias-high-impedance;
644                                 };
645
646                                 gpio5 {
647                                         pins = "gpio5";
648                                         function = "clk32k-out";
649                                 };
650                         };
651
652                         regulators {
653                                 vsup-sd2-supply = <&vdd_ac_bat_reg>;
654                                 vsup-sd3-supply = <&vdd_ac_bat_reg>;
655                                 vsup-sd4-supply = <&vdd_ac_bat_reg>;
656                                 vsup-sd5-supply = <&vdd_ac_bat_reg>;
657                                 vin-ldo0-supply = <&as3722_sd2>;
658                                 vin-ldo1-6-supply = <&vdd_ac_bat_reg>;
659                                 vin-ldo2-5-7-supply = <&as3722_sd5>;
660                                 vin-ldo3-4-supply = <&vdd_ac_bat_reg>;
661                                 vin-ldo9-10-supply = <&vdd_ac_bat_reg>;
662                                 vin-ldo11-supply = <&vdd_ac_bat_reg>;
663
664                                 sd0 {
665                                         regulator-name = "vdd-cpu";
666                                         regulator-min-microvolt = <700000>;
667                                         regulator-max-microvolt = <1400000>;
668                                         regulator-min-microamp = <3500000>;
669                                         regulator-max-microamp = <3500000>;
670                                         regulator-always-on;
671                                         regulator-boot-on;
672                                         ams,external-control = <2>;
673                                 };
674
675                                 sd1 {
676                                         regulator-name = "vdd-core";
677                                         regulator-min-microvolt = <700000>;
678                                         regulator-max-microvolt = <1350000>;
679                                         regulator-min-microamp = <2500000>;
680                                         regulator-max-microamp = <2500000>;
681                                         regulator-always-on;
682                                         regulator-boot-on;
683                                         ams,external-control = <1>;
684                                 };
685
686                                 as3722_sd2: sd2 {
687                                         regulator-name = "vddio-ddr";
688                                         regulator-min-microvolt = <1350000>;
689                                         regulator-max-microvolt = <1350000>;
690                                         regulator-always-on;
691                                         regulator-boot-on;
692                                 };
693
694                                 sd3 {
695                                         regulator-name = "vddio-ddr-2phase";
696                                         regulator-min-microvolt = <1350000>;
697                                         regulator-max-microvolt = <1350000>;
698                                         regulator-always-on;
699                                         regulator-boot-on;
700                                 };
701
702                                 sd4 {
703                                         regulator-name = "avdd-pex-sata";
704                                         regulator-min-microvolt = <1050000>;
705                                         regulator-max-microvolt = <1050000>;
706                                         regulator-boot-on;
707                                         regulator-always-on;
708                                 };
709
710                                 as3722_sd5: sd5 {
711                                         regulator-name = "vddio-sys";
712                                         regulator-min-microvolt = <1800000>;
713                                         regulator-max-microvolt = <1800000>;
714                                         regulator-boot-on;
715                                         regulator-always-on;
716                                 };
717
718                                 sd6 {
719                                         regulator-name = "vdd-gpu";
720                                         regulator-min-microvolt = <650000>;
721                                         regulator-max-microvolt = <1200000>;
722                                         regulator-min-microamp = <3500000>;
723                                         regulator-max-microamp = <3500000>;
724                                         regulator-boot-on;
725                                         regulator-always-on;
726                                 };
727
728                                 ldo0 {
729                                         regulator-name = "avdd_pll";
730                                         regulator-min-microvolt = <1050000>;
731                                         regulator-max-microvolt = <1050000>;
732                                         regulator-boot-on;
733                                         regulator-always-on;
734                                         ams,external-control = <1>;
735                                 };
736
737                                 ldo1 {
738                                         regulator-name = "run-cam-1.8";
739                                         regulator-min-microvolt = <1800000>;
740                                         regulator-max-microvolt = <1800000>;
741                                 };
742
743                                 ldo2 {
744                                         regulator-name = "gen-avdd,vddio-hsic";
745                                         regulator-min-microvolt = <1200000>;
746                                         regulator-max-microvolt = <1200000>;
747                                         regulator-boot-on;
748                                         regulator-always-on;
749                                 };
750
751                                 ldo3 {
752                                         regulator-name = "vdd-rtc";
753                                         regulator-min-microvolt = <1000000>;
754                                         regulator-max-microvolt = <1000000>;
755                                         regulator-boot-on;
756                                         regulator-always-on;
757                                         ams,enable-tracking;
758                                 };
759
760                                 ldo4 {
761                                         regulator-name = "vdd-cam";
762                                         regulator-min-microvolt = <2800000>;
763                                         regulator-max-microvolt = <2800000>;
764                                         regulator-boot-on;
765                                         regulator-always-on;
766                                 };
767
768                                 ldo5 {
769                                         regulator-name = "vdd-cam-front";
770                                         regulator-min-microvolt = <1200000>;
771                                         regulator-max-microvolt = <1200000>;
772                                 };
773
774                                 ldo6 {
775                                         regulator-name = "vddio-sdmmc3";
776                                         regulator-min-microvolt = <1800000>;
777                                         regulator-max-microvolt = <3300000>;
778                                         regulator-boot-on;
779                                         regulator-always-on;
780                                 };
781
782                                 ldo7 {
783                                         regulator-name = "vdd-cam-rear";
784                                         regulator-min-microvolt = <1050000>;
785                                         regulator-max-microvolt = <1050000>;
786                                 };
787
788                                 ldo9 {
789                                         regulator-name = "vdd-touch";
790                                         regulator-min-microvolt = <2800000>;
791                                         regulator-max-microvolt = <2800000>;
792                                 };
793
794                                 ldo10 {
795                                         regulator-name = "vdd-cam-af";
796                                         regulator-min-microvolt = <2800000>;
797                                         regulator-max-microvolt = <2800000>;
798                                 };
799
800                                 ldo11 {
801                                         regulator-name = "vpp-fuse";
802                                         regulator-min-microvolt = <1800000>;
803                                         regulator-max-microvolt = <1800000>;
804                                 };
805                         };
806                 };
807         };
808
809         spi@7000d400 {
810                 status = "okay";
811
812                 cros-ec@0 {
813                         compatible = "google,cros-ec-spi";
814                         spi-max-frequency = <4000000>;
815                         interrupt-parent = <&gpio>;
816                         interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
817                         reg = <0>;
818
819                         google,cros-ec-spi-msg-delay = <2000>;
820
821                         cros-ec-keyb {
822                                 compatible = "google,cros-ec-keyb";
823                                 keypad,num-rows = <8>;
824                                 keypad,num-columns = <13>;
825                                 google,needs-ghost-filter;
826
827                                 linux,keymap = <
828                                         MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA)
829                                         MATRIX_KEY(0x00, 0x02, KEY_F1)
830                                         MATRIX_KEY(0x00, 0x03, KEY_B)
831                                         MATRIX_KEY(0x00, 0x04, KEY_F10)
832                                         MATRIX_KEY(0x00, 0x06, KEY_N)
833                                         MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
834                                         MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
835
836                                         MATRIX_KEY(0x01, 0x01, KEY_ESC)
837                                         MATRIX_KEY(0x01, 0x02, KEY_F4)
838                                         MATRIX_KEY(0x01, 0x03, KEY_G)
839                                         MATRIX_KEY(0x01, 0x04, KEY_F7)
840                                         MATRIX_KEY(0x01, 0x06, KEY_H)
841                                         MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)
842                                         MATRIX_KEY(0x01, 0x09, KEY_F9)
843                                         MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)
844
845                                         MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)
846                                         MATRIX_KEY(0x02, 0x01, KEY_TAB)
847                                         MATRIX_KEY(0x02, 0x02, KEY_F3)
848                                         MATRIX_KEY(0x02, 0x03, KEY_T)
849                                         MATRIX_KEY(0x02, 0x04, KEY_F6)
850                                         MATRIX_KEY(0x02, 0x05, KEY_RIGHTBRACE)
851                                         MATRIX_KEY(0x02, 0x06, KEY_Y)
852                                         MATRIX_KEY(0x02, 0x07, KEY_102ND)
853                                         MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)
854                                         MATRIX_KEY(0x02, 0x09, KEY_F8)
855
856                                         MATRIX_KEY(0x03, 0x01, KEY_GRAVE)
857                                         MATRIX_KEY(0x03, 0x02, KEY_F2)
858                                         MATRIX_KEY(0x03, 0x03, KEY_5)
859                                         MATRIX_KEY(0x03, 0x04, KEY_F5)
860                                         MATRIX_KEY(0x03, 0x06, KEY_6)
861                                         MATRIX_KEY(0x03, 0x08, KEY_MINUS)
862                                         MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
863
864                                         MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)
865                                         MATRIX_KEY(0x04, 0x01, KEY_A)
866                                         MATRIX_KEY(0x04, 0x02, KEY_D)
867                                         MATRIX_KEY(0x04, 0x03, KEY_F)
868                                         MATRIX_KEY(0x04, 0x04, KEY_S)
869                                         MATRIX_KEY(0x04, 0x05, KEY_K)
870                                         MATRIX_KEY(0x04, 0x06, KEY_J)
871                                         MATRIX_KEY(0x04, 0x08, KEY_SEMICOLON)
872                                         MATRIX_KEY(0x04, 0x09, KEY_L)
873                                         MATRIX_KEY(0x04, 0x0a, KEY_BACKSLASH)
874                                         MATRIX_KEY(0x04, 0x0b, KEY_ENTER)
875
876                                         MATRIX_KEY(0x05, 0x01, KEY_Z)
877                                         MATRIX_KEY(0x05, 0x02, KEY_C)
878                                         MATRIX_KEY(0x05, 0x03, KEY_V)
879                                         MATRIX_KEY(0x05, 0x04, KEY_X)
880                                         MATRIX_KEY(0x05, 0x05, KEY_COMMA)
881                                         MATRIX_KEY(0x05, 0x06, KEY_M)
882                                         MATRIX_KEY(0x05, 0x07, KEY_LEFTSHIFT)
883                                         MATRIX_KEY(0x05, 0x08, KEY_SLASH)
884                                         MATRIX_KEY(0x05, 0x09, KEY_DOT)
885                                         MATRIX_KEY(0x05, 0x0b, KEY_SPACE)
886
887                                         MATRIX_KEY(0x06, 0x01, KEY_1)
888                                         MATRIX_KEY(0x06, 0x02, KEY_3)
889                                         MATRIX_KEY(0x06, 0x03, KEY_4)
890                                         MATRIX_KEY(0x06, 0x04, KEY_2)
891                                         MATRIX_KEY(0x06, 0x05, KEY_8)
892                                         MATRIX_KEY(0x06, 0x06, KEY_7)
893                                         MATRIX_KEY(0x06, 0x08, KEY_0)
894                                         MATRIX_KEY(0x06, 0x09, KEY_9)
895                                         MATRIX_KEY(0x06, 0x0a, KEY_LEFTALT)
896                                         MATRIX_KEY(0x06, 0x0b, KEY_DOWN)
897                                         MATRIX_KEY(0x06, 0x0c, KEY_RIGHT)
898
899                                         MATRIX_KEY(0x07, 0x01, KEY_Q)
900                                         MATRIX_KEY(0x07, 0x02, KEY_E)
901                                         MATRIX_KEY(0x07, 0x03, KEY_R)
902                                         MATRIX_KEY(0x07, 0x04, KEY_W)
903                                         MATRIX_KEY(0x07, 0x05, KEY_I)
904                                         MATRIX_KEY(0x07, 0x06, KEY_U)
905                                         MATRIX_KEY(0x07, 0x07, KEY_RIGHTSHIFT)
906                                         MATRIX_KEY(0x07, 0x08, KEY_P)
907                                         MATRIX_KEY(0x07, 0x09, KEY_O)
908                                         MATRIX_KEY(0x07, 0x0b, KEY_UP)
909                                         MATRIX_KEY(0x07, 0x0c, KEY_LEFT)
910                                 >;
911                         };
912                 };
913         };
914
915         pmc@7000e400 {
916                 nvidia,invert-interrupt;
917                 nvidia,suspend-mode = <1>;
918                 nvidia,cpu-pwr-good-time = <500>;
919                 nvidia,cpu-pwr-off-time = <300>;
920                 nvidia,core-pwr-good-time = <641 3845>;
921                 nvidia,core-pwr-off-time = <61036>;
922                 nvidia,core-power-req-active-high;
923                 nvidia,sys-clock-req-active-high;
924         };
925
926         sdhci@700b0400 {
927                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
928                 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
929                 status = "okay";
930                 bus-width = <4>;
931         };
932
933         sdhci@700b0600 {
934                 status = "okay";
935                 bus-width = <8>;
936         };
937
938         ahub@70300000 {
939                 i2s@70301100 {
940                         status = "okay";
941                 };
942         };
943
944         clocks {
945                 compatible = "simple-bus";
946                 #address-cells = <1>;
947                 #size-cells = <0>;
948
949                 clk32k_in: clock@0 {
950                         compatible = "fixed-clock";
951                         reg=<0>;
952                         #clock-cells = <0>;
953                         clock-frequency = <32768>;
954                 };
955         };
956
957         gpio-keys {
958                 compatible = "gpio-keys";
959
960                 power {
961                         label = "Power";
962                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
963                         linux,code = <KEY_POWER>;
964                         debounce-interval = <10>;
965                         gpio-key,wakeup;
966                 };
967         };
968
969         regulators {
970                 compatible = "simple-bus";
971                 #address-cells = <1>;
972                 #size-cells = <0>;
973
974                 vdd_ac_bat_reg: regulator@0 {
975                         compatible = "regulator-fixed";
976                         reg = <0>;
977                         regulator-name = "vdd_ac_bat";
978                         regulator-min-microvolt = <5000000>;
979                         regulator-max-microvolt = <5000000>;
980                         regulator-always-on;
981                 };
982
983                 vdd_3v3_reg: regulator@1 {
984                         compatible = "regulator-fixed";
985                         reg = <1>;
986                         regulator-name = "vdd_3v3";
987                         regulator-min-microvolt = <3300000>;
988                         regulator-max-microvolt = <3300000>;
989                         regulator-always-on;
990                         regulator-boot-on;
991                         enable-active-high;
992                         gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
993                 };
994
995                 vdd_3v3_modem_reg: regulator@2 {
996                         compatible = "regulator-fixed";
997                         reg = <2>;
998                         regulator-name = "vdd-modem-3v3";
999                         regulator-min-microvolt = <3300000>;
1000                         regulator-max-microvolt = <3300000>;
1001                         enable-active-high;
1002                         gpio = <&as3722 2 GPIO_ACTIVE_HIGH>;
1003                 };
1004
1005                 vdd_hdmi_5v0_reg: regulator@3 {
1006                         compatible = "regulator-fixed";
1007                         reg = <3>;
1008                         regulator-name = "vdd-hdmi-5v0";
1009                         regulator-min-microvolt = <5000000>;
1010                         regulator-max-microvolt = <5000000>;
1011                         enable-active-high;
1012                         gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1013                 };
1014
1015                 vdd_bl_reg: regulator@4 {
1016                         compatible = "regulator-fixed";
1017                         reg = <4>;
1018                         regulator-name = "vdd-bl";
1019                         regulator-min-microvolt = <3300000>;
1020                         regulator-max-microvolt = <3300000>;
1021                         gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_LOW>;
1022                 };
1023
1024                 vdd_ts_sw_5v0: regulator@5 {
1025                         compatible = "regulator-fixed";
1026                         reg = <5>;
1027                         regulator-name = "vdd_ts_sw";
1028                         regulator-min-microvolt = <5000000>;
1029                         regulator-max-microvolt = <5000000>;
1030                         enable-active-high;
1031                         regulator-boot-on;
1032                         gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_LOW>;
1033                 };
1034
1035                 usb1_vbus_reg: regulator@6 {
1036                         compatible = "regulator-fixed";
1037                         reg = <6>;
1038                         regulator-name = "usb1_vbus";
1039                         regulator-min-microvolt = <5000000>;
1040                         regulator-max-microvolt = <5000000>;
1041                         regulator-boot-on;
1042                         enable-active-high;
1043                         gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1044                         gpio-open-drain;
1045                 };
1046
1047                 usb3_vbus_reg: regulator@7 {
1048                         compatible = "regulator-fixed";
1049                         reg = <7>;
1050                         regulator-name = "usb3_vbus";
1051                         regulator-min-microvolt = <5000000>;
1052                         regulator-max-microvolt = <5000000>;
1053                         regulator-boot-on;
1054                         enable-active-high;
1055                         gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1056                         gpio-open-drain;
1057                 };
1058
1059                 panel_3v3_reg: regulator@8 {
1060                         compatible = "regulator-fixed";
1061                         reg = <8>;
1062                         regulator-name = "panel_3v3";
1063                         regulator-min-microvolt = <3300000>;
1064                         regulator-max-microvolt = <3300000>;
1065                         enable-active-high;
1066                         gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
1067                 };
1068         };
1069
1070         sound {
1071                 compatible = "nvidia,tegra-audio-max98090-venice2",
1072                              "nvidia,tegra-audio-max98090";
1073                 nvidia,model = "NVIDIA Tegra Venice2";
1074
1075                 nvidia,audio-routing =
1076                         "Headphones", "HPR",
1077                         "Headphones", "HPL",
1078                         "Speakers", "SPKR",
1079                         "Speakers", "SPKL",
1080                         "Mic Jack", "MICBIAS",
1081                         "IN34", "Mic Jack";
1082
1083                 nvidia,i2s-controller = <&tegra_i2s1>;
1084                 nvidia,audio-codec = <&acodec>;
1085
1086                 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1087                          <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1088                          <&tegra_car TEGRA124_CLK_EXTERN1>;
1089                 clock-names = "pll_a", "pll_a_out0", "mclk";
1090         };
1091 };