Merge branch 'async-scsi-resume' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux.git] / arch / arm / boot / dts / ste-hrefv60plus.dtsi
1 /*
2  * Copyright 2012 ST-Ericsson AB
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 or later at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11
12 #include "ste-dbx5x0.dtsi"
13 #include "ste-href-ab8500.dtsi"
14 #include "ste-href.dtsi"
15
16 / {
17         model = "ST-Ericsson HREF (v60+) platform with Device Tree";
18         compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
19
20         soc {
21                 // External Micro SD slot
22                 sdi0_per1@80126000 {
23                         cd-gpios  = <&gpio2 31 0x4>; // 95
24                 };
25
26                 vmmci: regulator-gpio {
27                         gpios = <&gpio0 5 0x4>;
28                         enable-gpio = <&gpio5 9 0x4>;
29                 };
30
31                 pinctrl {
32                         /*
33                          * Set this up using hogs, as time goes by and as seems fit, these
34                          * can be moved over to being controlled by respective device.
35                          */
36                         pinctrl-names = "default";
37                         pinctrl-0 = <&ipgpio_hrefv60_mode>,
38                                   <&accel_hrefv60_mode>,
39                                   <&magneto_hrefv60_mode>,
40                                   <&etm_hrefv60_mode>,
41                                   <&nahj_hrefv60_mode>,
42                                   <&nfc_hrefv60_mode>,
43                                   <&force_hrefv60_mode>,
44                                   <&dipro_hrefv60_mode>,
45                                   <&vaudio_hf_hrefv60_mode>,
46                                   <&gbf_hrefv60_mode>,
47                                   <&hdtv_hrefv60_mode>,
48                                   <&touch_hrefv60_mode>;
49
50                         sdi0 {
51                                 /* SD card detect GPIO pin, extend default state */
52                                 sdi0_default_mode: sdi0_default {
53                                         default_hrefv60_cfg1 {
54                                                 ste,pins = "GPIO95_E8";
55                                                 ste,config = <&gpio_in_pu>;
56                                         };
57                                 };
58                         };
59                         ipgpio {
60                                 /*
61                                  * XENON Flashgun on image processor GPIO (controlled from image
62                                  * processor firmware), mux in these image processor GPIO lines 0
63                                  * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
64                                  * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
65                                  * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
66                                  */
67                                 ipgpio_hrefv60_mode: ipgpio_hrefv60 {
68                                         hrefv60_mux {
69                                                 ste,function = "ipgpio";
70                                                 ste,pins = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
71                                         };
72                                         hrefv60_cfg1 {
73                                                 ste,pins = "GPIO6_AF6", "GPIO7_AG5";
74                                                 ste,config = <&in_pu>;
75                                         };
76                                         hrefv60_cfg2 {
77                                                 ste,pins = "GPIO21_AB3";
78                                                 ste,config = <&gpio_out_lo>;
79                                         };
80                                         hrefv60_cfg3 {
81                                                 ste,pins = "GPIO64_F3";
82                                                 ste,config = <&out_lo>;
83                                         };
84                                 };
85                         };
86                         accelerometer {
87                                 accel_hrefv60_mode: accel_hrefv60 {
88                                         /* Accelerometer interrupt lines 1 & 2 */
89                                         hrefv60_cfg1 {
90                                                 ste,pins = "GPIO82_C1", "GPIO83_D3";
91                                                 ste,config = <&gpio_in_pu>;
92                                         };
93                                 };
94                         };
95                         magnetometer {
96                                 magneto_hrefv60_mode: magneto_hrefv60 {
97                                         /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
98                                         hrefv60_cfg1 {
99                                                 ste,pins = "GPIO31_V3";
100                                                 ste,config = <&gpio_in_pu>;
101                                         };
102                                         hrefv60_cfg2 {
103                                                 ste,pins = "GPIO32_V2";
104                                                 ste,config = <&gpio_in_pd>;
105                                         };
106                                 };
107                         };
108                         etm {
109                                 /*
110                                  * Drive D19-D23 for the ETM PTM trace interface low,
111                                  * (presumably pins are unconnected therefore grounded here,
112                                  * the "other alt C1" setting enables these pins)
113                                  */
114                                 etm_hrefv60_mode: etm_hrefv60 {
115                                         hrefv60_cfg1 {
116                                                 ste,pins =
117                                                 "GPIO70_G5",
118                                                 "GPIO71_G4",
119                                                 "GPIO72_H4",
120                                                 "GPIO73_H3",
121                                                 "GPIO74_J3";
122                                                 ste,config = <&gpio_out_lo>;
123                                         };
124                                  };
125                         };
126                         nahj {
127                                 nahj_hrefv60_mode: nahj_hrefv60 {
128                                         /* NAHJ CTRL on GPIO76 to low, CTRL_INV on GPIO216 to high */
129                                         hrefv60_cfg1 {
130                                                 ste,pins = "GPIO76_J2";
131                                                 ste,config = <&gpio_out_lo>;
132                                         };
133                                         hrefv60_cfg2 {
134                                                 ste,pins = "GPIO216_AG12";
135                                                 ste,config = <&gpio_out_hi>;
136                                         };
137                                  };
138                         };
139                         nfc {
140                                 nfc_hrefv60_mode: nfc_hrefv60 {
141                                         /* NFC ENA and RESET to low, pulldown IRQ line */
142                                         hrefv60_cfg1 {
143                                                 ste,pins =
144                                                 "GPIO77_H1", /* NFC_ENA */
145                                                 "GPIO142_C11"; /* NFC_RESET */
146                                                 ste,config = <&gpio_out_lo>;
147                                         };
148                                         hrefv60_cfg2 {
149                                                 ste,pins = "GPIO144_B13"; /* NFC_IRQ */
150                                                 ste,config = <&gpio_in_pd>;
151                                         };
152                                  };
153                         };
154                         force {
155                                 force_hrefv60_mode: force_hrefv60 {
156                                         hrefv60_cfg1 {
157                                                 ste,pins = "GPIO91_B6"; /* FORCE_SENSING_INT */
158                                                 ste,config = <&gpio_in_pu>;
159                                         };
160                                         hrefv60_cfg2 {
161                                                 ste,pins =
162                                                 "GPIO92_D6", /* FORCE_SENSING_RST */
163                                                 "GPIO97_D9"; /* FORCE_SENSING_WU */
164                                                 ste,config = <&gpio_out_lo>;
165                                         };
166                                  };
167                         };
168                         dipro {
169                                 dipro_hrefv60_mode: dipro_hrefv60 {
170                                         hrefv60_cfg1 {
171                                                 ste,pins = "GPIO139_C9"; /* DIPRO_INT */
172                                                 ste,config = <&gpio_in_pu>;
173                                         };
174                                  };
175                         };
176                         vaudio_hf {
177                                 vaudio_hf_hrefv60_mode: vaudio_hf_hrefv60 {
178                                         /* Audio Amplifier HF enable GPIO */
179                                         hrefv60_cfg1 {
180                                                 ste,pins = "GPIO149_B14"; /* VAUDIO_HF_EN, enable MAX8968 */
181                                                 ste,config = <&gpio_out_hi>;
182                                         };
183                                  };
184                         };
185                         gbf {
186                                 gbf_hrefv60_mode: gbf_hrefv60 {
187                                         /*
188                                          * GBF (GPS, Bluetooth, FM-radio) interface,
189                                          * pull low to reset state
190                                          */
191                                         hrefv60_cfg1 {
192                                                 ste,pins = "GPIO171_D23"; /* GBF_ENA_RESET */
193                                                 ste,config = <&gpio_out_lo>;
194                                         };
195                                  };
196                         };
197                         hdtv {
198                                 hdtv_hrefv60_mode: hdtv_hrefv60 {
199                                         /* MSP : HDTV INTERFACE GPIO line */
200                                         hrefv60_cfg1 {
201                                                 ste,pins = "GPIO192_AJ27";
202                                                 ste,config = <&gpio_in_pd>;
203                                         };
204                                  };
205                         };
206                         touch {
207                                 touch_hrefv60_mode: touch_hrefv60 {
208                                         /*
209                                          * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
210                                          * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
211                                          * reset signals low.
212                                          */
213                                         hrefv60_cfg1 {
214                                                 ste,pins = "GPIO143_D12", "GPIO146_D13";
215                                                 ste,config = <&gpio_out_lo>;
216                                         };
217                                         hrefv60_cfg2 {
218                                                 ste,pins = "GPIO67_G2";
219                                                 ste,config = <&gpio_in_pu>;
220                                         };
221                                 };
222                         };
223                         mcde {
224                                 lcd_hrefv60_mode: lcd_hrefv60 {
225                                         /*
226                                          * Display Interface 1 uses GPIO 65 for RST (reset).
227                                          * Display Interface 2 uses GPIO 66 for RST (reset).
228                                          * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
229                                          */
230                                         hrefv60_cfg1 {
231                                                 ste,pins ="GPIO65_F1";
232                                                 ste,config = <&gpio_out_hi>;
233                                         };
234                                         hrefv60_cfg2 {
235                                                 ste,pins ="GPIO66_G3";
236                                                 ste,config = <&gpio_out_lo>;
237                                         };
238                                 };
239                         };
240                 };
241         };
242 };