arch/arm/boot/dts/imx6qdl-sabresd.dtsi

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include <dt-bindings/input/input.h>
  15
  16 / {
  17         memory {
  18                 reg = <0x10000000 0x40000000>;
  19         };
  20
  21         regulators {
  22                 compatible = "simple-bus";
  23                 #address-cells = <1>;
  24                 #size-cells = <0>;
  25
  26                 reg_usb_otg_vbus: regulator@0 {
  27                         compatible = "regulator-fixed";
  28                         reg = <0>;
  29                         regulator-name = "usb_otg_vbus";
  30                         regulator-min-microvolt = <5000000>;
  31                         regulator-max-microvolt = <5000000>;
  32                         gpio = <&gpio3 22 0>;
  33                         enable-active-high;
  34                 };
  35
  36                 reg_usb_h1_vbus: regulator@1 {
  37                         compatible = "regulator-fixed";
  38                         reg = <1>;
  39                         regulator-name = "usb_h1_vbus";
  40                         regulator-min-microvolt = <5000000>;
  41                         regulator-max-microvolt = <5000000>;
  42                         gpio = <&gpio1 29 0>;
  43                         enable-active-high;
  44                 };
  45
  46                 reg_audio: regulator@2 {
  47                         compatible = "regulator-fixed";
  48                         reg = <2>;
  49                         regulator-name = "wm8962-supply";
  50                         gpio = <&gpio4 10 0>;
  51                         enable-active-high;
  52                 };
  53         };
  54
  55         gpio-keys {
  56                 compatible = "gpio-keys";
  57                 pinctrl-names = "default";
  58                 pinctrl-0 = <&pinctrl_gpio_keys>;
  59
  60                 power {
  61                         label = "Power Button";
  62                         gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
  63                         gpio-key,wakeup;
  64                         linux,code = <KEY_POWER>;
  65                 };
  66
  67                 volume-up {
  68                         label = "Volume Up";
  69                         gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  70                         gpio-key,wakeup;
  71                         linux,code = <KEY_VOLUMEUP>;
  72                 };
  73
  74                 volume-down {
  75                         label = "Volume Down";
  76                         gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
  77                         gpio-key,wakeup;
  78                         linux,code = <KEY_VOLUMEDOWN>;
  79                 };
  80         };
  81
  82         sound {
  83                 compatible = "fsl,imx6q-sabresd-wm8962",
  84                            "fsl,imx-audio-wm8962";
  85                 model = "wm8962-audio";
  86                 ssi-controller = <&ssi2>;
  87                 audio-codec = <&codec>;
  88                 audio-routing =
  89                         "Headphone Jack", "HPOUTL",
  90                         "Headphone Jack", "HPOUTR",
  91                         "Ext Spk", "SPKOUTL",
  92                         "Ext Spk", "SPKOUTR",
  93                         "MICBIAS", "AMIC",
  94                         "IN3R", "MICBIAS",
  95                         "DMIC", "MICBIAS",
  96                         "DMICDAT", "DMIC";
  97                 mux-int-port = <2>;
  98                 mux-ext-port = <3>;
  99         };
 100
 101         backlight {
 102                 compatible = "pwm-backlight";
 103                 pwms = <&pwm1 0 5000000>;
 104                 brightness-levels = <0 4 8 16 32 64 128 255>;
 105                 default-brightness-level = <7>;
 106                 status = "okay";
 107         };
 108 };
 109
 110 &audmux {
 111         pinctrl-names = "default";
 112         pinctrl-0 = <&pinctrl_audmux>;
 113         status = "okay";
 114 };
 115
 116 &ecspi1 {
 117         fsl,spi-num-chipselects = <1>;
 118         cs-gpios = <&gpio4 9 0>;
 119         pinctrl-names = "default";
 120         pinctrl-0 = <&pinctrl_ecspi1>;
 121         status = "okay";
 122
 123         flash: m25p80@0 {
 124                 #address-cells = <1>;
 125                 #size-cells = <1>;
 126                 compatible = "st,m25p32";
 127                 spi-max-frequency = <20000000>;
 128                 reg = <0>;
 129         };
 130 };
 131
 132 &fec {
 133         pinctrl-names = "default";
 134         pinctrl-0 = <&pinctrl_enet>;
 135         phy-mode = "rgmii";
 136         phy-reset-gpios = <&gpio1 25 0>;
 137         status = "okay";
 138 };
 139
 140 &i2c1 {
 141         clock-frequency = <100000>;
 142         pinctrl-names = "default";
 143         pinctrl-0 = <&pinctrl_i2c1>;
 144         status = "okay";
 145
 146         codec: wm8962@1a {
 147                 compatible = "wlf,wm8962";
 148                 reg = <0x1a>;
 149                 clocks = <&clks 201>;
 150                 DCVDD-supply = <&reg_audio>;
 151                 DBVDD-supply = <&reg_audio>;
 152                 AVDD-supply = <&reg_audio>;
 153                 CPVDD-supply = <&reg_audio>;
 154                 MICVDD-supply = <&reg_audio>;
 155                 PLLVDD-supply = <&reg_audio>;
 156                 SPKVDD1-supply = <&reg_audio>;
 157                 SPKVDD2-supply = <&reg_audio>;
 158                 gpio-cfg = <
 159                         0x0000 /* 0:Default */
 160                         0x0000 /* 1:Default */
 161                         0x0013 /* 2:FN_DMICCLK */
 162                         0x0000 /* 3:Default */
 163                         0x8014 /* 4:FN_DMICCDAT */
 164                         0x0000 /* 5:Default */
 165                 >;
 166        };
 167 };
 168
 169 &i2c2 {
 170         clock-frequency = <100000>;
 171         pinctrl-names = "default";
 172         pinctrl-0 = <&pinctrl_i2c2>;
 173         status = "okay";
 174
 175         pmic: pfuze100@08 {
 176                 compatible = "fsl,pfuze100";
 177                 reg = <0x08>;
 178
 179                 regulators {
 180                         sw1a_reg: sw1ab {
 181                                 regulator-min-microvolt = <300000>;
 182                                 regulator-max-microvolt = <1875000>;
 183                                 regulator-boot-on;
 184                                 regulator-always-on;
 185                                 regulator-ramp-delay = <6250>;
 186                         };
 187
 188                         sw1c_reg: sw1c {
 189                                 regulator-min-microvolt = <300000>;
 190                                 regulator-max-microvolt = <1875000>;
 191                                 regulator-boot-on;
 192                                 regulator-always-on;
 193                                 regulator-ramp-delay = <6250>;
 194                         };
 195
 196                         sw2_reg: sw2 {
 197                                 regulator-min-microvolt = <800000>;
 198                                 regulator-max-microvolt = <3300000>;
 199                                 regulator-boot-on;
 200                                 regulator-always-on;
 201                         };
 202
 203                         sw3a_reg: sw3a {
 204                                 regulator-min-microvolt = <400000>;
 205                                 regulator-max-microvolt = <1975000>;
 206                                 regulator-boot-on;
 207                                 regulator-always-on;
 208                         };
 209
 210                         sw3b_reg: sw3b {
 211                                 regulator-min-microvolt = <400000>;
 212                                 regulator-max-microvolt = <1975000>;
 213                                 regulator-boot-on;
 214                                 regulator-always-on;
 215                         };
 216
 217                         sw4_reg: sw4 {
 218                                 regulator-min-microvolt = <800000>;
 219                                 regulator-max-microvolt = <3300000>;
 220                         };
 221
 222                         swbst_reg: swbst {
 223                                 regulator-min-microvolt = <5000000>;
 224                                 regulator-max-microvolt = <5150000>;
 225                         };
 226
 227                         snvs_reg: vsnvs {
 228                                 regulator-min-microvolt = <1000000>;
 229                                 regulator-max-microvolt = <3000000>;
 230                                 regulator-boot-on;
 231                                 regulator-always-on;
 232                         };
 233
 234                         vref_reg: vrefddr {
 235                                 regulator-boot-on;
 236                                 regulator-always-on;
 237                         };
 238
 239                         vgen1_reg: vgen1 {
 240                                 regulator-min-microvolt = <800000>;
 241                                 regulator-max-microvolt = <1550000>;
 242                         };
 243
 244                         vgen2_reg: vgen2 {
 245                                 regulator-min-microvolt = <800000>;
 246                                 regulator-max-microvolt = <1550000>;
 247                         };
 248
 249                         vgen3_reg: vgen3 {
 250                                 regulator-min-microvolt = <1800000>;
 251                                 regulator-max-microvolt = <3300000>;
 252                         };
 253
 254                         vgen4_reg: vgen4 {
 255                                 regulator-min-microvolt = <1800000>;
 256                                 regulator-max-microvolt = <3300000>;
 257                                 regulator-always-on;
 258                         };
 259
 260                         vgen5_reg: vgen5 {
 261                                 regulator-min-microvolt = <1800000>;
 262                                 regulator-max-microvolt = <3300000>;
 263                                 regulator-always-on;
 264                         };
 265
 266                         vgen6_reg: vgen6 {
 267                                 regulator-min-microvolt = <1800000>;
 268                                 regulator-max-microvolt = <3300000>;
 269                                 regulator-always-on;
 270                         };
 271                 };
 272         };
 273 };
 274
 275 &i2c3 {
 276         clock-frequency = <100000>;
 277         pinctrl-names = "default";
 278         pinctrl-0 = <&pinctrl_i2c3>;
 279         status = "okay";
 280
 281         egalax_ts@04 {
 282                 compatible = "eeti,egalax_ts";
 283                 reg = <0x04>;
 284                 interrupt-parent = <&gpio6>;
 285                 interrupts = <7 2>;
 286                 wakeup-gpios = <&gpio6 7 0>;
 287         };
 288 };
 289
 290 &iomuxc {
 291         pinctrl-names = "default";
 292         pinctrl-0 = <&pinctrl_hog>;
 293
 294         imx6qdl-sabresd {
 295                 pinctrl_hog: hoggrp {
 296                         fsl,pins = <
 297                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
 298                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
 299                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
 300                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
 301                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
 302                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
 303                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
 304                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
 305                                 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
 306                         >;
 307                 };
 308
 309                 pinctrl_audmux: audmuxgrp {
 310                         fsl,pins = <
 311                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 312                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 313                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 314                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 315                         >;
 316                 };
 317
 318                 pinctrl_ecspi1: ecspi1grp {
 319                         fsl,pins = <
 320                                 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO        0x100b1
 321                                 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI        0x100b1
 322                                 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK        0x100b1
 323                         >;
 324                 };
 325
 326                 pinctrl_enet: enetgrp {
 327                         fsl,pins = <
 328                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 329                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 330                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 331                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 332                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 333                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 334                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 335                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 336                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 337                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 338                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 339                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 340                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 341                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 342                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 343                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 344                         >;
 345                 };
 346
 347                 pinctrl_gpio_keys: gpio_keysgrp {
 348                         fsl,pins = <
 349                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
 350                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x80000000
 351                                 MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x80000000
 352                         >;
 353                 };
 354
 355                 pinctrl_i2c1: i2c1grp {
 356                         fsl,pins = <
 357                                 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b8b1
 358                                 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b8b1
 359                         >;
 360                 };
 361
 362                 pinctrl_i2c2: i2c2grp {
 363                         fsl,pins = <
 364                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 365                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 366                         >;
 367                 };
 368
 369                 pinctrl_i2c3: i2c3grp {
 370                         fsl,pins = <
 371                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 372                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 373                         >;
 374                 };
 375
 376                 pinctrl_pwm1: pwm1grp {
 377                         fsl,pins = <
 378                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
 379                         >;
 380                 };
 381
 382                 pinctrl_uart1: uart1grp {
 383                         fsl,pins = <
 384                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 385                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 386                         >;
 387                 };
 388
 389                 pinctrl_usbotg: usbotggrp {
 390                         fsl,pins = <
 391                                 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
 392                         >;
 393                 };
 394
 395                 pinctrl_usdhc2: usdhc2grp {
 396                         fsl,pins = <
 397                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 398                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 399                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 400                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 401                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 402                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 403                                 MX6QDL_PAD_NANDF_D4__SD2_DATA4          0x17059
 404                                 MX6QDL_PAD_NANDF_D5__SD2_DATA5          0x17059
 405                                 MX6QDL_PAD_NANDF_D6__SD2_DATA6          0x17059
 406                                 MX6QDL_PAD_NANDF_D7__SD2_DATA7          0x17059
 407                         >;
 408                 };
 409
 410                 pinctrl_usdhc3: usdhc3grp {
 411                         fsl,pins = <
 412                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 413                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 414                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 415                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 416                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 417                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 418                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
 419                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
 420                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
 421                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
 422                         >;
 423                 };
 424         };
 425 };
 426
 427 &ldb {
 428         status = "okay";
 429
 430         lvds-channel@1 {
 431                 fsl,data-mapping = "spwg";
 432                 fsl,data-width = <18>;
 433                 status = "okay";
 434
 435                 display-timings {
 436                         native-mode = <&timing0>;
 437                         timing0: hsd100pxn1 {
 438                                 clock-frequency = <65000000>;
 439                                 hactive = <1024>;
 440                                 vactive = <768>;
 441                                 hback-porch = <220>;
 442                                 hfront-porch = <40>;
 443                                 vback-porch = <21>;
 444                                 vfront-porch = <7>;
 445                                 hsync-len = <60>;
 446                                 vsync-len = <10>;
 447                         };
 448                 };
 449         };
 450 };
 451
 452 &pwm1 {
 453         pinctrl-names = "default";
 454         pinctrl-0 = <&pinctrl_pwm1>;
 455         status = "okay";
 456 };
 457
 458 &ssi2 {
 459         fsl,mode = "i2s-slave";
 460         status = "okay";
 461 };
 462
 463 &uart1 {
 464         pinctrl-names = "default";
 465         pinctrl-0 = <&pinctrl_uart1>;
 466         status = "okay";
 467 };
 468
 469 &usbh1 {
 470         vbus-supply = <&reg_usb_h1_vbus>;
 471         status = "okay";
 472 };
 473
 474 &usbotg {
 475         vbus-supply = <&reg_usb_otg_vbus>;
 476         pinctrl-names = "default";
 477         pinctrl-0 = <&pinctrl_usbotg>;
 478         disable-over-current;
 479         status = "okay";
 480 };
 481
 482 &usdhc2 {
 483         pinctrl-names = "default";
 484         pinctrl-0 = <&pinctrl_usdhc2>;
 485         bus-width = <8>;
 486         cd-gpios = <&gpio2 2 0>;
 487         wp-gpios = <&gpio2 3 0>;
 488         status = "okay";
 489 };
 490
 491 &usdhc3 {
 492         pinctrl-names = "default";
 493         pinctrl-0 = <&pinctrl_usdhc3>;
 494         bus-width = <8>;
 495         cd-gpios = <&gpio2 0 0>;
 496         wp-gpios = <&gpio2 1 0>;
 497         status = "okay";
 498 };