Merge branch 'async-scsi-resume' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux.git] / arch / arm / boot / dts / imx6qdl-gw51xx.dtsi
1 /*
2  * Copyright 2013 Gateworks Corporation
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 or later at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11
12 / {
13         /* these are used by bootloader for disabling nodes */
14         aliases {
15                 can0 = &can1;
16                 ethernet0 = &fec;
17                 led0 = &led0;
18                 led1 = &led1;
19                 nand = &gpmi;
20                 usb0 = &usbh1;
21                 usb1 = &usbotg;
22         };
23
24         chosen {
25                 bootargs = "console=ttymxc1,115200";
26         };
27
28         leds {
29                 compatible = "gpio-leds";
30
31                 led0: user1 {
32                         label = "user1";
33                         gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
34                         default-state = "on";
35                         linux,default-trigger = "heartbeat";
36                 };
37
38                 led1: user2 {
39                         label = "user2";
40                         gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
41                         default-state = "off";
42                 };
43         };
44
45         memory {
46                 reg = <0x10000000 0x20000000>;
47         };
48
49         pps {
50                 compatible = "pps-gpio";
51                 gpios = <&gpio1 26 0>;
52                 status = "okay";
53         };
54
55         regulators {
56                 compatible = "simple-bus";
57                 #address-cells = <1>;
58                 #size-cells = <0>;
59
60                 reg_3p3v: regulator@0 {
61                         compatible = "regulator-fixed";
62                         reg = <0>;
63                         regulator-name = "3P3V";
64                         regulator-min-microvolt = <3300000>;
65                         regulator-max-microvolt = <3300000>;
66                         regulator-always-on;
67                 };
68
69                 reg_5p0v: regulator@1 {
70                         compatible = "regulator-fixed";
71                         reg = <1>;
72                         regulator-name = "5P0V";
73                         regulator-min-microvolt = <5000000>;
74                         regulator-max-microvolt = <5000000>;
75                         regulator-always-on;
76                 };
77
78                 reg_usb_otg_vbus: regulator@2 {
79                         compatible = "regulator-fixed";
80                         reg = <2>;
81                         regulator-name = "usb_otg_vbus";
82                         regulator-min-microvolt = <5000000>;
83                         regulator-max-microvolt = <5000000>;
84                         gpio = <&gpio3 22 0>;
85                         enable-active-high;
86                 };
87         };
88 };
89
90 &fec {
91         pinctrl-names = "default";
92         pinctrl-0 = <&pinctrl_enet>;
93         phy-mode = "rgmii";
94         phy-reset-gpios = <&gpio1 30 0>;
95         status = "okay";
96 };
97
98 &gpmi {
99         pinctrl-names = "default";
100         pinctrl-0 = <&pinctrl_gpmi_nand>;
101         status = "okay";
102 };
103
104 &i2c1 {
105         clock-frequency = <100000>;
106         pinctrl-names = "default";
107         pinctrl-0 = <&pinctrl_i2c1>;
108         status = "okay";
109
110         eeprom1: eeprom@50 {
111                 compatible = "atmel,24c02";
112                 reg = <0x50>;
113                 pagesize = <16>;
114         };
115
116         eeprom2: eeprom@51 {
117                 compatible = "atmel,24c02";
118                 reg = <0x51>;
119                 pagesize = <16>;
120         };
121
122         eeprom3: eeprom@52 {
123                 compatible = "atmel,24c02";
124                 reg = <0x52>;
125                 pagesize = <16>;
126         };
127
128         eeprom4: eeprom@53 {
129                 compatible = "atmel,24c02";
130                 reg = <0x53>;
131                 pagesize = <16>;
132         };
133
134         gpio: pca9555@23 {
135                 compatible = "nxp,pca9555";
136                 reg = <0x23>;
137                 gpio-controller;
138                 #gpio-cells = <2>;
139         };
140
141         hwmon: gsc@29 {
142                 compatible = "gw,gsp";
143                 reg = <0x29>;
144         };
145
146         rtc: ds1672@68 {
147                 compatible = "dallas,ds1672";
148                 reg = <0x68>;
149         };
150 };
151
152 &i2c2 {
153         clock-frequency = <100000>;
154         pinctrl-names = "default";
155         pinctrl-0 = <&pinctrl_i2c2>;
156         status = "okay";
157
158         pmic: ltc3676@3c {
159                 compatible = "ltc,ltc3676";
160                 reg = <0x3c>;
161
162                 regulators {
163                         sw1_reg: ltc3676__sw1 {
164                                 regulator-min-microvolt = <1175000>;
165                                 regulator-max-microvolt = <1175000>;
166                                 regulator-boot-on;
167                                 regulator-always-on;
168                         };
169
170                         sw2_reg: ltc3676__sw2 {
171                                 regulator-min-microvolt = <1800000>;
172                                 regulator-max-microvolt = <1800000>;
173                                 regulator-boot-on;
174                                 regulator-always-on;
175                         };
176
177                         sw3_reg: ltc3676__sw3 {
178                                 regulator-min-microvolt = <1175000>;
179                                 regulator-max-microvolt = <1175000>;
180                                 regulator-boot-on;
181                                 regulator-always-on;
182                         };
183
184                         sw4_reg: ltc3676__sw4 {
185                                 regulator-min-microvolt = <1500000>;
186                                 regulator-max-microvolt = <1500000>;
187                                 regulator-boot-on;
188                                 regulator-always-on;
189                         };
190
191                         ldo2_reg: ltc3676__ldo2 {
192                                 regulator-min-microvolt = <2500000>;
193                                 regulator-max-microvolt = <2500000>;
194                                 regulator-boot-on;
195                                 regulator-always-on;
196                         };
197
198                         ldo4_reg: ltc3676__ldo4 {
199                                 regulator-min-microvolt = <3000000>;
200                                 regulator-max-microvolt = <3000000>;
201                         };
202                 };
203         };
204 };
205
206 &i2c3 {
207         clock-frequency = <100000>;
208         pinctrl-names = "default";
209         pinctrl-0 = <&pinctrl_i2c3>;
210         status = "okay";
211
212         videoin: adv7180@20 {
213                 compatible = "adi,adv7180";
214                 reg = <0x20>;
215         };
216 };
217
218 &iomuxc {
219         pinctrl-names = "default";
220         pinctrl-0 = <&pinctrl_hog>;
221
222         imx6qdl-gw51xx {
223                 pinctrl_hog: hoggrp {
224                         fsl,pins = <
225                                 MX6QDL_PAD_EIM_A19__GPIO2_IO19   0x80000000 /* MEZZ_DIO0 */
226                                 MX6QDL_PAD_EIM_A20__GPIO2_IO18   0x80000000 /* MEZZ_DIO1 */
227                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x80000000 /* OTG_PWR_EN */
228                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
229                                 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
230                                 MX6QDL_PAD_GPIO_0__GPIO1_IO00    0x80000000 /* PCIE_RST# */
231                                 MX6QDL_PAD_KEY_COL0__GPIO4_IO06  0x80000000 /* user1 led */
232                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07  0x80000000 /* user2 led */
233                          >;
234                 };
235
236                 pinctrl_enet: enetgrp {
237                         fsl,pins = <
238                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
239                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
240                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
241                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
242                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
243                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
244                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
245                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
246                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
247                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
248                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
249                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
250                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
251                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
252                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
253                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
254                         >;
255                 };
256
257                 pinctrl_gpmi_nand: gpminandgrp {
258                         fsl,pins = <
259                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
260                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
261                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
262                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
263                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
264                                 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
265                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
266                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
267                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
268                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
269                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
270                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
271                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
272                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
273                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
274                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
275                         >;
276                 };
277
278                 pinctrl_i2c1: i2c1grp {
279                         fsl,pins = <
280                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
281                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
282                         >;
283                 };
284
285                 pinctrl_i2c2: i2c2grp {
286                         fsl,pins = <
287                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
288                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
289                         >;
290                 };
291
292                 pinctrl_i2c3: i2c3grp {
293                         fsl,pins = <
294                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
295                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
296                         >;
297                 };
298
299                 pinctrl_uart1: uart1grp {
300                         fsl,pins = <
301                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
302                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
303                         >;
304                 };
305
306                 pinctrl_uart2: uart2grp {
307                         fsl,pins = <
308                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
309                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
310                         >;
311                 };
312
313                 pinctrl_uart3: uart3grp {
314                         fsl,pins = <
315                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
316                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
317                         >;
318                 };
319
320                 pinctrl_uart5: uart5grp {
321                         fsl,pins = <
322                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
323                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
324                         >;
325                 };
326
327                 pinctrl_usbotg: usbotggrp {
328                         fsl,pins = <
329                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
330                         >;
331                 };
332         };
333 };
334
335 &pcie {
336         reset-gpio = <&gpio1 0 0>;
337         status = "okay";
338 };
339
340 &uart1 {
341         pinctrl-names = "default";
342         pinctrl-0 = <&pinctrl_uart1>;
343         status = "okay";
344 };
345
346 &uart2 {
347         pinctrl-names = "default";
348         pinctrl-0 = <&pinctrl_uart2>;
349         status = "okay";
350 };
351
352 &uart3 {
353         pinctrl-names = "default";
354         pinctrl-0 = <&pinctrl_uart3>;
355         status = "okay";
356 };
357
358 &uart5 {
359         pinctrl-names = "default";
360         pinctrl-0 = <&pinctrl_uart5>;
361         status = "okay";
362 };
363
364 &usbotg {
365         vbus-supply = <&reg_usb_otg_vbus>;
366         pinctrl-names = "default";
367         pinctrl-0 = <&pinctrl_usbotg>;
368         disable-over-current;
369         status = "okay";
370 };
371
372 &usbh1 {
373         status = "okay";
374 };