arch/arm/boot/dts/imx53-qsb-common.dtsi

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include "imx53.dtsi"
  14
  15 / {
  16         memory {
  17                 reg = <0x70000000 0x40000000>;
  18         };
  19
  20         display0: display@di0 {
  21                 compatible = "fsl,imx-parallel-display";
  22                 interface-pix-fmt = "rgb565";
  23                 pinctrl-names = "default";
  24                 pinctrl-0 = <&pinctrl_ipu_disp0>;
  25                 status = "disabled";
  26                 display-timings {
  27                         claawvga {
  28                                 native-mode;
  29                                 clock-frequency = <27000000>;
  30                                 hactive = <800>;
  31                                 vactive = <480>;
  32                                 hback-porch = <40>;
  33                                 hfront-porch = <60>;
  34                                 vback-porch = <10>;
  35                                 vfront-porch = <10>;
  36                                 hsync-len = <20>;
  37                                 vsync-len = <10>;
  38                                 hsync-active = <0>;
  39                                 vsync-active = <0>;
  40                                 de-active = <1>;
  41                                 pixelclk-active = <0>;
  42                         };
  43                 };
  44
  45                 port {
  46                         display0_in: endpoint {
  47                                 remote-endpoint = <&ipu_di0_disp0>;
  48                         };
  49                 };
  50         };
  51
  52         gpio-keys {
  53                 compatible = "gpio-keys";
  54
  55                 power {
  56                         label = "Power Button";
  57                         gpios = <&gpio1 8 0>;
  58                         linux,code = <116>; /* KEY_POWER */
  59                 };
  60
  61                 volume-up {
  62                         label = "Volume Up";
  63                         gpios = <&gpio2 14 0>;
  64                         linux,code = <115>; /* KEY_VOLUMEUP */
  65                         gpio-key,wakeup;
  66                 };
  67
  68                 volume-down {
  69                         label = "Volume Down";
  70                         gpios = <&gpio2 15 0>;
  71                         linux,code = <114>; /* KEY_VOLUMEDOWN */
  72                         gpio-key,wakeup;
  73                 };
  74         };
  75
  76         leds {
  77                 compatible = "gpio-leds";
  78                 pinctrl-names = "default";
  79                 pinctrl-0 = <&led_pin_gpio7_7>;
  80
  81                 user {
  82                         label = "Heartbeat";
  83                         gpios = <&gpio7 7 0>;
  84                         linux,default-trigger = "heartbeat";
  85                 };
  86         };
  87
  88         regulators {
  89                 compatible = "simple-bus";
  90                 #address-cells = <1>;
  91                 #size-cells = <0>;
  92
  93                 reg_3p2v: regulator@0 {
  94                         compatible = "regulator-fixed";
  95                         reg = <0>;
  96                         regulator-name = "3P2V";
  97                         regulator-min-microvolt = <3200000>;
  98                         regulator-max-microvolt = <3200000>;
  99                         regulator-always-on;
 100                 };
 101
 102                 reg_usb_vbus: regulator@1 {
 103                         compatible = "regulator-fixed";
 104                         reg = <1>;
 105                         regulator-name = "usb_vbus";
 106                         regulator-min-microvolt = <5000000>;
 107                         regulator-max-microvolt = <5000000>;
 108                         gpio = <&gpio7 8 0>;
 109                         enable-active-high;
 110                 };
 111         };
 112
 113         sound {
 114                 compatible = "fsl,imx53-qsb-sgtl5000",
 115                              "fsl,imx-audio-sgtl5000";
 116                 model = "imx53-qsb-sgtl5000";
 117                 ssi-controller = <&ssi2>;
 118                 audio-codec = <&sgtl5000>;
 119                 audio-routing =
 120                         "MIC_IN", "Mic Jack",
 121                         "Mic Jack", "Mic Bias",
 122                         "Headphone Jack", "HP_OUT";
 123                 mux-int-port = <2>;
 124                 mux-ext-port = <5>;
 125         };
 126 };
 127
 128 &esdhc1 {
 129         pinctrl-names = "default";
 130         pinctrl-0 = <&pinctrl_esdhc1>;
 131         status = "okay";
 132 };
 133
 134 &ipu_di0_disp0 {
 135         remote-endpoint = <&display0_in>;
 136 };
 137
 138 &ssi2 {
 139         fsl,mode = "i2s-slave";
 140         status = "okay";
 141 };
 142
 143 &esdhc3 {
 144         pinctrl-names = "default";
 145         pinctrl-0 = <&pinctrl_esdhc3>;
 146         cd-gpios = <&gpio3 11 0>;
 147         wp-gpios = <&gpio3 12 0>;
 148         bus-width = <8>;
 149         status = "okay";
 150 };
 151
 152 &iomuxc {
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&pinctrl_hog>;
 155
 156         imx53-qsb {
 157                 pinctrl_hog: hoggrp {
 158                         fsl,pins = <
 159                                 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
 160                                 MX53_PAD_GPIO_8__GPIO1_8          0x80000000
 161                                 MX53_PAD_PATA_DATA14__GPIO2_14    0x80000000
 162                                 MX53_PAD_PATA_DATA15__GPIO2_15    0x80000000
 163                                 MX53_PAD_EIM_DA11__GPIO3_11       0x80000000
 164                                 MX53_PAD_EIM_DA12__GPIO3_12       0x80000000
 165                                 MX53_PAD_PATA_DA_0__GPIO7_6       0x80000000
 166                                 MX53_PAD_PATA_DA_2__GPIO7_8       0x80000000
 167                                 MX53_PAD_GPIO_16__GPIO7_11        0x80000000
 168                         >;
 169                 };
 170
 171                 led_pin_gpio7_7: led_gpio7_7@0 {
 172                         fsl,pins = <
 173                                 MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000
 174                         >;
 175                 };
 176
 177                 pinctrl_audmux: audmuxgrp {
 178                         fsl,pins = <
 179                                 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC      0x80000000
 180                                 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD      0x80000000
 181                                 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS     0x80000000
 182                                 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD      0x80000000
 183                         >;
 184                 };
 185
 186                 pinctrl_esdhc1: esdhc1grp {
 187                         fsl,pins = <
 188                                 MX53_PAD_SD1_DATA0__ESDHC1_DAT0         0x1d5
 189                                 MX53_PAD_SD1_DATA1__ESDHC1_DAT1         0x1d5
 190                                 MX53_PAD_SD1_DATA2__ESDHC1_DAT2         0x1d5
 191                                 MX53_PAD_SD1_DATA3__ESDHC1_DAT3         0x1d5
 192                                 MX53_PAD_SD1_CMD__ESDHC1_CMD            0x1d5
 193                                 MX53_PAD_SD1_CLK__ESDHC1_CLK            0x1d5
 194                         >;
 195                 };
 196
 197                 pinctrl_esdhc3: esdhc3grp {
 198                         fsl,pins = <
 199                                 MX53_PAD_PATA_DATA8__ESDHC3_DAT0        0x1d5
 200                                 MX53_PAD_PATA_DATA9__ESDHC3_DAT1        0x1d5
 201                                 MX53_PAD_PATA_DATA10__ESDHC3_DAT2       0x1d5
 202                                 MX53_PAD_PATA_DATA11__ESDHC3_DAT3       0x1d5
 203                                 MX53_PAD_PATA_DATA0__ESDHC3_DAT4        0x1d5
 204                                 MX53_PAD_PATA_DATA1__ESDHC3_DAT5        0x1d5
 205                                 MX53_PAD_PATA_DATA2__ESDHC3_DAT6        0x1d5
 206                                 MX53_PAD_PATA_DATA3__ESDHC3_DAT7        0x1d5
 207                                 MX53_PAD_PATA_RESET_B__ESDHC3_CMD       0x1d5
 208                                 MX53_PAD_PATA_IORDY__ESDHC3_CLK         0x1d5
 209                         >;
 210                 };
 211
 212                 pinctrl_fec: fecgrp {
 213                         fsl,pins = <
 214                                 MX53_PAD_FEC_MDC__FEC_MDC               0x80000000
 215                                 MX53_PAD_FEC_MDIO__FEC_MDIO             0x80000000
 216                                 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x80000000
 217                                 MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x80000000
 218                                 MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x80000000
 219                                 MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x80000000
 220                                 MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x80000000
 221                                 MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
 222                                 MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x80000000
 223                                 MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x80000000
 224                         >;
 225                 };
 226
 227                 pinctrl_i2c1: i2c1grp {
 228                         fsl,pins = <
 229                                 MX53_PAD_CSI0_DAT8__I2C1_SDA            0xc0000000
 230                                 MX53_PAD_CSI0_DAT9__I2C1_SCL            0xc0000000
 231                         >;
 232                 };
 233
 234                 pinctrl_i2c2: i2c2grp {
 235                         fsl,pins = <
 236                                 MX53_PAD_KEY_ROW3__I2C2_SDA             0xc0000000
 237                                 MX53_PAD_KEY_COL3__I2C2_SCL             0xc0000000
 238                         >;
 239                 };
 240
 241                 pinctrl_ipu_disp0: ipudisp0grp {
 242                         fsl,pins = <
 243                                 MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
 244                                 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15       0x5
 245                                 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2         0x5
 246                                 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3         0x5
 247                                 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0    0x5
 248                                 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1    0x5
 249                                 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2    0x5
 250                                 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3    0x5
 251                                 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4    0x5
 252                                 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5    0x5
 253                                 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6    0x5
 254                                 MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7    0x5
 255                                 MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8    0x5
 256                                 MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9    0x5
 257                                 MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10  0x5
 258                                 MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11  0x5
 259                                 MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12  0x5
 260                                 MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13  0x5
 261                                 MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14  0x5
 262                                 MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15  0x5
 263                                 MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16  0x5
 264                                 MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17  0x5
 265                                 MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18  0x5
 266                                 MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19  0x5
 267                                 MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20  0x5
 268                                 MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21  0x5
 269                                 MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22  0x5
 270                                 MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23  0x5
 271                         >;
 272                 };
 273
 274                 pinctrl_uart1: uart1grp {
 275                         fsl,pins = <
 276                                 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX      0x1e4
 277                                 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX      0x1e4
 278                         >;
 279                 };
 280         };
 281 };
 282
 283 &uart1 {
 284         pinctrl-names = "default";
 285         pinctrl-0 = <&pinctrl_uart1>;
 286         status = "okay";
 287 };
 288
 289 &i2c2 {
 290         pinctrl-names = "default";
 291         pinctrl-0 = <&pinctrl_i2c2>;
 292         status = "okay";
 293
 294         sgtl5000: codec@0a {
 295                 compatible = "fsl,sgtl5000";
 296                 reg = <0x0a>;
 297                 VDDA-supply = <&reg_3p2v>;
 298                 VDDIO-supply = <&reg_3p2v>;
 299                 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
 300         };
 301 };
 302
 303 &i2c1 {
 304         pinctrl-names = "default";
 305         pinctrl-0 = <&pinctrl_i2c1>;
 306         status = "okay";
 307
 308         accelerometer: mma8450@1c {
 309                 compatible = "fsl,mma8450";
 310                 reg = <0x1c>;
 311         };
 312 };
 313
 314 &audmux {
 315         pinctrl-names = "default";
 316         pinctrl-0 = <&pinctrl_audmux>;
 317         status = "okay";
 318 };
 319
 320 &fec {
 321         pinctrl-names = "default";
 322         pinctrl-0 = <&pinctrl_fec>;
 323         phy-mode = "rmii";
 324         phy-reset-gpios = <&gpio7 6 0>;
 325         status = "okay";
 326 };
 327
 328 &sata {
 329         status = "okay";
 330 };
 331
 332 &vpu {
 333         status = "okay";
 334 };
 335
 336 &usbh1 {
 337         vbus-supply = <&reg_usb_vbus>;
 338         phy_type = "utmi";
 339         status = "okay";
 340 };
 341
 342 &usbotg {
 343         dr_mode = "peripheral";
 344         status = "okay";
 345 };