arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts

   1 /*
   2  * Copyright 2012 Markus Pargmann, Pengutronix
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "imx27-phytec-phycard-s-som.dtsi"
  13
  14 / {
  15         model = "Phytec pca100 rapid development kit";
  16         compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
  17
  18         display: display {
  19                 model = "Primeview-PD050VL1";
  20                 native-mode = <&timing0>;
  21                 bits-per-pixel = <16>;  /* non-standard but required */
  22                 fsl,pcr = <0xf0c88080>; /* non-standard but required */
  23                 display-timings {
  24                         timing0: 640x480 {
  25                                 hactive = <640>;
  26                                 vactive = <480>;
  27                                 hback-porch = <112>;
  28                                 hfront-porch = <36>;
  29                                 hsync-len = <32>;
  30                                 vback-porch = <33>;
  31                                 vfront-porch = <33>;
  32                                 vsync-len = <2>;
  33                                 clock-frequency = <25000000>;
  34                         };
  35                 };
  36         };
  37
  38         regulators {
  39                 compatible = "simple-bus";
  40                 #address-cells = <1>;
  41                 #size-cells = <0>;
  42
  43                 reg_3v3: regulator@0 {
  44                         compatible = "regulator-fixed";
  45                         reg = <0>;
  46                         regulator-name = "3V3";
  47                         regulator-min-microvolt = <3300000>;
  48                         regulator-max-microvolt = <3300000>;
  49                         regulator-always-on;
  50                 };
  51         };
  52 };
  53
  54 &fb {
  55         display = <&display>;
  56         status = "okay";
  57 };
  58
  59 &i2c1 {
  60         pinctrl-names = "default";
  61         pinctrl-0 = <&pinctrl_i2c1>;
  62         status = "okay";
  63
  64         rtc@51 {
  65                 compatible = "nxp,pcf8563";
  66                 reg = <0x51>;
  67         };
  68
  69         adc@64 {
  70                 compatible = "maxim,max1037";
  71                 vcc-supply = <&reg_3v3>;
  72                 reg = <0x64>;
  73         };
  74 };
  75
  76 &iomuxc {
  77         imx27-phycard-s-rdk {
  78                 pinctrl_i2c1: i2c1grp {
  79                         fsl,pins = <
  80                                 MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
  81                                 MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
  82                         >;
  83                 };
  84
  85                 pinctrl_owire1: owire1grp {
  86                         fsl,pins = <
  87                                 MX27_PAD_RTCK__OWIRE 0x0
  88                         >;
  89                 };
  90
  91                 pinctrl_sdhc2: sdhc2grp {
  92                         fsl,pins = <
  93                                 MX27_PAD_SD2_CLK__SD2_CLK 0x0
  94                                 MX27_PAD_SD2_CMD__SD2_CMD 0x0
  95                                 MX27_PAD_SD2_D0__SD2_D0 0x0
  96                                 MX27_PAD_SD2_D1__SD2_D1 0x0
  97                                 MX27_PAD_SD2_D2__SD2_D2 0x0
  98                                 MX27_PAD_SD2_D3__SD2_D3 0x0
  99                                 MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
 100                         >;
 101                 };
 102
 103                 pinctrl_uart1: uart1grp {
 104                         fsl,pins = <
 105                                 MX27_PAD_UART1_TXD__UART1_TXD 0x0
 106                                 MX27_PAD_UART1_RXD__UART1_RXD 0x0
 107                                 MX27_PAD_UART1_CTS__UART1_CTS 0x0
 108                                 MX27_PAD_UART1_RTS__UART1_RTS 0x0
 109                         >;
 110                 };
 111
 112                 pinctrl_uart2: uart2grp {
 113                         fsl,pins = <
 114                                 MX27_PAD_UART2_TXD__UART2_TXD 0x0
 115                                 MX27_PAD_UART2_RXD__UART2_RXD 0x0
 116                                 MX27_PAD_UART2_CTS__UART2_CTS 0x0
 117                                 MX27_PAD_UART2_RTS__UART2_RTS 0x0
 118                         >;
 119                 };
 120
 121                 pinctrl_uart3: uart3grp {
 122                         fsl,pins = <
 123                                 MX27_PAD_UART3_TXD__UART3_TXD 0x0
 124                                 MX27_PAD_UART3_RXD__UART3_RXD 0x0
 125                                 MX27_PAD_UART3_CTS__UART3_CTS 0x0
 126                                 MX27_PAD_UART3_RTS__UART3_RTS 0x0
 127                         >;
 128                 };
 129         };
 130 };
 131
 132 &owire {
 133         pinctrl-names = "default";
 134         pinctrl-0 = <&pinctrl_owire1>;
 135         status = "okay";
 136 };
 137
 138 &sdhci2 {
 139         pinctrl-names = "default";
 140         pinctrl-0 = <&pinctrl_sdhc2>;
 141         cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
 142         status = "okay";
 143 };
 144
 145 &uart1 {
 146         fsl,uart-has-rtscts;
 147         pinctrl-names = "default";
 148         pinctrl-0 = <&pinctrl_uart1>;
 149         status = "okay";
 150 };
 151
 152 &uart2 {
 153         fsl,uart-has-rtscts;
 154         pinctrl-names = "default";
 155         pinctrl-0 = <&pinctrl_uart2>;
 156         status = "okay";
 157 };
 158
 159 &uart3 {
 160         fsl,uart-has-rtscts;
 161         pinctrl-names = "default";
 162         pinctrl-0 = <&pinctrl_uart3>;
 163         status = "okay";
 164 };