Documentation/devicetree/bindings/clock/st/st,clkgen-prediv.txt

   1 Binding for a ST pre-divider clock driver.
   2
   3 This binding uses the common clock binding[1].
   4 Base address is located to the parent node. See clock binding[2]
   5
   6 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
   7 [2] Documentation/devicetree/bindings/clock/st/st,clkgen.txt
   8
   9 Required properties:
  10
  11 - compatible : shall be:
  12         "st,clkgena-prediv-c65",        "st,clkgena-prediv"
  13         "st,clkgena-prediv-c32",        "st,clkgena-prediv"
  14
  15 - #clock-cells : From common clock binding; shall be set to 0.
  16
  17 - clocks : From common clock binding
  18
  19 - clock-output-names : From common clock binding.
  20
  21 Example:
  22
  23         clockgenA@fd345000 {
  24                 reg = <0xfd345000 0xb50>;
  25
  26                 CLK_M_A2_OSC_PREDIV: CLK_M_A2_OSC_PREDIV {
  27                         #clock-cells = <0>;
  28                         compatible = "st,clkgena-prediv-c32",
  29                                      "st,clkgena-prediv";
  30
  31                         clocks = <&CLK_SYSIN>;
  32
  33                         clock-output-names = "CLK_M_A2_OSC_PREDIV";
  34                 };
  35         };
  36