staging: brcm80211: moved register read/write macro's

Code cleanup. R_REG()/W_REG() macro's are overly complex. Copied
the macro's to both fullmac and softmac. Next patches will simplify
both copies of the macro's.

Signed-off-by: Roland Vossen <rvossen@broadcom.com>
Reviewed-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
index e7638f4eca37cf531e09f8917764f86e2a563e5a..5812b5befcb8896f9a35018841272ea9ee003e94 100644 (file)
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
@@ -28,6 +28,7 @@
 #include <bcmdefs.h>
 #include <bcmdevs.h>
 #include <brcmu_utils.h>
+#include <bcmsdh.h>
 #include <brcmu_wifi.h>
 
 #if defined(OOB_INTR_ONLY)

diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c
index 8dadfb662bf431dfeb8c2cb3365d31322f5183b0..9abd6207c1924b74db258fba852276ccf950b0a8 100644 (file)
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c
@@ -20,6 +20,7 @@
 #include <bcmdevs.h>
 #include <brcmu_utils.h>
 #include <brcmu_wifi.h>
+#include <bcmsdh.h>
 #include <bcmsdbus.h>          /* bcmsdh to/from specific controller APIs */
 #include <sdiovar.h>           /* ioctl/iovars */
 

diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
index e1b2592023314a3064c27b5ebe02f12fd48b3973..2da07e2ff5f493f3b59b835dd80b8851fc9bad4a 100644 (file)
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
@@ -20,6 +20,7 @@
 #include <bcmdefs.h>
 #include <brcmu_utils.h>
 #include <brcmu_wifi.h>
+#include <bcmsdh.h>
 #include <bcmsdbus.h>          /* bcmsdh to/from specific controller APIs */
 #include <sdiovar.h>           /* to get msglevel bit values */
 

diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
index 75393e765fce0deb511ae8040e85f5b80662b13c..8eeefb41e9a6b2cf863d4ca7527ae2060df09225 100644 (file)
--- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
@@ -31,6 +31,132 @@
 #include <bcmdevs.h>
 
 #include <bcmsoc.h>
+
+/* register access macros */
+#if defined(BCMSDIO)
+#ifdef BRCM_FULLMAC
+#include <bcmsdh.h>
+#endif
+#endif
+
+#if defined(BCMSDIO)
+#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op
+#define SELECT_BUS_READ(mmap_op, bus_op) bus_op
+#else
+#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op
+#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op
+#endif
+
+/* register access macros */
+#ifndef __BIG_ENDIAN
+#ifndef __mips__
+#define R_REG(r) (\
+       SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \
+       readb((volatile u8*)(r)) : \
+       sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \
+       readl((volatile u32*)(r)), bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \
+)
+#else                          /* __mips__ */
+#define R_REG(r) (\
+       SELECT_BUS_READ( \
+               ({ \
+                       __typeof(*(r)) __osl_v; \
+                       __asm__ __volatile__("sync"); \
+                       switch (sizeof(*(r))) { \
+                       case sizeof(u8): \
+                               __osl_v = readb((volatile u8*)(r)); \
+                               break; \
+                       case sizeof(u16): \
+                               __osl_v = readw((volatile u16*)(r)); \
+                               break; \
+                       case sizeof(u32): \
+                               __osl_v = \
+                               readl((volatile u32*)(r)); \
+                               break; \
+                       } \
+                       __asm__ __volatile__("sync"); \
+                       __osl_v; \
+               }), \
+               ({ \
+                       __typeof(*(r)) __osl_v; \
+                       __asm__ __volatile__("sync"); \
+                       __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \
+                       __asm__ __volatile__("sync"); \
+                       __osl_v; \
+               })) \
+)
+#endif                         /* __mips__ */
+
+#define W_REG(r, v) do { \
+       SELECT_BUS_WRITE( \
+               switch (sizeof(*(r))) { \
+               case sizeof(u8): \
+                       writeb((u8)(v), (volatile u8*)(r)); break; \
+               case sizeof(u16): \
+                       writew((u16)(v), (volatile u16*)(r)); break; \
+               case sizeof(u32): \
+                       writel((u32)(v), (volatile u32*)(r)); break; \
+               }, \
+               bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v))); \
+       } while (0)
+#else                          /* __BIG_ENDIAN */
+#define R_REG(r) (\
+       SELECT_BUS_READ( \
+               ({ \
+                       __typeof(*(r)) __osl_v; \
+                       switch (sizeof(*(r))) { \
+                       case sizeof(u8): \
+                               __osl_v = \
+                               readb((volatile u8*)((r)^3)); \
+                               break; \
+                       case sizeof(u16): \
+                               __osl_v = \
+                               readw((volatile u16*)((r)^2)); \
+                               break; \
+                       case sizeof(u32): \
+                               __osl_v = readl((volatile u32*)(r)); \
+                               break; \
+                       } \
+                       __osl_v; \
+               }), \
+               bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \
+)
+#define W_REG(r, v) do { \
+       SELECT_BUS_WRITE( \
+               switch (sizeof(*(r))) { \
+               case sizeof(u8):        \
+                       writeb((u8)(v), \
+                       (volatile u8*)((r)^3)); break; \
+               case sizeof(u16):       \
+                       writew((u16)(v), \
+                       (volatile u16*)((r)^2)); break; \
+               case sizeof(u32):       \
+                       writel((u32)(v), \
+                       (volatile u32*)(r)); break; \
+               }, \
+               bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v)); \
+       } while (0)
+#endif                         /* __BIG_ENDIAN */
+
+#ifdef __mips__
+/*
+ * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder
+ * transactions. As a fix, a read after write is performed on certain places
+ * in the code. Older chips and the newer 5357 family don't require this fix.
+ */
+#define W_REG_FLUSH(r, v)      ({ W_REG((r), (v)); (void)R_REG(r); })
+#else
+#define W_REG_FLUSH(r, v)      W_REG((r), (v))
+#endif                         /* __mips__ */
+
+#define AND_REG(r, v)  W_REG((r), R_REG(r) & (v))
+#define OR_REG(r, v)   W_REG((r), R_REG(r) | (v))
+
+#define SET_REG(r, mask, val) \
+               W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
+
+
+
 #ifdef DHD_DEBUG
 
 /* ARM trap handling */

diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c
index bc1c52d46286a5e7180d65ccc236746c3b16dca3..7a8bab728b7476e6f709758b06430e393c8bc35b 100644 (file)
--- a/drivers/staging/brcm80211/brcmsmac/aiutils.c
+++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c
@@ -18,6 +18,7 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <bcmdefs.h>
+#include "wlc_types.h"
 #include <linux/module.h>
 #include <linux/pci.h>
 #include <brcmu_utils.h>

diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c
index 4a0deecbfaf67bc44f01f5dd765af5c77a72d503..baed204ea4cd879865c16f66bf3326e3c810d9a3 100644 (file)
--- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c
+++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.c
@@ -23,6 +23,7 @@
 
 #include <bcmdefs.h>
 #include <bcmdevs.h>
+#include "wlc_types.h"
 #include <brcmu_utils.h>
 #include <aiutils.h>
 #include <bcmsoc.h>

diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c
index 6e61ca1326a169da5e3a3b6e73057c0a5ac2f8b6..3ffad2e63dedf9c76e5ca99c17aca91416426989 100644 (file)
--- a/drivers/staging/brcm80211/brcmsmac/nicpci.c
+++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c
@@ -18,6 +18,7 @@
 #include <linux/string.h>
 #include <linux/pci.h>
 #include <bcmdefs.h>
+#include "wlc_types.h"
 #include <brcmu_utils.h>
 #include <aiutils.h>
 #include <bcmsoc.h>

diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c
index f10a13720fd1eacddde2897dd9d1eedecb08c4e6..720839bf96a543ce6bb3f8c17b97eec62f43f2b2 100644 (file)
--- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c
+++ b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c
@@ -19,6 +19,7 @@
 #include <linux/io.h>
 
 #include <bcmdevs.h>
+#include "wlc_types.h"
 #include <chipcommon.h>
 #include <brcmu_utils.h>
 #include "wlc_scb.h"

diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h
index 3442d32eb5b5812d9e6a145df80d033bc7c41643..12c35bd3a511bb62692a246d755aee714313629f 100644 (file)
--- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h
+++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h
@@ -41,6 +41,129 @@ do {                                                \
 
 #define WL_ERROR_ON()          (brcm_msg_level & LOG_ERROR_VAL)
 
+/* register access macros */
+#if defined(BCMSDIO)
+#ifdef BRCM_FULLMAC
+#include <bcmsdh.h>
+#endif
+#endif
+
+#if defined(BCMSDIO)
+#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op
+#define SELECT_BUS_READ(mmap_op, bus_op) bus_op
+#else
+#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op
+#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op
+#endif
+
+/* register access macros */
+#ifndef __BIG_ENDIAN
+#ifndef __mips__
+#define R_REG(r) (\
+       SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \
+       readb((volatile u8*)(r)) : \
+       sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \
+       readl((volatile u32*)(r)), bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \
+)
+#else                          /* __mips__ */
+#define R_REG(r) (\
+       SELECT_BUS_READ( \
+               ({ \
+                       __typeof(*(r)) __osl_v; \
+                       __asm__ __volatile__("sync"); \
+                       switch (sizeof(*(r))) { \
+                       case sizeof(u8): \
+                               __osl_v = readb((volatile u8*)(r)); \
+                               break; \
+                       case sizeof(u16): \
+                               __osl_v = readw((volatile u16*)(r)); \
+                               break; \
+                       case sizeof(u32): \
+                               __osl_v = \
+                               readl((volatile u32*)(r)); \
+                               break; \
+                       } \
+                       __asm__ __volatile__("sync"); \
+                       __osl_v; \
+               }), \
+               ({ \
+                       __typeof(*(r)) __osl_v; \
+                       __asm__ __volatile__("sync"); \
+                       __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \
+                       __asm__ __volatile__("sync"); \
+                       __osl_v; \
+               })) \
+)
+#endif                         /* __mips__ */
+
+#define W_REG(r, v) do { \
+       SELECT_BUS_WRITE( \
+               switch (sizeof(*(r))) { \
+               case sizeof(u8): \
+                       writeb((u8)(v), (volatile u8*)(r)); break; \
+               case sizeof(u16): \
+                       writew((u16)(v), (volatile u16*)(r)); break; \
+               case sizeof(u32): \
+                       writel((u32)(v), (volatile u32*)(r)); break; \
+               }, \
+               bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v))); \
+       } while (0)
+#else                          /* __BIG_ENDIAN */
+#define R_REG(r) (\
+       SELECT_BUS_READ( \
+               ({ \
+                       __typeof(*(r)) __osl_v; \
+                       switch (sizeof(*(r))) { \
+                       case sizeof(u8): \
+                               __osl_v = \
+                               readb((volatile u8*)((r)^3)); \
+                               break; \
+                       case sizeof(u16): \
+                               __osl_v = \
+                               readw((volatile u16*)((r)^2)); \
+                               break; \
+                       case sizeof(u32): \
+                               __osl_v = readl((volatile u32*)(r)); \
+                               break; \
+                       } \
+                       __osl_v; \
+               }), \
+               bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \
+)
+#define W_REG(r, v) do { \
+       SELECT_BUS_WRITE( \
+               switch (sizeof(*(r))) { \
+               case sizeof(u8):        \
+                       writeb((u8)(v), \
+                       (volatile u8*)((r)^3)); break; \
+               case sizeof(u16):       \
+                       writew((u16)(v), \
+                       (volatile u16*)((r)^2)); break; \
+               case sizeof(u32):       \
+                       writel((u32)(v), \
+                       (volatile u32*)(r)); break; \
+               }, \
+               bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v)); \
+       } while (0)
+#endif                         /* __BIG_ENDIAN */
+
+#ifdef __mips__
+/*
+ * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder
+ * transactions. As a fix, a read after write is performed on certain places
+ * in the code. Older chips and the newer 5357 family don't require this fix.
+ */
+#define W_REG_FLUSH(r, v)      ({ W_REG((r), (v)); (void)R_REG(r); })
+#else
+#define W_REG_FLUSH(r, v)      W_REG((r), (v))
+#endif                         /* __mips__ */
+
+#define AND_REG(r, v)  W_REG((r), R_REG(r) & (v))
+#define OR_REG(r, v)   W_REG((r), R_REG(r) | (v))
+
+#define SET_REG(r, mask, val) \
+               W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
+
 /* forward declarations */
 struct sk_buff;
 struct brcms_info;

diff --git a/drivers/staging/brcm80211/include/brcmu_utils.h b/drivers/staging/brcm80211/include/brcmu_utils.h
index 260d0b6c35189f9ecb8342931cfc5a2daf54dd99..94ae60493fe58b649b4865e7f8dcf32147988153 100644 (file)
--- a/drivers/staging/brcm80211/include/brcmu_utils.h
+++ b/drivers/staging/brcm80211/include/brcmu_utils.h
@@ -235,21 +235,6 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg,
 #define REG_MAP(pa, size)       (void *)(0)
 #endif
 
-/* register access macros */
-#if defined(BCMSDIO)
-#ifdef BRCM_FULLMAC
-#include <bcmsdh.h>
-#endif
-#endif
-
-#if defined(BCMSDIO)
-#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op
-#define SELECT_BUS_READ(mmap_op, bus_op) bus_op
-#else
-#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op
-#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op
-#endif
-
 /* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */
 #define        PKTBUFSZ        2048
 
@@ -259,114 +244,6 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg,
 #include <linux/string.h>      /* for mem*, str* */
 #endif
 
-/* register access macros */
-#ifndef __BIG_ENDIAN
-#ifndef __mips__
-#define R_REG(r) (\
-       SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \
-       readb((volatile u8*)(r)) : \
-       sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \
-       readl((volatile u32*)(r)), bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \
-)
-#else                          /* __mips__ */
-#define R_REG(r) (\
-       SELECT_BUS_READ( \
-               ({ \
-                       __typeof(*(r)) __osl_v; \
-                       __asm__ __volatile__("sync"); \
-                       switch (sizeof(*(r))) { \
-                       case sizeof(u8): \
-                               __osl_v = readb((volatile u8*)(r)); \
-                               break; \
-                       case sizeof(u16): \
-                               __osl_v = readw((volatile u16*)(r)); \
-                               break; \
-                       case sizeof(u32): \
-                               __osl_v = \
-                               readl((volatile u32*)(r)); \
-                               break; \
-                       } \
-                       __asm__ __volatile__("sync"); \
-                       __osl_v; \
-               }), \
-               ({ \
-                       __typeof(*(r)) __osl_v; \
-                       __asm__ __volatile__("sync"); \
-                       __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \
-                       __asm__ __volatile__("sync"); \
-                       __osl_v; \
-               })) \
-)
-#endif                         /* __mips__ */
-
-#define W_REG(r, v) do { \
-       SELECT_BUS_WRITE( \
-               switch (sizeof(*(r))) { \
-               case sizeof(u8): \
-                       writeb((u8)(v), (volatile u8*)(r)); break; \
-               case sizeof(u16): \
-                       writew((u16)(v), (volatile u16*)(r)); break; \
-               case sizeof(u32): \
-                       writel((u32)(v), (volatile u32*)(r)); break; \
-               }, \
-               bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v))); \
-       } while (0)
-#else                          /* __BIG_ENDIAN */
-#define R_REG(r) (\
-       SELECT_BUS_READ( \
-               ({ \
-                       __typeof(*(r)) __osl_v; \
-                       switch (sizeof(*(r))) { \
-                       case sizeof(u8): \
-                               __osl_v = \
-                               readb((volatile u8*)((r)^3)); \
-                               break; \
-                       case sizeof(u16): \
-                               __osl_v = \
-                               readw((volatile u16*)((r)^2)); \
-                               break; \
-                       case sizeof(u32): \
-                               __osl_v = readl((volatile u32*)(r)); \
-                               break; \
-                       } \
-                       __osl_v; \
-               }), \
-               bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \
-)
-#define W_REG(r, v) do { \
-       SELECT_BUS_WRITE( \
-               switch (sizeof(*(r))) { \
-               case sizeof(u8):        \
-                       writeb((u8)(v), \
-                       (volatile u8*)((r)^3)); break; \
-               case sizeof(u16):       \
-                       writew((u16)(v), \
-                       (volatile u16*)((r)^2)); break; \
-               case sizeof(u32):       \
-                       writel((u32)(v), \
-                       (volatile u32*)(r)); break; \
-               }, \
-               bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v)); \
-       } while (0)
-#endif                         /* __BIG_ENDIAN */
-
-#ifdef __mips__
-/*
- * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder
- * transactions. As a fix, a read after write is performed on certain places
- * in the code. Older chips and the newer 5357 family don't require this fix.
- */
-#define W_REG_FLUSH(r, v)      ({ W_REG((r), (v)); (void)R_REG(r); })
-#else
-#define W_REG_FLUSH(r, v)      W_REG((r), (v))
-#endif                         /* __mips__ */
-
-#define AND_REG(r, v)  W_REG((r), R_REG(r) & (v))
-#define OR_REG(r, v)   W_REG((r), R_REG(r) | (v))
-
-#define SET_REG(r, mask, val) \
-               W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
-
 #ifndef setbit
 #ifndef NBBY                   /* the BSD family defines NBBY */
 #define        NBBY    8               /* 8 bits per byte */