rt2x00: rt2800pci: move TX descriptor functions to the rt2800mmio module
authorGabor Juhos <juhosg@openwrt.org>
Thu, 17 Oct 2013 07:42:17 +0000 (09:42 +0200)
committerJohn W. Linville <linville@tuxdriver.com>
Fri, 18 Oct 2013 18:06:58 +0000 (14:06 -0400)
Move the functions into a separate module, in order
to make those usable from other modules. Also move
the TX descriptor related defines from rt2800pci.h
into rt2800mmio.h.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/rt2x00/Kconfig
drivers/net/wireless/rt2x00/rt2800mmio.c
drivers/net/wireless/rt2x00/rt2800mmio.h
drivers/net/wireless/rt2x00/rt2800pci.c
drivers/net/wireless/rt2x00/rt2800pci.h

index 2232b1155983df16251b79497ee758c40a0df757..535ad3a6970c8c474ff8c390567f5345c10f54a4 100644 (file)
@@ -205,6 +205,7 @@ config RT2800_LIB
 
 config RT2800_LIB_MMIO
        tristate
+       select RT2X00_LIB_MMIO
 
 config RT2X00_LIB_MMIO
        tristate
index a2b9848f401281badf0374dfee729a6b8767b450..d2ebb68b97af320c9895fcb29f8a7e346e332779 100644 (file)
 
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/export.h>
+
+#include "rt2x00.h"
+#include "rt2x00mmio.h"
+#include "rt2800mmio.h"
+
+/*
+ * TX descriptor initialization
+ */
+__le32 *rt2800mmio_get_txwi(struct queue_entry *entry)
+{
+       return (__le32 *) entry->skb->data;
+}
+EXPORT_SYMBOL_GPL(rt2800mmio_get_txwi);
+
+void rt2800mmio_write_tx_desc(struct queue_entry *entry,
+                             struct txentry_desc *txdesc)
+{
+       struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
+       struct queue_entry_priv_mmio *entry_priv = entry->priv_data;
+       __le32 *txd = entry_priv->desc;
+       u32 word;
+       const unsigned int txwi_size = entry->queue->winfo_size;
+
+       /*
+        * The buffers pointed by SD_PTR0/SD_LEN0 and SD_PTR1/SD_LEN1
+        * must contains a TXWI structure + 802.11 header + padding + 802.11
+        * data. We choose to have SD_PTR0/SD_LEN0 only contains TXWI and
+        * SD_PTR1/SD_LEN1 contains 802.11 header + padding + 802.11
+        * data. It means that LAST_SEC0 is always 0.
+        */
+
+       /*
+        * Initialize TX descriptor
+        */
+       word = 0;
+       rt2x00_set_field32(&word, TXD_W0_SD_PTR0, skbdesc->skb_dma);
+       rt2x00_desc_write(txd, 0, word);
+
+       word = 0;
+       rt2x00_set_field32(&word, TXD_W1_SD_LEN1, entry->skb->len);
+       rt2x00_set_field32(&word, TXD_W1_LAST_SEC1,
+                          !test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
+       rt2x00_set_field32(&word, TXD_W1_BURST,
+                          test_bit(ENTRY_TXD_BURST, &txdesc->flags));
+       rt2x00_set_field32(&word, TXD_W1_SD_LEN0, txwi_size);
+       rt2x00_set_field32(&word, TXD_W1_LAST_SEC0, 0);
+       rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 0);
+       rt2x00_desc_write(txd, 1, word);
+
+       word = 0;
+       rt2x00_set_field32(&word, TXD_W2_SD_PTR1,
+                          skbdesc->skb_dma + txwi_size);
+       rt2x00_desc_write(txd, 2, word);
+
+       word = 0;
+       rt2x00_set_field32(&word, TXD_W3_WIV,
+                          !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags));
+       rt2x00_set_field32(&word, TXD_W3_QSEL, 2);
+       rt2x00_desc_write(txd, 3, word);
+
+       /*
+        * Register descriptor details in skb frame descriptor.
+        */
+       skbdesc->desc = txd;
+       skbdesc->desc_len = TXD_DESC_SIZE;
+}
+EXPORT_SYMBOL_GPL(rt2800mmio_write_tx_desc);
 
 #include "rt2x00.h"
 
index 32f9dcde9fad07ccf4f1b1b0356f1a5ee12c5657..026664002d01947ee763a39457fe5694a0f086b6 100644 (file)
 #ifndef RT2800MMIO_H
 #define RT2800MMIO_H
 
+/*
+ * DMA descriptor defines.
+ */
+#define TXD_DESC_SIZE                  (4 * sizeof(__le32))
+
+/*
+ * TX descriptor format for TX, PRIO and Beacon Ring.
+ */
+
+/*
+ * Word0
+ */
+#define TXD_W0_SD_PTR0                 FIELD32(0xffffffff)
+
+/*
+ * Word1
+ */
+#define TXD_W1_SD_LEN1                 FIELD32(0x00003fff)
+#define TXD_W1_LAST_SEC1               FIELD32(0x00004000)
+#define TXD_W1_BURST                   FIELD32(0x00008000)
+#define TXD_W1_SD_LEN0                 FIELD32(0x3fff0000)
+#define TXD_W1_LAST_SEC0               FIELD32(0x40000000)
+#define TXD_W1_DMA_DONE                        FIELD32(0x80000000)
+
+/*
+ * Word2
+ */
+#define TXD_W2_SD_PTR1                 FIELD32(0xffffffff)
+
+/*
+ * Word3
+ * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
+ * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
+ *       0:MGMT, 1:HCCA 2:EDCA
+ */
+#define TXD_W3_WIV                     FIELD32(0x01000000)
+#define TXD_W3_QSEL                    FIELD32(0x06000000)
+#define TXD_W3_TCO                     FIELD32(0x20000000)
+#define TXD_W3_UCO                     FIELD32(0x40000000)
+#define TXD_W3_ICO                     FIELD32(0x80000000)
+
+
+/* TX descriptor initialization */
+__le32 *rt2800mmio_get_txwi(struct queue_entry *entry);
+void rt2800mmio_write_tx_desc(struct queue_entry *entry,
+                             struct txentry_desc *txdesc);
+
 #endif /* RT2800MMIO_H */
index ddc6a42ad7b922b8a9731f049c6fedddd0bf3e53..b2e2b091dabbddd13de331f156f82935dda348f5 100644 (file)
@@ -45,6 +45,7 @@
 #include "rt2x00pci.h"
 #include "rt2x00soc.h"
 #include "rt2800lib.h"
+#include "rt2800mmio.h"
 #include "rt2800.h"
 #include "rt2800pci.h"
 
@@ -626,67 +627,6 @@ static int rt2800pci_set_device_state(struct rt2x00_dev *rt2x00dev,
        return retval;
 }
 
-/*
- * TX descriptor initialization
- */
-static __le32 *rt2800mmio_get_txwi(struct queue_entry *entry)
-{
-       return (__le32 *) entry->skb->data;
-}
-
-static void rt2800mmio_write_tx_desc(struct queue_entry *entry,
-                                    struct txentry_desc *txdesc)
-{
-       struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
-       struct queue_entry_priv_mmio *entry_priv = entry->priv_data;
-       __le32 *txd = entry_priv->desc;
-       u32 word;
-       const unsigned int txwi_size = entry->queue->winfo_size;
-
-       /*
-        * The buffers pointed by SD_PTR0/SD_LEN0 and SD_PTR1/SD_LEN1
-        * must contains a TXWI structure + 802.11 header + padding + 802.11
-        * data. We choose to have SD_PTR0/SD_LEN0 only contains TXWI and
-        * SD_PTR1/SD_LEN1 contains 802.11 header + padding + 802.11
-        * data. It means that LAST_SEC0 is always 0.
-        */
-
-       /*
-        * Initialize TX descriptor
-        */
-       word = 0;
-       rt2x00_set_field32(&word, TXD_W0_SD_PTR0, skbdesc->skb_dma);
-       rt2x00_desc_write(txd, 0, word);
-
-       word = 0;
-       rt2x00_set_field32(&word, TXD_W1_SD_LEN1, entry->skb->len);
-       rt2x00_set_field32(&word, TXD_W1_LAST_SEC1,
-                          !test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
-       rt2x00_set_field32(&word, TXD_W1_BURST,
-                          test_bit(ENTRY_TXD_BURST, &txdesc->flags));
-       rt2x00_set_field32(&word, TXD_W1_SD_LEN0, txwi_size);
-       rt2x00_set_field32(&word, TXD_W1_LAST_SEC0, 0);
-       rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 0);
-       rt2x00_desc_write(txd, 1, word);
-
-       word = 0;
-       rt2x00_set_field32(&word, TXD_W2_SD_PTR1,
-                          skbdesc->skb_dma + txwi_size);
-       rt2x00_desc_write(txd, 2, word);
-
-       word = 0;
-       rt2x00_set_field32(&word, TXD_W3_WIV,
-                          !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags));
-       rt2x00_set_field32(&word, TXD_W3_QSEL, 2);
-       rt2x00_desc_write(txd, 3, word);
-
-       /*
-        * Register descriptor details in skb frame descriptor.
-        */
-       skbdesc->desc = txd;
-       skbdesc->desc_len = TXD_DESC_SIZE;
-}
-
 /*
  * RX control handlers
  */
index ab22a087c50dba15cf67b3ff237f8915bc8e2996..ecd154ea56d0bef906223174122a3c07fefe0126 100644 (file)
 /*
  * DMA descriptor defines.
  */
-#define TXD_DESC_SIZE                  (4 * sizeof(__le32))
 #define RXD_DESC_SIZE                  (4 * sizeof(__le32))
 
-/*
- * TX descriptor format for TX, PRIO and Beacon Ring.
- */
-
-/*
- * Word0
- */
-#define TXD_W0_SD_PTR0                 FIELD32(0xffffffff)
-
-/*
- * Word1
- */
-#define TXD_W1_SD_LEN1                 FIELD32(0x00003fff)
-#define TXD_W1_LAST_SEC1               FIELD32(0x00004000)
-#define TXD_W1_BURST                   FIELD32(0x00008000)
-#define TXD_W1_SD_LEN0                 FIELD32(0x3fff0000)
-#define TXD_W1_LAST_SEC0               FIELD32(0x40000000)
-#define TXD_W1_DMA_DONE                        FIELD32(0x80000000)
-
-/*
- * Word2
- */
-#define TXD_W2_SD_PTR1                 FIELD32(0xffffffff)
-
-/*
- * Word3
- * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
- * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
- *       0:MGMT, 1:HCCA 2:EDCA
- */
-#define TXD_W3_WIV                     FIELD32(0x01000000)
-#define TXD_W3_QSEL                    FIELD32(0x06000000)
-#define TXD_W3_TCO                     FIELD32(0x20000000)
-#define TXD_W3_UCO                     FIELD32(0x40000000)
-#define TXD_W3_ICO                     FIELD32(0x80000000)
-
 /*
  * RX descriptor format for RX Ring.
  */