Merge tag 'arc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull ARC architecture updates from Vineet Gupta:

 - support for HS38 cores based on ARCv2 ISA

     ARCv2 is the next generation ISA from Synopsys and basis for the
     HS3{4,6,8} families of processors which retain the traditional ARC mantra of
     low power and configurability and are now more performant and feature rich.

     HS38x is a 10 stage pipeline core which supports MMU (with huge pages) and
     SMP (upto 4 cores) among other features.

     + www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor
     + http://news.synopsys.com/2014-10-14-New-DesignWare-ARC-HS38-Processor-Doubles-Performance-for-Embedded-Linux-Applications
     + http://www.embedded.com/electronics-news/4435975/Synopsys-ARC-HS38-core-gives-2X-boost-to-Linux-based-apps

 - support for ARC SDP (Software Development platform): Main Board + CPU Cards
    = AXS101: CPU Card with ARC700 in silicon @ 700 MHz
    = AXS103: CPU Card with HS38x in FPGA

 - refactoring of ARCompact port to accomodate new ARCv2 ISA

 - misc updates/cleanups

* tag 'arc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (72 commits)
  ARC: Fix build failures for ARCompact in linux-next after ARCv2 support
  ARCv2: Allow older gcc to cope with new regime of ARCv2/ARCompact support
  ARCv2: [vdk] dts files and defconfig for HS38 VDK
  ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores
  ARC: [axs101] Prepare for AXS103
  ARCv2: [nsim*hs*] Support simulation platforms for HS38x cores
  ARCv2: All bits in place, allow ARCv2 builds
  ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency)
  ARCv2: STAR 9000837815 workaround hardware exclusive transactions livelock
  ARC: Reduce bitops lines of code using macros
  ARCv2: barriers
  arch: conditionally define smp_{mb,rmb,wmb}
  ARC: add smp barriers around atomics per Documentation/atomic_ops.txt
  ARC: add compiler barrier to LLSC based cmpxchg
  ARCv2: SMP: intc: IDU 2nd level intc for dynamic IRQ distribution
  ARCv2: SMP: clocksource: Enable Global Real Time counter
  ARCv2: SMP: ARConnect debug/robustness
  ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al
  ARC: make plat_smp_ops weak to allow over-rides
  ARCv2: clocksource: Introduce 64bit local RTC counter
  ...

diff --cc MAINTAINERS
index 0e6b09150aad52720d8f98b1802e0a4005e688af,3a9afc9ec050633b5214877cc0b5493b7f2f64a1..ab6fb58b3873cc4b628784cec6b2488c0cb7c850
--- 1/MAINTAINERS
--- 2/MAINTAINERS
+++ b/MAINTAINERS
@@@ -9832,13 -9579,13 +9832,20 @@@ F:   arch/arc
  F:    Documentation/devicetree/bindings/arc/
  F:    drivers/tty/serial/arc_uart.c
  
+ SYNOPSYS ARC SDP platform support
+ M:    Alexey Brodkin <abrodkin@synopsys.com>
+ S:    Supported
+ F:    arch/arc/plat-axs10x
+ F:    arch/arc/boot/dts/ax*
+ F:    Documentation/devicetree/bindings/arc/axs10*
+ 
 +SYSTEM CONFIGURATION (SYSCON)
 +M:    Lee Jones <lee.jones@linaro.org>
 +M:    Arnd Bergmann <arnd@arndb.de>
 +T:    git git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git
 +S:    Supported
 +F:    drivers/mfd/syscon.c
 +
  SYSV FILESYSTEM
  M:    Christoph Hellwig <hch@infradead.org>
  S:    Maintained

diff --cc arch/arc/include/asm/Kbuild
Simple merge

diff --cc arch/arc/include/asm/io.h
Simple merge

diff --cc include/asm-generic/barrier.h
index e6a83d712ef6772ac7265e914837da7806e21441,270b7c989ea102477b36ce2fab92bb39098361e4..55e3abc2d027270b0e6e1c554b9f376d3cd355f1
--- 1/include/asm-generic/barrier.h
--- 2/include/asm-generic/barrier.h
+++ b/include/asm-generic/barrier.h
@@@ -55,19 -55,44 +55,45 @@@
  #endif
  
  #ifdef CONFIG_SMP
+ 
+ #ifndef smp_mb
  #define smp_mb()      mb()
+ #endif
+ 
+ #ifndef smp_rmb
  #define smp_rmb()     rmb()
+ #endif
+ 
+ #ifndef smp_wmb
  #define smp_wmb()     wmb()
+ #endif
+ 
+ #ifndef smp_read_barrier_depends
  #define smp_read_barrier_depends()    read_barrier_depends()
- #else
+ #endif
+ 
 -#else
++#else /* !CONFIG_SMP */
++
+ #ifndef smp_mb
  #define smp_mb()      barrier()
+ #endif
+ 
+ #ifndef smp_rmb
  #define smp_rmb()     barrier()
+ #endif
+ 
+ #ifndef smp_wmb
  #define smp_wmb()     barrier()
+ #endif
+ 
+ #ifndef smp_read_barrier_depends
  #define smp_read_barrier_depends()    do { } while (0)
  #endif
  
 -#endif
++#endif        /* CONFIG_SMP */
+ 
 -#ifndef set_mb
 -#define set_mb(var, value)  do { (var) = (value); mb(); } while (0)
 +#ifndef smp_store_mb
 +#define smp_store_mb(var, value)  do { WRITE_ONCE(var, value); mb(); } while (0)
  #endif
  
  #ifndef smp_mb__before_atomic