sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include "hda_codec.h"
  41 #include "hda_local.h"
  42 #include "hda_jack.h"
  43
  44 static bool static_hdmi_pcm;
  45 module_param(static_hdmi_pcm, bool, 0644);
  46 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  47
  48 #define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
  49 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
  50
  51 struct hdmi_spec_per_cvt {
  52         hda_nid_t cvt_nid;
  53         int assigned;
  54         unsigned int channels_min;
  55         unsigned int channels_max;
  56         u32 rates;
  57         u64 formats;
  58         unsigned int maxbps;
  59 };
  60
  61 /* max. connections to a widget */
  62 #define HDA_MAX_CONNECTIONS     32
  63
  64 struct hdmi_spec_per_pin {
  65         hda_nid_t pin_nid;
  66         int num_mux_nids;
  67         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  68         hda_nid_t cvt_nid;
  69
  70         struct hda_codec *codec;
  71         struct hdmi_eld sink_eld;
  72         struct mutex lock;
  73         struct delayed_work work;
  74         struct snd_kcontrol *eld_ctl;
  75         int repoll_count;
  76         bool setup; /* the stream has been set up by prepare callback */
  77         int channels; /* current number of channels */
  78         bool non_pcm;
  79         bool chmap_set;         /* channel-map override by ALSA API? */
  80         unsigned char chmap[8]; /* ALSA API channel-map */
  81         char pcm_name[8];       /* filled in build_pcm callbacks */
  82 #ifdef CONFIG_PROC_FS
  83         struct snd_info_entry *proc_entry;
  84 #endif
  85 };
  86
  87 struct cea_channel_speaker_allocation;
  88
  89 /* operations used by generic code that can be overridden by patches */
  90 struct hdmi_ops {
  91         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  92                            unsigned char *buf, int *eld_size);
  93
  94         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
  95         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
  96                                     int asp_slot);
  97         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
  98                                     int asp_slot, int channel);
  99
 100         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 101                                     int ca, int active_channels, int conn_type);
 102
 103         /* enable/disable HBR (HD passthrough) */
 104         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 105
 106         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 107                             hda_nid_t pin_nid, u32 stream_tag, int format);
 108
 109         /* Helpers for producing the channel map TLVs. These can be overridden
 110          * for devices that have non-standard mapping requirements. */
 111         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 112                                                  int channels);
 113         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 114                                        unsigned int *chmap, int channels);
 115
 116         /* check that the user-given chmap is supported */
 117         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 118 };
 119
 120 struct hdmi_spec {
 121         int num_cvts;
 122         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 123         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 124
 125         int num_pins;
 126         struct snd_array pins; /* struct hdmi_spec_per_pin */
 127         struct snd_array pcm_rec; /* struct hda_pcm */
 128         unsigned int channels_max; /* max over all cvts */
 129
 130         struct hdmi_eld temp_eld;
 131         struct hdmi_ops ops;
 132         /*
 133          * Non-generic VIA/NVIDIA specific
 134          */
 135         struct hda_multi_out multiout;
 136         struct hda_pcm_stream pcm_playback;
 137 };
 138
 139
 140 struct hdmi_audio_infoframe {
 141         u8 type; /* 0x84 */
 142         u8 ver;  /* 0x01 */
 143         u8 len;  /* 0x0a */
 144
 145         u8 checksum;
 146
 147         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 148         u8 SS01_SF24;
 149         u8 CXT04;
 150         u8 CA;
 151         u8 LFEPBL01_LSV36_DM_INH7;
 152 };
 153
 154 struct dp_audio_infoframe {
 155         u8 type; /* 0x84 */
 156         u8 len;  /* 0x1b */
 157         u8 ver;  /* 0x11 << 2 */
 158
 159         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 160         u8 SS01_SF24;
 161         u8 CXT04;
 162         u8 CA;
 163         u8 LFEPBL01_LSV36_DM_INH7;
 164 };
 165
 166 union audio_infoframe {
 167         struct hdmi_audio_infoframe hdmi;
 168         struct dp_audio_infoframe dp;
 169         u8 bytes[0];
 170 };
 171
 172 /*
 173  * CEA speaker placement:
 174  *
 175  *        FLH       FCH        FRH
 176  *  FLW    FL  FLC   FC   FRC   FR   FRW
 177  *
 178  *                                  LFE
 179  *                     TC
 180  *
 181  *          RL  RLC   RC   RRC   RR
 182  *
 183  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 184  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 185  */
 186 enum cea_speaker_placement {
 187         FL  = (1 <<  0),        /* Front Left           */
 188         FC  = (1 <<  1),        /* Front Center         */
 189         FR  = (1 <<  2),        /* Front Right          */
 190         FLC = (1 <<  3),        /* Front Left Center    */
 191         FRC = (1 <<  4),        /* Front Right Center   */
 192         RL  = (1 <<  5),        /* Rear Left            */
 193         RC  = (1 <<  6),        /* Rear Center          */
 194         RR  = (1 <<  7),        /* Rear Right           */
 195         RLC = (1 <<  8),        /* Rear Left Center     */
 196         RRC = (1 <<  9),        /* Rear Right Center    */
 197         LFE = (1 << 10),        /* Low Frequency Effect */
 198         FLW = (1 << 11),        /* Front Left Wide      */
 199         FRW = (1 << 12),        /* Front Right Wide     */
 200         FLH = (1 << 13),        /* Front Left High      */
 201         FCH = (1 << 14),        /* Front Center High    */
 202         FRH = (1 << 15),        /* Front Right High     */
 203         TC  = (1 << 16),        /* Top Center           */
 204 };
 205
 206 /*
 207  * ELD SA bits in the CEA Speaker Allocation data block
 208  */
 209 static int eld_speaker_allocation_bits[] = {
 210         [0] = FL | FR,
 211         [1] = LFE,
 212         [2] = FC,
 213         [3] = RL | RR,
 214         [4] = RC,
 215         [5] = FLC | FRC,
 216         [6] = RLC | RRC,
 217         /* the following are not defined in ELD yet */
 218         [7] = FLW | FRW,
 219         [8] = FLH | FRH,
 220         [9] = TC,
 221         [10] = FCH,
 222 };
 223
 224 struct cea_channel_speaker_allocation {
 225         int ca_index;
 226         int speakers[8];
 227
 228         /* derived values, just for convenience */
 229         int channels;
 230         int spk_mask;
 231 };
 232
 233 /*
 234  * ALSA sequence is:
 235  *
 236  *       surround40   surround41   surround50   surround51   surround71
 237  * ch0   front left   =            =            =            =
 238  * ch1   front right  =            =            =            =
 239  * ch2   rear left    =            =            =            =
 240  * ch3   rear right   =            =            =            =
 241  * ch4                LFE          center       center       center
 242  * ch5                                          LFE          LFE
 243  * ch6                                                       side left
 244  * ch7                                                       side right
 245  *
 246  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 247  */
 248 static int hdmi_channel_mapping[0x32][8] = {
 249         /* stereo */
 250         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 251         /* 2.1 */
 252         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 253         /* Dolby Surround */
 254         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 255         /* surround40 */
 256         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 257         /* 4ch */
 258         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 259         /* surround41 */
 260         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 261         /* surround50 */
 262         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 263         /* surround51 */
 264         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 265         /* 7.1 */
 266         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 267 };
 268
 269 /*
 270  * This is an ordered list!
 271  *
 272  * The preceding ones have better chances to be selected by
 273  * hdmi_channel_allocation().
 274  */
 275 static struct cea_channel_speaker_allocation channel_allocations[] = {
 276 /*                        channel:   7     6    5    4    3     2    1    0  */
 277 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 278                                  /* 2.1 */
 279 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 280                                  /* Dolby Surround */
 281 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 282                                  /* surround40 */
 283 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 284                                  /* surround41 */
 285 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 286                                  /* surround50 */
 287 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 288                                  /* surround51 */
 289 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 290                                  /* 6.1 */
 291 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 292                                  /* surround71 */
 293 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 294
 295 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 296 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 297 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 298 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 299 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 300 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 301 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 302 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 303 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 304 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 305 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 306 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 307 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 308 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 309 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 310 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 311 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 312 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 313 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 314 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 315 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 316 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 317 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 318 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 319 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 320 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 321 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 322 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 323 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 324 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 325 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 326 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 327 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 328 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 329 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 330 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 331 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 332 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 333 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 334 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 335 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 336 };
 337
 338
 339 /*
 340  * HDMI routines
 341  */
 342
 343 #define get_pin(spec, idx) \
 344         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 345 #define get_cvt(spec, idx) \
 346         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 347 #define get_pcm_rec(spec, idx) \
 348         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
 349
 350 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
 351 {
 352         int pin_idx;
 353
 354         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 355                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 356                         return pin_idx;
 357
 358         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
 359         return -EINVAL;
 360 }
 361
 362 static int hinfo_to_pin_index(struct hdmi_spec *spec,
 363                               struct hda_pcm_stream *hinfo)
 364 {
 365         int pin_idx;
 366
 367         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 368                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
 369                         return pin_idx;
 370
 371         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
 372         return -EINVAL;
 373 }
 374
 375 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
 376 {
 377         int cvt_idx;
 378
 379         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 380                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 381                         return cvt_idx;
 382
 383         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
 384         return -EINVAL;
 385 }
 386
 387 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 388                         struct snd_ctl_elem_info *uinfo)
 389 {
 390         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 391         struct hdmi_spec *spec = codec->spec;
 392         struct hdmi_spec_per_pin *per_pin;
 393         struct hdmi_eld *eld;
 394         int pin_idx;
 395
 396         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 397
 398         pin_idx = kcontrol->private_value;
 399         per_pin = get_pin(spec, pin_idx);
 400         eld = &per_pin->sink_eld;
 401
 402         mutex_lock(&per_pin->lock);
 403         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 404         mutex_unlock(&per_pin->lock);
 405
 406         return 0;
 407 }
 408
 409 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 410                         struct snd_ctl_elem_value *ucontrol)
 411 {
 412         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 413         struct hdmi_spec *spec = codec->spec;
 414         struct hdmi_spec_per_pin *per_pin;
 415         struct hdmi_eld *eld;
 416         int pin_idx;
 417
 418         pin_idx = kcontrol->private_value;
 419         per_pin = get_pin(spec, pin_idx);
 420         eld = &per_pin->sink_eld;
 421
 422         mutex_lock(&per_pin->lock);
 423         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 424                 mutex_unlock(&per_pin->lock);
 425                 snd_BUG();
 426                 return -EINVAL;
 427         }
 428
 429         memset(ucontrol->value.bytes.data, 0,
 430                ARRAY_SIZE(ucontrol->value.bytes.data));
 431         if (eld->eld_valid)
 432                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 433                        eld->eld_size);
 434         mutex_unlock(&per_pin->lock);
 435
 436         return 0;
 437 }
 438
 439 static struct snd_kcontrol_new eld_bytes_ctl = {
 440         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 441         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 442         .name = "ELD",
 443         .info = hdmi_eld_ctl_info,
 444         .get = hdmi_eld_ctl_get,
 445 };
 446
 447 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 448                         int device)
 449 {
 450         struct snd_kcontrol *kctl;
 451         struct hdmi_spec *spec = codec->spec;
 452         int err;
 453
 454         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 455         if (!kctl)
 456                 return -ENOMEM;
 457         kctl->private_value = pin_idx;
 458         kctl->id.device = device;
 459
 460         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 461         if (err < 0)
 462                 return err;
 463
 464         get_pin(spec, pin_idx)->eld_ctl = kctl;
 465         return 0;
 466 }
 467
 468 #ifdef BE_PARANOID
 469 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 470                                 int *packet_index, int *byte_index)
 471 {
 472         int val;
 473
 474         val = snd_hda_codec_read(codec, pin_nid, 0,
 475                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 476
 477         *packet_index = val >> 5;
 478         *byte_index = val & 0x1f;
 479 }
 480 #endif
 481
 482 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 483                                 int packet_index, int byte_index)
 484 {
 485         int val;
 486
 487         val = (packet_index << 5) | (byte_index & 0x1f);
 488
 489         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 490 }
 491
 492 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 493                                 unsigned char val)
 494 {
 495         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 496 }
 497
 498 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 499 {
 500         /* Unmute */
 501         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 502                 snd_hda_codec_write(codec, pin_nid, 0,
 503                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 504         /* Enable pin out: some machines with GM965 gets broken output when
 505          * the pin is disabled or changed while using with HDMI
 506          */
 507         snd_hda_codec_write(codec, pin_nid, 0,
 508                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
 509 }
 510
 511 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 512 {
 513         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 514                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 515 }
 516
 517 static void hdmi_set_channel_count(struct hda_codec *codec,
 518                                    hda_nid_t cvt_nid, int chs)
 519 {
 520         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 521                 snd_hda_codec_write(codec, cvt_nid, 0,
 522                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 523 }
 524
 525 /*
 526  * ELD proc files
 527  */
 528
 529 #ifdef CONFIG_PROC_FS
 530 static void print_eld_info(struct snd_info_entry *entry,
 531                            struct snd_info_buffer *buffer)
 532 {
 533         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 534
 535         mutex_lock(&per_pin->lock);
 536         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 537         mutex_unlock(&per_pin->lock);
 538 }
 539
 540 static void write_eld_info(struct snd_info_entry *entry,
 541                            struct snd_info_buffer *buffer)
 542 {
 543         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 544
 545         mutex_lock(&per_pin->lock);
 546         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 547         mutex_unlock(&per_pin->lock);
 548 }
 549
 550 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 551 {
 552         char name[32];
 553         struct hda_codec *codec = per_pin->codec;
 554         struct snd_info_entry *entry;
 555         int err;
 556
 557         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 558         err = snd_card_proc_new(codec->bus->card, name, &entry);
 559         if (err < 0)
 560                 return err;
 561
 562         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 563         entry->c.text.write = write_eld_info;
 564         entry->mode |= S_IWUSR;
 565         per_pin->proc_entry = entry;
 566
 567         return 0;
 568 }
 569
 570 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 571 {
 572         if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
 573                 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
 574                 per_pin->proc_entry = NULL;
 575         }
 576 }
 577 #else
 578 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 579                                int index)
 580 {
 581         return 0;
 582 }
 583 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 584 {
 585 }
 586 #endif
 587
 588 /*
 589  * Channel mapping routines
 590  */
 591
 592 /*
 593  * Compute derived values in channel_allocations[].
 594  */
 595 static void init_channel_allocations(void)
 596 {
 597         int i, j;
 598         struct cea_channel_speaker_allocation *p;
 599
 600         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 601                 p = channel_allocations + i;
 602                 p->channels = 0;
 603                 p->spk_mask = 0;
 604                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 605                         if (p->speakers[j]) {
 606                                 p->channels++;
 607                                 p->spk_mask |= p->speakers[j];
 608                         }
 609         }
 610 }
 611
 612 static int get_channel_allocation_order(int ca)
 613 {
 614         int i;
 615
 616         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 617                 if (channel_allocations[i].ca_index == ca)
 618                         break;
 619         }
 620         return i;
 621 }
 622
 623 /*
 624  * The transformation takes two steps:
 625  *
 626  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 627  *            spk_mask => (channel_allocations[])         => ai->CA
 628  *
 629  * TODO: it could select the wrong CA from multiple candidates.
 630 */
 631 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 632 {
 633         int i;
 634         int ca = 0;
 635         int spk_mask = 0;
 636         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 637
 638         /*
 639          * CA defaults to 0 for basic stereo audio
 640          */
 641         if (channels <= 2)
 642                 return 0;
 643
 644         /*
 645          * expand ELD's speaker allocation mask
 646          *
 647          * ELD tells the speaker mask in a compact(paired) form,
 648          * expand ELD's notions to match the ones used by Audio InfoFrame.
 649          */
 650         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 651                 if (eld->info.spk_alloc & (1 << i))
 652                         spk_mask |= eld_speaker_allocation_bits[i];
 653         }
 654
 655         /* search for the first working match in the CA table */
 656         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 657                 if (channels == channel_allocations[i].channels &&
 658                     (spk_mask & channel_allocations[i].spk_mask) ==
 659                                 channel_allocations[i].spk_mask) {
 660                         ca = channel_allocations[i].ca_index;
 661                         break;
 662                 }
 663         }
 664
 665         if (!ca) {
 666                 /* if there was no match, select the regular ALSA channel
 667                  * allocation with the matching number of channels */
 668                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 669                         if (channels == channel_allocations[i].channels) {
 670                                 ca = channel_allocations[i].ca_index;
 671                                 break;
 672                         }
 673                 }
 674         }
 675
 676         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 677         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 678                     ca, channels, buf);
 679
 680         return ca;
 681 }
 682
 683 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 684                                        hda_nid_t pin_nid)
 685 {
 686 #ifdef CONFIG_SND_DEBUG_VERBOSE
 687         struct hdmi_spec *spec = codec->spec;
 688         int i;
 689         int channel;
 690
 691         for (i = 0; i < 8; i++) {
 692                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 693                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 694                                                 channel, i);
 695         }
 696 #endif
 697 }
 698
 699 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 700                                        hda_nid_t pin_nid,
 701                                        bool non_pcm,
 702                                        int ca)
 703 {
 704         struct hdmi_spec *spec = codec->spec;
 705         struct cea_channel_speaker_allocation *ch_alloc;
 706         int i;
 707         int err;
 708         int order;
 709         int non_pcm_mapping[8];
 710
 711         order = get_channel_allocation_order(ca);
 712         ch_alloc = &channel_allocations[order];
 713
 714         if (hdmi_channel_mapping[ca][1] == 0) {
 715                 int hdmi_slot = 0;
 716                 /* fill actual channel mappings in ALSA channel (i) order */
 717                 for (i = 0; i < ch_alloc->channels; i++) {
 718                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 719                                 hdmi_slot++; /* skip zero slots */
 720
 721                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 722                 }
 723                 /* fill the rest of the slots with ALSA channel 0xf */
 724                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 725                         if (!ch_alloc->speakers[7 - hdmi_slot])
 726                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 727         }
 728
 729         if (non_pcm) {
 730                 for (i = 0; i < ch_alloc->channels; i++)
 731                         non_pcm_mapping[i] = (i << 4) | i;
 732                 for (; i < 8; i++)
 733                         non_pcm_mapping[i] = (0xf << 4) | i;
 734         }
 735
 736         for (i = 0; i < 8; i++) {
 737                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 738                 int hdmi_slot = slotsetup & 0x0f;
 739                 int channel = (slotsetup & 0xf0) >> 4;
 740                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 741                 if (err) {
 742                         snd_printdd(KERN_NOTICE
 743                                     "HDMI: channel mapping failed\n");
 744                         break;
 745                 }
 746         }
 747 }
 748
 749 struct channel_map_table {
 750         unsigned char map;              /* ALSA API channel map position */
 751         int spk_mask;                   /* speaker position bit mask */
 752 };
 753
 754 static struct channel_map_table map_tables[] = {
 755         { SNDRV_CHMAP_FL,       FL },
 756         { SNDRV_CHMAP_FR,       FR },
 757         { SNDRV_CHMAP_RL,       RL },
 758         { SNDRV_CHMAP_RR,       RR },
 759         { SNDRV_CHMAP_LFE,      LFE },
 760         { SNDRV_CHMAP_FC,       FC },
 761         { SNDRV_CHMAP_RLC,      RLC },
 762         { SNDRV_CHMAP_RRC,      RRC },
 763         { SNDRV_CHMAP_RC,       RC },
 764         { SNDRV_CHMAP_FLC,      FLC },
 765         { SNDRV_CHMAP_FRC,      FRC },
 766         { SNDRV_CHMAP_TFL,      FLH },
 767         { SNDRV_CHMAP_TFR,      FRH },
 768         { SNDRV_CHMAP_FLW,      FLW },
 769         { SNDRV_CHMAP_FRW,      FRW },
 770         { SNDRV_CHMAP_TC,       TC },
 771         { SNDRV_CHMAP_TFC,      FCH },
 772         {} /* terminator */
 773 };
 774
 775 /* from ALSA API channel position to speaker bit mask */
 776 static int to_spk_mask(unsigned char c)
 777 {
 778         struct channel_map_table *t = map_tables;
 779         for (; t->map; t++) {
 780                 if (t->map == c)
 781                         return t->spk_mask;
 782         }
 783         return 0;
 784 }
 785
 786 /* from ALSA API channel position to CEA slot */
 787 static int to_cea_slot(int ordered_ca, unsigned char pos)
 788 {
 789         int mask = to_spk_mask(pos);
 790         int i;
 791
 792         if (mask) {
 793                 for (i = 0; i < 8; i++) {
 794                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 795                                 return i;
 796                 }
 797         }
 798
 799         return -1;
 800 }
 801
 802 /* from speaker bit mask to ALSA API channel position */
 803 static int spk_to_chmap(int spk)
 804 {
 805         struct channel_map_table *t = map_tables;
 806         for (; t->map; t++) {
 807                 if (t->spk_mask == spk)
 808                         return t->map;
 809         }
 810         return 0;
 811 }
 812
 813 /* from CEA slot to ALSA API channel position */
 814 static int from_cea_slot(int ordered_ca, unsigned char slot)
 815 {
 816         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 817
 818         return spk_to_chmap(mask);
 819 }
 820
 821 /* get the CA index corresponding to the given ALSA API channel map */
 822 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 823 {
 824         int i, spks = 0, spk_mask = 0;
 825
 826         for (i = 0; i < chs; i++) {
 827                 int mask = to_spk_mask(map[i]);
 828                 if (mask) {
 829                         spk_mask |= mask;
 830                         spks++;
 831                 }
 832         }
 833
 834         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 835                 if ((chs == channel_allocations[i].channels ||
 836                      spks == channel_allocations[i].channels) &&
 837                     (spk_mask & channel_allocations[i].spk_mask) ==
 838                                 channel_allocations[i].spk_mask)
 839                         return channel_allocations[i].ca_index;
 840         }
 841         return -1;
 842 }
 843
 844 /* set up the channel slots for the given ALSA API channel map */
 845 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 846                                              hda_nid_t pin_nid,
 847                                              int chs, unsigned char *map,
 848                                              int ca)
 849 {
 850         struct hdmi_spec *spec = codec->spec;
 851         int ordered_ca = get_channel_allocation_order(ca);
 852         int alsa_pos, hdmi_slot;
 853         int assignments[8] = {[0 ... 7] = 0xf};
 854
 855         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 856
 857                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 858
 859                 if (hdmi_slot < 0)
 860                         continue; /* unassigned channel */
 861
 862                 assignments[hdmi_slot] = alsa_pos;
 863         }
 864
 865         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 866                 int err;
 867
 868                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 869                                                      assignments[hdmi_slot]);
 870                 if (err)
 871                         return -EINVAL;
 872         }
 873         return 0;
 874 }
 875
 876 /* store ALSA API channel map from the current default map */
 877 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 878 {
 879         int i;
 880         int ordered_ca = get_channel_allocation_order(ca);
 881         for (i = 0; i < 8; i++) {
 882                 if (i < channel_allocations[ordered_ca].channels)
 883                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 884                 else
 885                         map[i] = 0;
 886         }
 887 }
 888
 889 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 890                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 891                                        int channels, unsigned char *map,
 892                                        bool chmap_set)
 893 {
 894         if (!non_pcm && chmap_set) {
 895                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 896                                                   channels, map, ca);
 897         } else {
 898                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 899                 hdmi_setup_fake_chmap(map, ca);
 900         }
 901
 902         hdmi_debug_channel_mapping(codec, pin_nid);
 903 }
 904
 905 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 906                                      int asp_slot, int channel)
 907 {
 908         return snd_hda_codec_write(codec, pin_nid, 0,
 909                                    AC_VERB_SET_HDMI_CHAN_SLOT,
 910                                    (channel << 4) | asp_slot);
 911 }
 912
 913 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 914                                      int asp_slot)
 915 {
 916         return (snd_hda_codec_read(codec, pin_nid, 0,
 917                                    AC_VERB_GET_HDMI_CHAN_SLOT,
 918                                    asp_slot) & 0xf0) >> 4;
 919 }
 920
 921 /*
 922  * Audio InfoFrame routines
 923  */
 924
 925 /*
 926  * Enable Audio InfoFrame Transmission
 927  */
 928 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 929                                        hda_nid_t pin_nid)
 930 {
 931         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 932         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 933                                                 AC_DIPXMIT_BEST);
 934 }
 935
 936 /*
 937  * Disable Audio InfoFrame Transmission
 938  */
 939 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 940                                       hda_nid_t pin_nid)
 941 {
 942         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 943         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 944                                                 AC_DIPXMIT_DISABLE);
 945 }
 946
 947 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 948 {
 949 #ifdef CONFIG_SND_DEBUG_VERBOSE
 950         int i;
 951         int size;
 952
 953         size = snd_hdmi_get_eld_size(codec, pin_nid);
 954         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 955
 956         for (i = 0; i < 8; i++) {
 957                 size = snd_hda_codec_read(codec, pin_nid, 0,
 958                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 959                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 960         }
 961 #endif
 962 }
 963
 964 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 965 {
 966 #ifdef BE_PARANOID
 967         int i, j;
 968         int size;
 969         int pi, bi;
 970         for (i = 0; i < 8; i++) {
 971                 size = snd_hda_codec_read(codec, pin_nid, 0,
 972                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 973                 if (size == 0)
 974                         continue;
 975
 976                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 977                 for (j = 1; j < 1000; j++) {
 978                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 979                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 980                         if (pi != i)
 981                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 982                                                 bi, pi, i);
 983                         if (bi == 0) /* byte index wrapped around */
 984                                 break;
 985                 }
 986                 snd_printd(KERN_INFO
 987                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 988                         i, size, j);
 989         }
 990 #endif
 991 }
 992
 993 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 994 {
 995         u8 *bytes = (u8 *)hdmi_ai;
 996         u8 sum = 0;
 997         int i;
 998
 999         hdmi_ai->checksum = 0;
1000
1001         for (i = 0; i < sizeof(*hdmi_ai); i++)
1002                 sum += bytes[i];
1003
1004         hdmi_ai->checksum = -sum;
1005 }
1006
1007 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1008                                       hda_nid_t pin_nid,
1009                                       u8 *dip, int size)
1010 {
1011         int i;
1012
1013         hdmi_debug_dip_size(codec, pin_nid);
1014         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1015
1016         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1017         for (i = 0; i < size; i++)
1018                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1019 }
1020
1021 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1022                                     u8 *dip, int size)
1023 {
1024         u8 val;
1025         int i;
1026
1027         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1028                                                             != AC_DIPXMIT_BEST)
1029                 return false;
1030
1031         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1032         for (i = 0; i < size; i++) {
1033                 val = snd_hda_codec_read(codec, pin_nid, 0,
1034                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1035                 if (val != dip[i])
1036                         return false;
1037         }
1038
1039         return true;
1040 }
1041
1042 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1043                                      hda_nid_t pin_nid,
1044                                      int ca, int active_channels,
1045                                      int conn_type)
1046 {
1047         union audio_infoframe ai;
1048
1049         if (conn_type == 0) { /* HDMI */
1050                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1051
1052                 hdmi_ai->type           = 0x84;
1053                 hdmi_ai->ver            = 0x01;
1054                 hdmi_ai->len            = 0x0a;
1055                 hdmi_ai->CC02_CT47      = active_channels - 1;
1056                 hdmi_ai->CA             = ca;
1057                 hdmi_checksum_audio_infoframe(hdmi_ai);
1058         } else if (conn_type == 1) { /* DisplayPort */
1059                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1060
1061                 dp_ai->type             = 0x84;
1062                 dp_ai->len              = 0x1b;
1063                 dp_ai->ver              = 0x11 << 2;
1064                 dp_ai->CC02_CT47        = active_channels - 1;
1065                 dp_ai->CA               = ca;
1066         } else {
1067                 snd_printd("HDMI: unknown connection type at pin %d\n",
1068                             pin_nid);
1069                 return;
1070         }
1071
1072         /*
1073          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1074          * sizeof(*dp_ai) to avoid partial match/update problems when
1075          * the user switches between HDMI/DP monitors.
1076          */
1077         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1078                                         sizeof(ai))) {
1079                 snd_printdd("hdmi_pin_setup_infoframe: "
1080                             "pin=%d channels=%d ca=0x%02x\n",
1081                             pin_nid,
1082                             active_channels, ca);
1083                 hdmi_stop_infoframe_trans(codec, pin_nid);
1084                 hdmi_fill_audio_infoframe(codec, pin_nid,
1085                                             ai.bytes, sizeof(ai));
1086                 hdmi_start_infoframe_trans(codec, pin_nid);
1087         }
1088 }
1089
1090 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1091                                        struct hdmi_spec_per_pin *per_pin,
1092                                        bool non_pcm)
1093 {
1094         struct hdmi_spec *spec = codec->spec;
1095         hda_nid_t pin_nid = per_pin->pin_nid;
1096         int channels = per_pin->channels;
1097         int active_channels;
1098         struct hdmi_eld *eld;
1099         int ca, ordered_ca;
1100
1101         if (!channels)
1102                 return;
1103
1104         if (is_haswell(codec))
1105                 snd_hda_codec_write(codec, pin_nid, 0,
1106                                             AC_VERB_SET_AMP_GAIN_MUTE,
1107                                             AMP_OUT_UNMUTE);
1108
1109         eld = &per_pin->sink_eld;
1110         if (!eld->monitor_present)
1111                 return;
1112
1113         if (!non_pcm && per_pin->chmap_set)
1114                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1115         else
1116                 ca = hdmi_channel_allocation(eld, channels);
1117         if (ca < 0)
1118                 ca = 0;
1119
1120         ordered_ca = get_channel_allocation_order(ca);
1121         active_channels = channel_allocations[ordered_ca].channels;
1122
1123         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1124
1125         /*
1126          * always configure channel mapping, it may have been changed by the
1127          * user in the meantime
1128          */
1129         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1130                                    channels, per_pin->chmap,
1131                                    per_pin->chmap_set);
1132
1133         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1134                                       eld->info.conn_type);
1135
1136         per_pin->non_pcm = non_pcm;
1137 }
1138
1139 /*
1140  * Unsolicited events
1141  */
1142
1143 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1144
1145 static void jack_callback(struct hda_codec *codec, struct hda_jack_tbl *jack)
1146 {
1147         struct hdmi_spec *spec = codec->spec;
1148         int pin_idx = pin_nid_to_pin_index(spec, jack->nid);
1149         if (pin_idx < 0)
1150                 return;
1151
1152         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1153                 snd_hda_jack_report_sync(codec);
1154 }
1155
1156 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1157 {
1158         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1159         struct hda_jack_tbl *jack;
1160         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1161
1162         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1163         if (!jack)
1164                 return;
1165         jack->jack_dirty = 1;
1166
1167         _snd_printd(SND_PR_VERBOSE,
1168                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1169                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1170                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1171
1172         jack_callback(codec, jack);
1173 }
1174
1175 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1176 {
1177         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1178         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1179         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1180         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1181
1182         printk(KERN_INFO
1183                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1184                 codec->addr,
1185                 tag,
1186                 subtag,
1187                 cp_state,
1188                 cp_ready);
1189
1190         /* TODO */
1191         if (cp_state)
1192                 ;
1193         if (cp_ready)
1194                 ;
1195 }
1196
1197
1198 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1199 {
1200         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1201         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1202
1203         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1204                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1205                 return;
1206         }
1207
1208         if (subtag == 0)
1209                 hdmi_intrinsic_event(codec, res);
1210         else
1211                 hdmi_non_intrinsic_event(codec, res);
1212 }
1213
1214 static void haswell_verify_D0(struct hda_codec *codec,
1215                 hda_nid_t cvt_nid, hda_nid_t nid)
1216 {
1217         int pwr;
1218
1219         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1220          * thus pins could only choose converter 0 for use. Make sure the
1221          * converters are in correct power state */
1222         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1223                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1224
1225         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1226                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1227                                     AC_PWRST_D0);
1228                 msleep(40);
1229                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1230                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1231                 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1232         }
1233 }
1234
1235 /*
1236  * Callbacks
1237  */
1238
1239 /* HBR should be Non-PCM, 8 channels */
1240 #define is_hbr_format(format) \
1241         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1242
1243 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1244                               bool hbr)
1245 {
1246         int pinctl, new_pinctl;
1247
1248         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1249                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1250                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1251
1252                 if (pinctl < 0)
1253                         return hbr ? -EINVAL : 0;
1254
1255                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1256                 if (hbr)
1257                         new_pinctl |= AC_PINCTL_EPT_HBR;
1258                 else
1259                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1260
1261                 snd_printdd("hdmi_pin_hbr_setup: "
1262                             "NID=0x%x, %spinctl=0x%x\n",
1263                             pin_nid,
1264                             pinctl == new_pinctl ? "" : "new-",
1265                             new_pinctl);
1266
1267                 if (pinctl != new_pinctl)
1268                         snd_hda_codec_write(codec, pin_nid, 0,
1269                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1270                                             new_pinctl);
1271         } else if (hbr)
1272                 return -EINVAL;
1273
1274         return 0;
1275 }
1276
1277 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1278                               hda_nid_t pin_nid, u32 stream_tag, int format)
1279 {
1280         struct hdmi_spec *spec = codec->spec;
1281         int err;
1282
1283         if (is_haswell(codec))
1284                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1285
1286         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1287
1288         if (err) {
1289                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1290                 return err;
1291         }
1292
1293         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1294         return 0;
1295 }
1296
1297 static int hdmi_choose_cvt(struct hda_codec *codec,
1298                         int pin_idx, int *cvt_id, int *mux_id)
1299 {
1300         struct hdmi_spec *spec = codec->spec;
1301         struct hdmi_spec_per_pin *per_pin;
1302         struct hdmi_spec_per_cvt *per_cvt = NULL;
1303         int cvt_idx, mux_idx = 0;
1304
1305         per_pin = get_pin(spec, pin_idx);
1306
1307         /* Dynamically assign converter to stream */
1308         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1309                 per_cvt = get_cvt(spec, cvt_idx);
1310
1311                 /* Must not already be assigned */
1312                 if (per_cvt->assigned)
1313                         continue;
1314                 /* Must be in pin's mux's list of converters */
1315                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1316                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1317                                 break;
1318                 /* Not in mux list */
1319                 if (mux_idx == per_pin->num_mux_nids)
1320                         continue;
1321                 break;
1322         }
1323
1324         /* No free converters */
1325         if (cvt_idx == spec->num_cvts)
1326                 return -ENODEV;
1327
1328         if (cvt_id)
1329                 *cvt_id = cvt_idx;
1330         if (mux_id)
1331                 *mux_id = mux_idx;
1332
1333         return 0;
1334 }
1335
1336 /* Intel HDMI workaround to fix audio routing issue:
1337  * For some Intel display codecs, pins share the same connection list.
1338  * So a conveter can be selected by multiple pins and playback on any of these
1339  * pins will generate sound on the external display, because audio flows from
1340  * the same converter to the display pipeline. Also muting one pin may make
1341  * other pins have no sound output.
1342  * So this function assures that an assigned converter for a pin is not selected
1343  * by any other pins.
1344  */
1345 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1346                         hda_nid_t pin_nid, int mux_idx)
1347 {
1348         struct hdmi_spec *spec = codec->spec;
1349         hda_nid_t nid, end_nid;
1350         int cvt_idx, curr;
1351         struct hdmi_spec_per_cvt *per_cvt;
1352
1353         /* configure all pins, including "no physical connection" ones */
1354         end_nid = codec->start_nid + codec->num_nodes;
1355         for (nid = codec->start_nid; nid < end_nid; nid++) {
1356                 unsigned int wid_caps = get_wcaps(codec, nid);
1357                 unsigned int wid_type = get_wcaps_type(wid_caps);
1358
1359                 if (wid_type != AC_WID_PIN)
1360                         continue;
1361
1362                 if (nid == pin_nid)
1363                         continue;
1364
1365                 curr = snd_hda_codec_read(codec, nid, 0,
1366                                           AC_VERB_GET_CONNECT_SEL, 0);
1367                 if (curr != mux_idx)
1368                         continue;
1369
1370                 /* choose an unassigned converter. The conveters in the
1371                  * connection list are in the same order as in the codec.
1372                  */
1373                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1374                         per_cvt = get_cvt(spec, cvt_idx);
1375                         if (!per_cvt->assigned) {
1376                                 snd_printdd("choose cvt %d for pin nid %d\n",
1377                                         cvt_idx, nid);
1378                                 snd_hda_codec_write_cache(codec, nid, 0,
1379                                             AC_VERB_SET_CONNECT_SEL,
1380                                             cvt_idx);
1381                                 break;
1382                         }
1383                 }
1384         }
1385 }
1386
1387 /*
1388  * HDA PCM callbacks
1389  */
1390 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1391                          struct hda_codec *codec,
1392                          struct snd_pcm_substream *substream)
1393 {
1394         struct hdmi_spec *spec = codec->spec;
1395         struct snd_pcm_runtime *runtime = substream->runtime;
1396         int pin_idx, cvt_idx, mux_idx = 0;
1397         struct hdmi_spec_per_pin *per_pin;
1398         struct hdmi_eld *eld;
1399         struct hdmi_spec_per_cvt *per_cvt = NULL;
1400         int err;
1401
1402         /* Validate hinfo */
1403         pin_idx = hinfo_to_pin_index(spec, hinfo);
1404         if (snd_BUG_ON(pin_idx < 0))
1405                 return -EINVAL;
1406         per_pin = get_pin(spec, pin_idx);
1407         eld = &per_pin->sink_eld;
1408
1409         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1410         if (err < 0)
1411                 return err;
1412
1413         per_cvt = get_cvt(spec, cvt_idx);
1414         /* Claim converter */
1415         per_cvt->assigned = 1;
1416         per_pin->cvt_nid = per_cvt->cvt_nid;
1417         hinfo->nid = per_cvt->cvt_nid;
1418
1419         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1420                             AC_VERB_SET_CONNECT_SEL,
1421                             mux_idx);
1422
1423         /* configure unused pins to choose other converters */
1424         if (is_haswell(codec) || is_valleyview(codec))
1425                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1426
1427         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1428
1429         /* Initially set the converter's capabilities */
1430         hinfo->channels_min = per_cvt->channels_min;
1431         hinfo->channels_max = per_cvt->channels_max;
1432         hinfo->rates = per_cvt->rates;
1433         hinfo->formats = per_cvt->formats;
1434         hinfo->maxbps = per_cvt->maxbps;
1435
1436         /* Restrict capabilities by ELD if this isn't disabled */
1437         if (!static_hdmi_pcm && eld->eld_valid) {
1438                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1439                 if (hinfo->channels_min > hinfo->channels_max ||
1440                     !hinfo->rates || !hinfo->formats) {
1441                         per_cvt->assigned = 0;
1442                         hinfo->nid = 0;
1443                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1444                         return -ENODEV;
1445                 }
1446         }
1447
1448         /* Store the updated parameters */
1449         runtime->hw.channels_min = hinfo->channels_min;
1450         runtime->hw.channels_max = hinfo->channels_max;
1451         runtime->hw.formats = hinfo->formats;
1452         runtime->hw.rates = hinfo->rates;
1453
1454         snd_pcm_hw_constraint_step(substream->runtime, 0,
1455                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1456         return 0;
1457 }
1458
1459 /*
1460  * HDA/HDMI auto parsing
1461  */
1462 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1463 {
1464         struct hdmi_spec *spec = codec->spec;
1465         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1466         hda_nid_t pin_nid = per_pin->pin_nid;
1467
1468         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1469                 snd_printk(KERN_WARNING
1470                            "HDMI: pin %d wcaps %#x "
1471                            "does not support connection list\n",
1472                            pin_nid, get_wcaps(codec, pin_nid));
1473                 return -EINVAL;
1474         }
1475
1476         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1477                                                         per_pin->mux_nids,
1478                                                         HDA_MAX_CONNECTIONS);
1479
1480         return 0;
1481 }
1482
1483 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1484 {
1485         struct hda_jack_tbl *jack;
1486         struct hda_codec *codec = per_pin->codec;
1487         struct hdmi_spec *spec = codec->spec;
1488         struct hdmi_eld *eld = &spec->temp_eld;
1489         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1490         hda_nid_t pin_nid = per_pin->pin_nid;
1491         /*
1492          * Always execute a GetPinSense verb here, even when called from
1493          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1494          * response's PD bit is not the real PD value, but indicates that
1495          * the real PD value changed. An older version of the HD-audio
1496          * specification worked this way. Hence, we just ignore the data in
1497          * the unsolicited response to avoid custom WARs.
1498          */
1499         int present = snd_hda_pin_sense(codec, pin_nid);
1500         bool update_eld = false;
1501         bool eld_changed = false;
1502         bool ret;
1503
1504         mutex_lock(&per_pin->lock);
1505         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1506         if (pin_eld->monitor_present)
1507                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1508         else
1509                 eld->eld_valid = false;
1510
1511         _snd_printd(SND_PR_VERBOSE,
1512                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1513                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1514
1515         if (eld->eld_valid) {
1516                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1517                                                      &eld->eld_size) < 0)
1518                         eld->eld_valid = false;
1519                 else {
1520                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1521                         if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1522                                                     eld->eld_size) < 0)
1523                                 eld->eld_valid = false;
1524                 }
1525
1526                 if (eld->eld_valid) {
1527                         snd_hdmi_show_eld(&eld->info);
1528                         update_eld = true;
1529                 }
1530                 else if (repoll) {
1531                         queue_delayed_work(codec->bus->workq,
1532                                            &per_pin->work,
1533                                            msecs_to_jiffies(300));
1534                         goto unlock;
1535                 }
1536         }
1537
1538         if (pin_eld->eld_valid && !eld->eld_valid) {
1539                 update_eld = true;
1540                 eld_changed = true;
1541         }
1542         if (update_eld) {
1543                 bool old_eld_valid = pin_eld->eld_valid;
1544                 pin_eld->eld_valid = eld->eld_valid;
1545                 eld_changed = pin_eld->eld_size != eld->eld_size ||
1546                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1547                                      eld->eld_size) != 0;
1548                 if (eld_changed)
1549                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1550                                eld->eld_size);
1551                 pin_eld->eld_size = eld->eld_size;
1552                 pin_eld->info = eld->info;
1553
1554                 /*
1555                  * Re-setup pin and infoframe. This is needed e.g. when
1556                  * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1557                  * - transcoder can change during stream playback on Haswell
1558                  */
1559                 if (eld->eld_valid && !old_eld_valid && per_pin->setup)
1560                         hdmi_setup_audio_infoframe(codec, per_pin,
1561                                                    per_pin->non_pcm);
1562         }
1563
1564         if (eld_changed)
1565                 snd_ctl_notify(codec->bus->card,
1566                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1567                                &per_pin->eld_ctl->id);
1568  unlock:
1569         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1570
1571         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1572         if (jack)
1573                 jack->block_report = !ret;
1574
1575         mutex_unlock(&per_pin->lock);
1576         return ret;
1577 }
1578
1579 static void hdmi_repoll_eld(struct work_struct *work)
1580 {
1581         struct hdmi_spec_per_pin *per_pin =
1582         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1583
1584         if (per_pin->repoll_count++ > 6)
1585                 per_pin->repoll_count = 0;
1586
1587         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1588                 snd_hda_jack_report_sync(per_pin->codec);
1589 }
1590
1591 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1592                                              hda_nid_t nid);
1593
1594 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1595 {
1596         struct hdmi_spec *spec = codec->spec;
1597         unsigned int caps, config;
1598         int pin_idx;
1599         struct hdmi_spec_per_pin *per_pin;
1600         int err;
1601
1602         caps = snd_hda_query_pin_caps(codec, pin_nid);
1603         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1604                 return 0;
1605
1606         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1607         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1608                 return 0;
1609
1610         if (is_haswell(codec))
1611                 intel_haswell_fixup_connect_list(codec, pin_nid);
1612
1613         pin_idx = spec->num_pins;
1614         per_pin = snd_array_new(&spec->pins);
1615         if (!per_pin)
1616                 return -ENOMEM;
1617
1618         per_pin->pin_nid = pin_nid;
1619         per_pin->non_pcm = false;
1620
1621         err = hdmi_read_pin_conn(codec, pin_idx);
1622         if (err < 0)
1623                 return err;
1624
1625         spec->num_pins++;
1626
1627         return 0;
1628 }
1629
1630 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1631 {
1632         struct hdmi_spec *spec = codec->spec;
1633         struct hdmi_spec_per_cvt *per_cvt;
1634         unsigned int chans;
1635         int err;
1636
1637         chans = get_wcaps(codec, cvt_nid);
1638         chans = get_wcaps_channels(chans);
1639
1640         per_cvt = snd_array_new(&spec->cvts);
1641         if (!per_cvt)
1642                 return -ENOMEM;
1643
1644         per_cvt->cvt_nid = cvt_nid;
1645         per_cvt->channels_min = 2;
1646         if (chans <= 16) {
1647                 per_cvt->channels_max = chans;
1648                 if (chans > spec->channels_max)
1649                         spec->channels_max = chans;
1650         }
1651
1652         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1653                                           &per_cvt->rates,
1654                                           &per_cvt->formats,
1655                                           &per_cvt->maxbps);
1656         if (err < 0)
1657                 return err;
1658
1659         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1660                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1661         spec->num_cvts++;
1662
1663         return 0;
1664 }
1665
1666 static int hdmi_parse_codec(struct hda_codec *codec)
1667 {
1668         hda_nid_t nid;
1669         int i, nodes;
1670
1671         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1672         if (!nid || nodes < 0) {
1673                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1674                 return -EINVAL;
1675         }
1676
1677         for (i = 0; i < nodes; i++, nid++) {
1678                 unsigned int caps;
1679                 unsigned int type;
1680
1681                 caps = get_wcaps(codec, nid);
1682                 type = get_wcaps_type(caps);
1683
1684                 if (!(caps & AC_WCAP_DIGITAL))
1685                         continue;
1686
1687                 switch (type) {
1688                 case AC_WID_AUD_OUT:
1689                         hdmi_add_cvt(codec, nid);
1690                         break;
1691                 case AC_WID_PIN:
1692                         hdmi_add_pin(codec, nid);
1693                         break;
1694                 }
1695         }
1696
1697 #ifdef CONFIG_PM
1698         /* We're seeing some problems with unsolicited hot plug events on
1699          * PantherPoint after S3, if this is not enabled */
1700         if (codec->vendor_id == 0x80862806)
1701                 codec->bus->power_keep_link_on = 1;
1702         /*
1703          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1704          * can be lost and presence sense verb will become inaccurate if the
1705          * HDA link is powered off at hot plug or hw initialization time.
1706          */
1707         else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1708               AC_PWRST_EPSS))
1709                 codec->bus->power_keep_link_on = 1;
1710 #endif
1711
1712         return 0;
1713 }
1714
1715 /*
1716  */
1717 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1718 {
1719         struct hda_spdif_out *spdif;
1720         bool non_pcm;
1721
1722         mutex_lock(&codec->spdif_mutex);
1723         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1724         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1725         mutex_unlock(&codec->spdif_mutex);
1726         return non_pcm;
1727 }
1728
1729
1730 /*
1731  * HDMI callbacks
1732  */
1733
1734 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1735                                            struct hda_codec *codec,
1736                                            unsigned int stream_tag,
1737                                            unsigned int format,
1738                                            struct snd_pcm_substream *substream)
1739 {
1740         hda_nid_t cvt_nid = hinfo->nid;
1741         struct hdmi_spec *spec = codec->spec;
1742         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1743         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1744         hda_nid_t pin_nid = per_pin->pin_nid;
1745         bool non_pcm;
1746
1747         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1748         mutex_lock(&per_pin->lock);
1749         per_pin->channels = substream->runtime->channels;
1750         per_pin->setup = true;
1751
1752         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1753         mutex_unlock(&per_pin->lock);
1754
1755         return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1756 }
1757
1758 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1759                                              struct hda_codec *codec,
1760                                              struct snd_pcm_substream *substream)
1761 {
1762         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1763         return 0;
1764 }
1765
1766 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1767                           struct hda_codec *codec,
1768                           struct snd_pcm_substream *substream)
1769 {
1770         struct hdmi_spec *spec = codec->spec;
1771         int cvt_idx, pin_idx;
1772         struct hdmi_spec_per_cvt *per_cvt;
1773         struct hdmi_spec_per_pin *per_pin;
1774
1775         if (hinfo->nid) {
1776                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1777                 if (snd_BUG_ON(cvt_idx < 0))
1778                         return -EINVAL;
1779                 per_cvt = get_cvt(spec, cvt_idx);
1780
1781                 snd_BUG_ON(!per_cvt->assigned);
1782                 per_cvt->assigned = 0;
1783                 hinfo->nid = 0;
1784
1785                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1786                 if (snd_BUG_ON(pin_idx < 0))
1787                         return -EINVAL;
1788                 per_pin = get_pin(spec, pin_idx);
1789
1790                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1791
1792                 mutex_lock(&per_pin->lock);
1793                 per_pin->chmap_set = false;
1794                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1795
1796                 per_pin->setup = false;
1797                 per_pin->channels = 0;
1798                 mutex_unlock(&per_pin->lock);
1799         }
1800
1801         return 0;
1802 }
1803
1804 static const struct hda_pcm_ops generic_ops = {
1805         .open = hdmi_pcm_open,
1806         .close = hdmi_pcm_close,
1807         .prepare = generic_hdmi_playback_pcm_prepare,
1808         .cleanup = generic_hdmi_playback_pcm_cleanup,
1809 };
1810
1811 /*
1812  * ALSA API channel-map control callbacks
1813  */
1814 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1815                                struct snd_ctl_elem_info *uinfo)
1816 {
1817         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1818         struct hda_codec *codec = info->private_data;
1819         struct hdmi_spec *spec = codec->spec;
1820         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1821         uinfo->count = spec->channels_max;
1822         uinfo->value.integer.min = 0;
1823         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1824         return 0;
1825 }
1826
1827 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1828                                                   int channels)
1829 {
1830         /* If the speaker allocation matches the channel count, it is OK.*/
1831         if (cap->channels != channels)
1832                 return -1;
1833
1834         /* all channels are remappable freely */
1835         return SNDRV_CTL_TLVT_CHMAP_VAR;
1836 }
1837
1838 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1839                                         unsigned int *chmap, int channels)
1840 {
1841         int count = 0;
1842         int c;
1843
1844         for (c = 7; c >= 0; c--) {
1845                 int spk = cap->speakers[c];
1846                 if (!spk)
1847                         continue;
1848
1849                 chmap[count++] = spk_to_chmap(spk);
1850         }
1851
1852         WARN_ON(count != channels);
1853 }
1854
1855 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1856                               unsigned int size, unsigned int __user *tlv)
1857 {
1858         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1859         struct hda_codec *codec = info->private_data;
1860         struct hdmi_spec *spec = codec->spec;
1861         unsigned int __user *dst;
1862         int chs, count = 0;
1863
1864         if (size < 8)
1865                 return -ENOMEM;
1866         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1867                 return -EFAULT;
1868         size -= 8;
1869         dst = tlv + 2;
1870         for (chs = 2; chs <= spec->channels_max; chs++) {
1871                 int i;
1872                 struct cea_channel_speaker_allocation *cap;
1873                 cap = channel_allocations;
1874                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1875                         int chs_bytes = chs * 4;
1876                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1877                         unsigned int tlv_chmap[8];
1878
1879                         if (type < 0)
1880                                 continue;
1881                         if (size < 8)
1882                                 return -ENOMEM;
1883                         if (put_user(type, dst) ||
1884                             put_user(chs_bytes, dst + 1))
1885                                 return -EFAULT;
1886                         dst += 2;
1887                         size -= 8;
1888                         count += 8;
1889                         if (size < chs_bytes)
1890                                 return -ENOMEM;
1891                         size -= chs_bytes;
1892                         count += chs_bytes;
1893                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1894                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
1895                                 return -EFAULT;
1896                         dst += chs;
1897                 }
1898         }
1899         if (put_user(count, tlv + 1))
1900                 return -EFAULT;
1901         return 0;
1902 }
1903
1904 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1905                               struct snd_ctl_elem_value *ucontrol)
1906 {
1907         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1908         struct hda_codec *codec = info->private_data;
1909         struct hdmi_spec *spec = codec->spec;
1910         int pin_idx = kcontrol->private_value;
1911         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1912         int i;
1913
1914         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1915                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1916         return 0;
1917 }
1918
1919 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1920                               struct snd_ctl_elem_value *ucontrol)
1921 {
1922         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1923         struct hda_codec *codec = info->private_data;
1924         struct hdmi_spec *spec = codec->spec;
1925         int pin_idx = kcontrol->private_value;
1926         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1927         unsigned int ctl_idx;
1928         struct snd_pcm_substream *substream;
1929         unsigned char chmap[8];
1930         int i, err, ca, prepared = 0;
1931
1932         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1933         substream = snd_pcm_chmap_substream(info, ctl_idx);
1934         if (!substream || !substream->runtime)
1935                 return 0; /* just for avoiding error from alsactl restore */
1936         switch (substream->runtime->status->state) {
1937         case SNDRV_PCM_STATE_OPEN:
1938         case SNDRV_PCM_STATE_SETUP:
1939                 break;
1940         case SNDRV_PCM_STATE_PREPARED:
1941                 prepared = 1;
1942                 break;
1943         default:
1944                 return -EBUSY;
1945         }
1946         memset(chmap, 0, sizeof(chmap));
1947         for (i = 0; i < ARRAY_SIZE(chmap); i++)
1948                 chmap[i] = ucontrol->value.integer.value[i];
1949         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1950                 return 0;
1951         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1952         if (ca < 0)
1953                 return -EINVAL;
1954         if (spec->ops.chmap_validate) {
1955                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
1956                 if (err)
1957                         return err;
1958         }
1959         mutex_lock(&per_pin->lock);
1960         per_pin->chmap_set = true;
1961         memcpy(per_pin->chmap, chmap, sizeof(chmap));
1962         if (prepared)
1963                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1964         mutex_unlock(&per_pin->lock);
1965
1966         return 0;
1967 }
1968
1969 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1970 {
1971         struct hdmi_spec *spec = codec->spec;
1972         int pin_idx;
1973
1974         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1975                 struct hda_pcm *info;
1976                 struct hda_pcm_stream *pstr;
1977                 struct hdmi_spec_per_pin *per_pin;
1978
1979                 per_pin = get_pin(spec, pin_idx);
1980                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1981                 info = snd_array_new(&spec->pcm_rec);
1982                 if (!info)
1983                         return -ENOMEM;
1984                 info->name = per_pin->pcm_name;
1985                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1986                 info->own_chmap = true;
1987
1988                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1989                 pstr->substreams = 1;
1990                 pstr->ops = generic_ops;
1991                 /* other pstr fields are set in open */
1992         }
1993
1994         codec->num_pcms = spec->num_pins;
1995         codec->pcm_info = spec->pcm_rec.list;
1996
1997         return 0;
1998 }
1999
2000 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
2001 {
2002         char hdmi_str[32] = "HDMI/DP";
2003         struct hdmi_spec *spec = codec->spec;
2004         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2005         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2006
2007         if (pcmdev > 0)
2008                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2009         if (!is_jack_detectable(codec, per_pin->pin_nid))
2010                 strncat(hdmi_str, " Phantom",
2011                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2012
2013         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2014 }
2015
2016 static int generic_hdmi_build_controls(struct hda_codec *codec)
2017 {
2018         struct hdmi_spec *spec = codec->spec;
2019         int err;
2020         int pin_idx;
2021
2022         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2023                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2024
2025                 err = generic_hdmi_build_jack(codec, pin_idx);
2026                 if (err < 0)
2027                         return err;
2028
2029                 err = snd_hda_create_dig_out_ctls(codec,
2030                                                   per_pin->pin_nid,
2031                                                   per_pin->mux_nids[0],
2032                                                   HDA_PCM_TYPE_HDMI);
2033                 if (err < 0)
2034                         return err;
2035                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2036
2037                 /* add control for ELD Bytes */
2038                 err = hdmi_create_eld_ctl(codec, pin_idx,
2039                                           get_pcm_rec(spec, pin_idx)->device);
2040
2041                 if (err < 0)
2042                         return err;
2043
2044                 hdmi_present_sense(per_pin, 0);
2045         }
2046
2047         /* add channel maps */
2048         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2049                 struct snd_pcm_chmap *chmap;
2050                 struct snd_kcontrol *kctl;
2051                 int i;
2052
2053                 if (!codec->pcm_info[pin_idx].pcm)
2054                         break;
2055                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2056                                              SNDRV_PCM_STREAM_PLAYBACK,
2057                                              NULL, 0, pin_idx, &chmap);
2058                 if (err < 0)
2059                         return err;
2060                 /* override handlers */
2061                 chmap->private_data = codec;
2062                 kctl = chmap->kctl;
2063                 for (i = 0; i < kctl->count; i++)
2064                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2065                 kctl->info = hdmi_chmap_ctl_info;
2066                 kctl->get = hdmi_chmap_ctl_get;
2067                 kctl->put = hdmi_chmap_ctl_put;
2068                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2069         }
2070
2071         return 0;
2072 }
2073
2074 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2075 {
2076         struct hdmi_spec *spec = codec->spec;
2077         int pin_idx;
2078
2079         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2080                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2081
2082                 per_pin->codec = codec;
2083                 mutex_init(&per_pin->lock);
2084                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2085                 eld_proc_new(per_pin, pin_idx);
2086         }
2087         return 0;
2088 }
2089
2090 static int generic_hdmi_init(struct hda_codec *codec)
2091 {
2092         struct hdmi_spec *spec = codec->spec;
2093         int pin_idx;
2094
2095         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2096                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2097                 hda_nid_t pin_nid = per_pin->pin_nid;
2098
2099                 hdmi_init_pin(codec, pin_nid);
2100                 snd_hda_jack_detect_enable_callback(codec, pin_nid, pin_nid,
2101                         codec->jackpoll_interval > 0 ? jack_callback : NULL);
2102         }
2103         return 0;
2104 }
2105
2106 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2107 {
2108         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2109         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2110         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2111 }
2112
2113 static void hdmi_array_free(struct hdmi_spec *spec)
2114 {
2115         snd_array_free(&spec->pins);
2116         snd_array_free(&spec->cvts);
2117         snd_array_free(&spec->pcm_rec);
2118 }
2119
2120 static void generic_hdmi_free(struct hda_codec *codec)
2121 {
2122         struct hdmi_spec *spec = codec->spec;
2123         int pin_idx;
2124
2125         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2126                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2127
2128                 cancel_delayed_work(&per_pin->work);
2129                 eld_proc_free(per_pin);
2130         }
2131
2132         flush_workqueue(codec->bus->workq);
2133         hdmi_array_free(spec);
2134         kfree(spec);
2135 }
2136
2137 #ifdef CONFIG_PM
2138 static int generic_hdmi_resume(struct hda_codec *codec)
2139 {
2140         struct hdmi_spec *spec = codec->spec;
2141         int pin_idx;
2142
2143         generic_hdmi_init(codec);
2144         snd_hda_codec_resume_amp(codec);
2145         snd_hda_codec_resume_cache(codec);
2146
2147         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2148                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2149                 hdmi_present_sense(per_pin, 1);
2150         }
2151         return 0;
2152 }
2153 #endif
2154
2155 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2156         .init                   = generic_hdmi_init,
2157         .free                   = generic_hdmi_free,
2158         .build_pcms             = generic_hdmi_build_pcms,
2159         .build_controls         = generic_hdmi_build_controls,
2160         .unsol_event            = hdmi_unsol_event,
2161 #ifdef CONFIG_PM
2162         .resume                 = generic_hdmi_resume,
2163 #endif
2164 };
2165
2166 static const struct hdmi_ops generic_standard_hdmi_ops = {
2167         .pin_get_eld                            = snd_hdmi_get_eld,
2168         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2169         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2170         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2171         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2172         .setup_stream                           = hdmi_setup_stream,
2173         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2174         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2175 };
2176
2177
2178 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2179                                              hda_nid_t nid)
2180 {
2181         struct hdmi_spec *spec = codec->spec;
2182         hda_nid_t conns[4];
2183         int nconns;
2184
2185         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2186         if (nconns == spec->num_cvts &&
2187             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2188                 return;
2189
2190         /* override pins connection list */
2191         snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
2192         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2193 }
2194
2195 #define INTEL_VENDOR_NID 0x08
2196 #define INTEL_GET_VENDOR_VERB 0xf81
2197 #define INTEL_SET_VENDOR_VERB 0x781
2198 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2199 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2200
2201 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2202                                           bool update_tree)
2203 {
2204         unsigned int vendor_param;
2205
2206         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2207                                 INTEL_GET_VENDOR_VERB, 0);
2208         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2209                 return;
2210
2211         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2212         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2213                                 INTEL_SET_VENDOR_VERB, vendor_param);
2214         if (vendor_param == -1)
2215                 return;
2216
2217         if (update_tree)
2218                 snd_hda_codec_update_widgets(codec);
2219 }
2220
2221 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2222 {
2223         unsigned int vendor_param;
2224
2225         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2226                                 INTEL_GET_VENDOR_VERB, 0);
2227         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2228                 return;
2229
2230         /* enable DP1.2 mode */
2231         vendor_param |= INTEL_EN_DP12;
2232         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2233                                 INTEL_SET_VENDOR_VERB, vendor_param);
2234 }
2235
2236 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2237  * Otherwise you may get severe h/w communication errors.
2238  */
2239 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2240                                 unsigned int power_state)
2241 {
2242         if (power_state == AC_PWRST_D0) {
2243                 intel_haswell_enable_all_pins(codec, false);
2244                 intel_haswell_fixup_enable_dp12(codec);
2245         }
2246
2247         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2248         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2249 }
2250
2251 static int patch_generic_hdmi(struct hda_codec *codec)
2252 {
2253         struct hdmi_spec *spec;
2254
2255         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2256         if (spec == NULL)
2257                 return -ENOMEM;
2258
2259         spec->ops = generic_standard_hdmi_ops;
2260         codec->spec = spec;
2261         hdmi_array_init(spec, 4);
2262
2263         if (is_haswell(codec)) {
2264                 intel_haswell_enable_all_pins(codec, true);
2265                 intel_haswell_fixup_enable_dp12(codec);
2266         }
2267
2268         if (hdmi_parse_codec(codec) < 0) {
2269                 codec->spec = NULL;
2270                 kfree(spec);
2271                 return -EINVAL;
2272         }
2273         codec->patch_ops = generic_hdmi_patch_ops;
2274         if (is_haswell(codec)) {
2275                 codec->patch_ops.set_power_state = haswell_set_power_state;
2276                 codec->dp_mst = true;
2277         }
2278
2279         generic_hdmi_init_per_pins(codec);
2280
2281         init_channel_allocations();
2282
2283         return 0;
2284 }
2285
2286 /*
2287  * Shared non-generic implementations
2288  */
2289
2290 static int simple_playback_build_pcms(struct hda_codec *codec)
2291 {
2292         struct hdmi_spec *spec = codec->spec;
2293         struct hda_pcm *info;
2294         unsigned int chans;
2295         struct hda_pcm_stream *pstr;
2296         struct hdmi_spec_per_cvt *per_cvt;
2297
2298         per_cvt = get_cvt(spec, 0);
2299         chans = get_wcaps(codec, per_cvt->cvt_nid);
2300         chans = get_wcaps_channels(chans);
2301
2302         info = snd_array_new(&spec->pcm_rec);
2303         if (!info)
2304                 return -ENOMEM;
2305         info->name = get_pin(spec, 0)->pcm_name;
2306         sprintf(info->name, "HDMI 0");
2307         info->pcm_type = HDA_PCM_TYPE_HDMI;
2308         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2309         *pstr = spec->pcm_playback;
2310         pstr->nid = per_cvt->cvt_nid;
2311         if (pstr->channels_max <= 2 && chans && chans <= 16)
2312                 pstr->channels_max = chans;
2313
2314         codec->num_pcms = 1;
2315         codec->pcm_info = info;
2316
2317         return 0;
2318 }
2319
2320 /* unsolicited event for jack sensing */
2321 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2322                                     unsigned int res)
2323 {
2324         snd_hda_jack_set_dirty_all(codec);
2325         snd_hda_jack_report_sync(codec);
2326 }
2327
2328 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2329  * as long as spec->pins[] is set correctly
2330  */
2331 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2332
2333 static int simple_playback_build_controls(struct hda_codec *codec)
2334 {
2335         struct hdmi_spec *spec = codec->spec;
2336         struct hdmi_spec_per_cvt *per_cvt;
2337         int err;
2338
2339         per_cvt = get_cvt(spec, 0);
2340         err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
2341                                             per_cvt->cvt_nid);
2342         if (err < 0)
2343                 return err;
2344         return simple_hdmi_build_jack(codec, 0);
2345 }
2346
2347 static int simple_playback_init(struct hda_codec *codec)
2348 {
2349         struct hdmi_spec *spec = codec->spec;
2350         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2351         hda_nid_t pin = per_pin->pin_nid;
2352
2353         snd_hda_codec_write(codec, pin, 0,
2354                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2355         /* some codecs require to unmute the pin */
2356         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2357                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2358                                     AMP_OUT_UNMUTE);
2359         snd_hda_jack_detect_enable(codec, pin, pin);
2360         return 0;
2361 }
2362
2363 static void simple_playback_free(struct hda_codec *codec)
2364 {
2365         struct hdmi_spec *spec = codec->spec;
2366
2367         hdmi_array_free(spec);
2368         kfree(spec);
2369 }
2370
2371 /*
2372  * Nvidia specific implementations
2373  */
2374
2375 #define Nv_VERB_SET_Channel_Allocation          0xF79
2376 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2377 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2378 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2379
2380 #define nvhdmi_master_con_nid_7x        0x04
2381 #define nvhdmi_master_pin_nid_7x        0x05
2382
2383 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2384         /*front, rear, clfe, rear_surr */
2385         0x6, 0x8, 0xa, 0xc,
2386 };
2387
2388 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2389         /* set audio protect on */
2390         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2391         /* enable digital output on pin widget */
2392         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2393         {} /* terminator */
2394 };
2395
2396 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2397         /* set audio protect on */
2398         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2399         /* enable digital output on pin widget */
2400         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2401         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2402         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2403         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2404         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2405         {} /* terminator */
2406 };
2407
2408 #ifdef LIMITED_RATE_FMT_SUPPORT
2409 /* support only the safe format and rate */
2410 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2411 #define SUPPORTED_MAXBPS        16
2412 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2413 #else
2414 /* support all rates and formats */
2415 #define SUPPORTED_RATES \
2416         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2417         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2418          SNDRV_PCM_RATE_192000)
2419 #define SUPPORTED_MAXBPS        24
2420 #define SUPPORTED_FORMATS \
2421         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2422 #endif
2423
2424 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2425 {
2426         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2427         return 0;
2428 }
2429
2430 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2431 {
2432         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2433         return 0;
2434 }
2435
2436 static unsigned int channels_2_6_8[] = {
2437         2, 6, 8
2438 };
2439
2440 static unsigned int channels_2_8[] = {
2441         2, 8
2442 };
2443
2444 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2445         .count = ARRAY_SIZE(channels_2_6_8),
2446         .list = channels_2_6_8,
2447         .mask = 0,
2448 };
2449
2450 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2451         .count = ARRAY_SIZE(channels_2_8),
2452         .list = channels_2_8,
2453         .mask = 0,
2454 };
2455
2456 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2457                                     struct hda_codec *codec,
2458                                     struct snd_pcm_substream *substream)
2459 {
2460         struct hdmi_spec *spec = codec->spec;
2461         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2462
2463         switch (codec->preset->id) {
2464         case 0x10de0002:
2465         case 0x10de0003:
2466         case 0x10de0005:
2467         case 0x10de0006:
2468                 hw_constraints_channels = &hw_constraints_2_8_channels;
2469                 break;
2470         case 0x10de0007:
2471                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2472                 break;
2473         default:
2474                 break;
2475         }
2476
2477         if (hw_constraints_channels != NULL) {
2478                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2479                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2480                                 hw_constraints_channels);
2481         } else {
2482                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2483                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2484         }
2485
2486         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2487 }
2488
2489 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2490                                      struct hda_codec *codec,
2491                                      struct snd_pcm_substream *substream)
2492 {
2493         struct hdmi_spec *spec = codec->spec;
2494         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2495 }
2496
2497 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2498                                        struct hda_codec *codec,
2499                                        unsigned int stream_tag,
2500                                        unsigned int format,
2501                                        struct snd_pcm_substream *substream)
2502 {
2503         struct hdmi_spec *spec = codec->spec;
2504         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2505                                              stream_tag, format, substream);
2506 }
2507
2508 static const struct hda_pcm_stream simple_pcm_playback = {
2509         .substreams = 1,
2510         .channels_min = 2,
2511         .channels_max = 2,
2512         .ops = {
2513                 .open = simple_playback_pcm_open,
2514                 .close = simple_playback_pcm_close,
2515                 .prepare = simple_playback_pcm_prepare
2516         },
2517 };
2518
2519 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2520         .build_controls = simple_playback_build_controls,
2521         .build_pcms = simple_playback_build_pcms,
2522         .init = simple_playback_init,
2523         .free = simple_playback_free,
2524         .unsol_event = simple_hdmi_unsol_event,
2525 };
2526
2527 static int patch_simple_hdmi(struct hda_codec *codec,
2528                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2529 {
2530         struct hdmi_spec *spec;
2531         struct hdmi_spec_per_cvt *per_cvt;
2532         struct hdmi_spec_per_pin *per_pin;
2533
2534         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2535         if (!spec)
2536                 return -ENOMEM;
2537
2538         codec->spec = spec;
2539         hdmi_array_init(spec, 1);
2540
2541         spec->multiout.num_dacs = 0;  /* no analog */
2542         spec->multiout.max_channels = 2;
2543         spec->multiout.dig_out_nid = cvt_nid;
2544         spec->num_cvts = 1;
2545         spec->num_pins = 1;
2546         per_pin = snd_array_new(&spec->pins);
2547         per_cvt = snd_array_new(&spec->cvts);
2548         if (!per_pin || !per_cvt) {
2549                 simple_playback_free(codec);
2550                 return -ENOMEM;
2551         }
2552         per_cvt->cvt_nid = cvt_nid;
2553         per_pin->pin_nid = pin_nid;
2554         spec->pcm_playback = simple_pcm_playback;
2555
2556         codec->patch_ops = simple_hdmi_patch_ops;
2557
2558         return 0;
2559 }
2560
2561 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2562                                                     int channels)
2563 {
2564         unsigned int chanmask;
2565         int chan = channels ? (channels - 1) : 1;
2566
2567         switch (channels) {
2568         default:
2569         case 0:
2570         case 2:
2571                 chanmask = 0x00;
2572                 break;
2573         case 4:
2574                 chanmask = 0x08;
2575                 break;
2576         case 6:
2577                 chanmask = 0x0b;
2578                 break;
2579         case 8:
2580                 chanmask = 0x13;
2581                 break;
2582         }
2583
2584         /* Set the audio infoframe channel allocation and checksum fields.  The
2585          * channel count is computed implicitly by the hardware. */
2586         snd_hda_codec_write(codec, 0x1, 0,
2587                         Nv_VERB_SET_Channel_Allocation, chanmask);
2588
2589         snd_hda_codec_write(codec, 0x1, 0,
2590                         Nv_VERB_SET_Info_Frame_Checksum,
2591                         (0x71 - chan - chanmask));
2592 }
2593
2594 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2595                                    struct hda_codec *codec,
2596                                    struct snd_pcm_substream *substream)
2597 {
2598         struct hdmi_spec *spec = codec->spec;
2599         int i;
2600
2601         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2602                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2603         for (i = 0; i < 4; i++) {
2604                 /* set the stream id */
2605                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2606                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2607                 /* set the stream format */
2608                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2609                                 AC_VERB_SET_STREAM_FORMAT, 0);
2610         }
2611
2612         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2613          * streams are disabled. */
2614         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2615
2616         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2617 }
2618
2619 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2620                                      struct hda_codec *codec,
2621                                      unsigned int stream_tag,
2622                                      unsigned int format,
2623                                      struct snd_pcm_substream *substream)
2624 {
2625         int chs;
2626         unsigned int dataDCC2, channel_id;
2627         int i;
2628         struct hdmi_spec *spec = codec->spec;
2629         struct hda_spdif_out *spdif;
2630         struct hdmi_spec_per_cvt *per_cvt;
2631
2632         mutex_lock(&codec->spdif_mutex);
2633         per_cvt = get_cvt(spec, 0);
2634         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2635
2636         chs = substream->runtime->channels;
2637
2638         dataDCC2 = 0x2;
2639
2640         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2641         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2642                 snd_hda_codec_write(codec,
2643                                 nvhdmi_master_con_nid_7x,
2644                                 0,
2645                                 AC_VERB_SET_DIGI_CONVERT_1,
2646                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2647
2648         /* set the stream id */
2649         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2650                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2651
2652         /* set the stream format */
2653         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2654                         AC_VERB_SET_STREAM_FORMAT, format);
2655
2656         /* turn on again (if needed) */
2657         /* enable and set the channel status audio/data flag */
2658         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2659                 snd_hda_codec_write(codec,
2660                                 nvhdmi_master_con_nid_7x,
2661                                 0,
2662                                 AC_VERB_SET_DIGI_CONVERT_1,
2663                                 spdif->ctls & 0xff);
2664                 snd_hda_codec_write(codec,
2665                                 nvhdmi_master_con_nid_7x,
2666                                 0,
2667                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2668         }
2669
2670         for (i = 0; i < 4; i++) {
2671                 if (chs == 2)
2672                         channel_id = 0;
2673                 else
2674                         channel_id = i * 2;
2675
2676                 /* turn off SPDIF once;
2677                  *otherwise the IEC958 bits won't be updated
2678                  */
2679                 if (codec->spdif_status_reset &&
2680                 (spdif->ctls & AC_DIG1_ENABLE))
2681                         snd_hda_codec_write(codec,
2682                                 nvhdmi_con_nids_7x[i],
2683                                 0,
2684                                 AC_VERB_SET_DIGI_CONVERT_1,
2685                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2686                 /* set the stream id */
2687                 snd_hda_codec_write(codec,
2688                                 nvhdmi_con_nids_7x[i],
2689                                 0,
2690                                 AC_VERB_SET_CHANNEL_STREAMID,
2691                                 (stream_tag << 4) | channel_id);
2692                 /* set the stream format */
2693                 snd_hda_codec_write(codec,
2694                                 nvhdmi_con_nids_7x[i],
2695                                 0,
2696                                 AC_VERB_SET_STREAM_FORMAT,
2697                                 format);
2698                 /* turn on again (if needed) */
2699                 /* enable and set the channel status audio/data flag */
2700                 if (codec->spdif_status_reset &&
2701                 (spdif->ctls & AC_DIG1_ENABLE)) {
2702                         snd_hda_codec_write(codec,
2703                                         nvhdmi_con_nids_7x[i],
2704                                         0,
2705                                         AC_VERB_SET_DIGI_CONVERT_1,
2706                                         spdif->ctls & 0xff);
2707                         snd_hda_codec_write(codec,
2708                                         nvhdmi_con_nids_7x[i],
2709                                         0,
2710                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2711                 }
2712         }
2713
2714         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2715
2716         mutex_unlock(&codec->spdif_mutex);
2717         return 0;
2718 }
2719
2720 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2721         .substreams = 1,
2722         .channels_min = 2,
2723         .channels_max = 8,
2724         .nid = nvhdmi_master_con_nid_7x,
2725         .rates = SUPPORTED_RATES,
2726         .maxbps = SUPPORTED_MAXBPS,
2727         .formats = SUPPORTED_FORMATS,
2728         .ops = {
2729                 .open = simple_playback_pcm_open,
2730                 .close = nvhdmi_8ch_7x_pcm_close,
2731                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2732         },
2733 };
2734
2735 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2736 {
2737         struct hdmi_spec *spec;
2738         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2739                                     nvhdmi_master_pin_nid_7x);
2740         if (err < 0)
2741                 return err;
2742
2743         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2744         /* override the PCM rates, etc, as the codec doesn't give full list */
2745         spec = codec->spec;
2746         spec->pcm_playback.rates = SUPPORTED_RATES;
2747         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2748         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2749         return 0;
2750 }
2751
2752 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2753 {
2754         struct hdmi_spec *spec = codec->spec;
2755         int err = simple_playback_build_pcms(codec);
2756         if (!err) {
2757                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2758                 info->own_chmap = true;
2759         }
2760         return err;
2761 }
2762
2763 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2764 {
2765         struct hdmi_spec *spec = codec->spec;
2766         struct hda_pcm *info;
2767         struct snd_pcm_chmap *chmap;
2768         int err;
2769
2770         err = simple_playback_build_controls(codec);
2771         if (err < 0)
2772                 return err;
2773
2774         /* add channel maps */
2775         info = get_pcm_rec(spec, 0);
2776         err = snd_pcm_add_chmap_ctls(info->pcm,
2777                                      SNDRV_PCM_STREAM_PLAYBACK,
2778                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2779         if (err < 0)
2780                 return err;
2781         switch (codec->preset->id) {
2782         case 0x10de0002:
2783         case 0x10de0003:
2784         case 0x10de0005:
2785         case 0x10de0006:
2786                 chmap->channel_mask = (1U << 2) | (1U << 8);
2787                 break;
2788         case 0x10de0007:
2789                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2790         }
2791         return 0;
2792 }
2793
2794 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2795 {
2796         struct hdmi_spec *spec;
2797         int err = patch_nvhdmi_2ch(codec);
2798         if (err < 0)
2799                 return err;
2800         spec = codec->spec;
2801         spec->multiout.max_channels = 8;
2802         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2803         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2804         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2805         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2806
2807         /* Initialize the audio infoframe channel mask and checksum to something
2808          * valid */
2809         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2810
2811         return 0;
2812 }
2813
2814 /*
2815  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2816  * - 0x10de0015
2817  * - 0x10de0040
2818  */
2819 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2820                                                     int channels)
2821 {
2822         if (cap->ca_index == 0x00 && channels == 2)
2823                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2824
2825         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
2826 }
2827
2828 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
2829 {
2830         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2831                 return -EINVAL;
2832
2833         return 0;
2834 }
2835
2836 static int patch_nvhdmi(struct hda_codec *codec)
2837 {
2838         struct hdmi_spec *spec;
2839         int err;
2840
2841         err = patch_generic_hdmi(codec);
2842         if (err)
2843                 return err;
2844
2845         spec = codec->spec;
2846
2847         spec->ops.chmap_cea_alloc_validate_get_type =
2848                 nvhdmi_chmap_cea_alloc_validate_get_type;
2849         spec->ops.chmap_validate = nvhdmi_chmap_validate;
2850
2851         return 0;
2852 }
2853
2854 /*
2855  * ATI/AMD-specific implementations
2856  */
2857
2858 #define is_amdhdmi_rev3_or_later(codec) \
2859         ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2860 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2861
2862 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2863 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2864 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
2865 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
2866 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
2867 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
2868 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
2869 #define ATI_VERB_SET_HBR_CONTROL        0x77c
2870 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
2871 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
2872 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
2873 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
2874 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
2875 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2876 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
2877 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
2878 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
2879 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
2880 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
2881 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
2882 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
2883 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
2884 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
2885 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
2886 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
2887
2888 /* AMD specific HDA cvt verbs */
2889 #define ATI_VERB_SET_RAMP_RATE          0x770
2890 #define ATI_VERB_GET_RAMP_RATE          0xf70
2891
2892 #define ATI_OUT_ENABLE 0x1
2893
2894 #define ATI_MULTICHANNEL_MODE_PAIRED    0
2895 #define ATI_MULTICHANNEL_MODE_SINGLE    1
2896
2897 #define ATI_HBR_CAPABLE 0x01
2898 #define ATI_HBR_ENABLE 0x10
2899
2900 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2901                            unsigned char *buf, int *eld_size)
2902 {
2903         /* call hda_eld.c ATI/AMD-specific function */
2904         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2905                                     is_amdhdmi_rev3_or_later(codec));
2906 }
2907
2908 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2909                                         int active_channels, int conn_type)
2910 {
2911         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2912 }
2913
2914 static int atihdmi_paired_swap_fc_lfe(int pos)
2915 {
2916         /*
2917          * ATI/AMD have automatic FC/LFE swap built-in
2918          * when in pairwise mapping mode.
2919          */
2920
2921         switch (pos) {
2922                 /* see channel_allocations[].speakers[] */
2923                 case 2: return 3;
2924                 case 3: return 2;
2925                 default: break;
2926         }
2927
2928         return pos;
2929 }
2930
2931 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
2932 {
2933         struct cea_channel_speaker_allocation *cap;
2934         int i, j;
2935
2936         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
2937
2938         cap = &channel_allocations[get_channel_allocation_order(ca)];
2939         for (i = 0; i < chs; ++i) {
2940                 int mask = to_spk_mask(map[i]);
2941                 bool ok = false;
2942                 bool companion_ok = false;
2943
2944                 if (!mask)
2945                         continue;
2946
2947                 for (j = 0 + i % 2; j < 8; j += 2) {
2948                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
2949                         if (cap->speakers[chan_idx] == mask) {
2950                                 /* channel is in a supported position */
2951                                 ok = true;
2952
2953                                 if (i % 2 == 0 && i + 1 < chs) {
2954                                         /* even channel, check the odd companion */
2955                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
2956                                         int comp_mask_req = to_spk_mask(map[i+1]);
2957                                         int comp_mask_act = cap->speakers[comp_chan_idx];
2958
2959                                         if (comp_mask_req == comp_mask_act)
2960                                                 companion_ok = true;
2961                                         else
2962                                                 return -EINVAL;
2963                                 }
2964                                 break;
2965                         }
2966                 }
2967
2968                 if (!ok)
2969                         return -EINVAL;
2970
2971                 if (companion_ok)
2972                         i++; /* companion channel already checked */
2973         }
2974
2975         return 0;
2976 }
2977
2978 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
2979                                         int hdmi_slot, int stream_channel)
2980 {
2981         int verb;
2982         int ati_channel_setup = 0;
2983
2984         if (hdmi_slot > 7)
2985                 return -EINVAL;
2986
2987         if (!has_amd_full_remap_support(codec)) {
2988                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
2989
2990                 /* In case this is an odd slot but without stream channel, do not
2991                  * disable the slot since the corresponding even slot could have a
2992                  * channel. In case neither have a channel, the slot pair will be
2993                  * disabled when this function is called for the even slot. */
2994                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
2995                         return 0;
2996
2997                 hdmi_slot -= hdmi_slot % 2;
2998
2999                 if (stream_channel != 0xf)
3000                         stream_channel -= stream_channel % 2;
3001         }
3002
3003         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3004
3005         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3006
3007         if (stream_channel != 0xf)
3008                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3009
3010         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3011 }
3012
3013 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3014                                         int asp_slot)
3015 {
3016         bool was_odd = false;
3017         int ati_asp_slot = asp_slot;
3018         int verb;
3019         int ati_channel_setup;
3020
3021         if (asp_slot > 7)
3022                 return -EINVAL;
3023
3024         if (!has_amd_full_remap_support(codec)) {
3025                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3026                 if (ati_asp_slot % 2 != 0) {
3027                         ati_asp_slot -= 1;
3028                         was_odd = true;
3029                 }
3030         }
3031
3032         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3033
3034         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3035
3036         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3037                 return 0xf;
3038
3039         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3040 }
3041
3042 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3043                                                             int channels)
3044 {
3045         int c;
3046
3047         /*
3048          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3049          * we need to take that into account (a single channel may take 2
3050          * channel slots if we need to carry a silent channel next to it).
3051          * On Rev3+ AMD codecs this function is not used.
3052          */
3053         int chanpairs = 0;
3054
3055         /* We only produce even-numbered channel count TLVs */
3056         if ((channels % 2) != 0)
3057                 return -1;
3058
3059         for (c = 0; c < 7; c += 2) {
3060                 if (cap->speakers[c] || cap->speakers[c+1])
3061                         chanpairs++;
3062         }
3063
3064         if (chanpairs * 2 != channels)
3065                 return -1;
3066
3067         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3068 }
3069
3070 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3071                                                   unsigned int *chmap, int channels)
3072 {
3073         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3074         int count = 0;
3075         int c;
3076
3077         for (c = 7; c >= 0; c--) {
3078                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3079                 int spk = cap->speakers[chan];
3080                 if (!spk) {
3081                         /* add N/A channel if the companion channel is occupied */
3082                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3083                                 chmap[count++] = SNDRV_CHMAP_NA;
3084
3085                         continue;
3086                 }
3087
3088                 chmap[count++] = spk_to_chmap(spk);
3089         }
3090
3091         WARN_ON(count != channels);
3092 }
3093
3094 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3095                                  bool hbr)
3096 {
3097         int hbr_ctl, hbr_ctl_new;
3098
3099         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3100         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3101                 if (hbr)
3102                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3103                 else
3104                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3105
3106                 snd_printdd("atihdmi_pin_hbr_setup: "
3107                                 "NID=0x%x, %shbr-ctl=0x%x\n",
3108                                 pin_nid,
3109                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3110                                 hbr_ctl_new);
3111
3112                 if (hbr_ctl != hbr_ctl_new)
3113                         snd_hda_codec_write(codec, pin_nid, 0,
3114                                                 ATI_VERB_SET_HBR_CONTROL,
3115                                                 hbr_ctl_new);
3116
3117         } else if (hbr)
3118                 return -EINVAL;
3119
3120         return 0;
3121 }
3122
3123 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3124                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3125 {
3126
3127         if (is_amdhdmi_rev3_or_later(codec)) {
3128                 int ramp_rate = 180; /* default as per AMD spec */
3129                 /* disable ramp-up/down for non-pcm as per AMD spec */
3130                 if (format & AC_FMT_TYPE_NON_PCM)
3131                         ramp_rate = 0;
3132
3133                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3134         }
3135
3136         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3137 }
3138
3139
3140 static int atihdmi_init(struct hda_codec *codec)
3141 {
3142         struct hdmi_spec *spec = codec->spec;
3143         int pin_idx, err;
3144
3145         err = generic_hdmi_init(codec);
3146
3147         if (err)
3148                 return err;
3149
3150         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3151                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3152
3153                 /* make sure downmix information in infoframe is zero */
3154                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3155
3156                 /* enable channel-wise remap mode if supported */
3157                 if (has_amd_full_remap_support(codec))
3158                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3159                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3160                                             ATI_MULTICHANNEL_MODE_SINGLE);
3161         }
3162
3163         return 0;
3164 }
3165
3166 static int patch_atihdmi(struct hda_codec *codec)
3167 {
3168         struct hdmi_spec *spec;
3169         struct hdmi_spec_per_cvt *per_cvt;
3170         int err, cvt_idx;
3171
3172         err = patch_generic_hdmi(codec);
3173
3174         if (err)
3175                 return err;
3176
3177         codec->patch_ops.init = atihdmi_init;
3178
3179         spec = codec->spec;
3180
3181         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3182         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3183         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3184         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3185         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3186         spec->ops.setup_stream = atihdmi_setup_stream;
3187
3188         if (!has_amd_full_remap_support(codec)) {
3189                 /* override to ATI/AMD-specific versions with pairwise mapping */
3190                 spec->ops.chmap_cea_alloc_validate_get_type =
3191                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3192                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3193                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3194         }
3195
3196         /* ATI/AMD converters do not advertise all of their capabilities */
3197         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3198                 per_cvt = get_cvt(spec, cvt_idx);
3199                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3200                 per_cvt->rates |= SUPPORTED_RATES;
3201                 per_cvt->formats |= SUPPORTED_FORMATS;
3202                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3203         }
3204
3205         spec->channels_max = max(spec->channels_max, 8u);
3206
3207         return 0;
3208 }
3209
3210 /* VIA HDMI Implementation */
3211 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3212 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3213
3214 static int patch_via_hdmi(struct hda_codec *codec)
3215 {
3216         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3217 }
3218
3219 /*
3220  * patch entries
3221  */
3222 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3223 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3224 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3225 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
3226 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_atihdmi },
3227 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
3228 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
3229 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
3230 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3231 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3232 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3233 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3234 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
3235 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi },
3236 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi },
3237 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi },
3238 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi },
3239 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi },
3240 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi },
3241 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi },
3242 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi },
3243 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi },
3244 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi },
3245 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi },
3246 /* 17 is known to be absent */
3247 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi },
3248 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi },
3249 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi },
3250 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi },
3251 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi },
3252 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi },
3253 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi },
3254 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi },
3255 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi },
3256 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi },
3257 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_nvhdmi },
3258 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_nvhdmi },
3259 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
3260 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
3261 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3262 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3263 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3264 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3265 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3266 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
3267 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
3268 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
3269 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3270 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3271 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3272 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
3273 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
3274 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3275 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
3276 {} /* terminator */
3277 };
3278
3279 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3280 MODULE_ALIAS("snd-hda-codec-id:10027919");
3281 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3282 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3283 MODULE_ALIAS("snd-hda-codec-id:10951390");
3284 MODULE_ALIAS("snd-hda-codec-id:10951392");
3285 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3286 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3287 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3288 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3289 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3290 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3291 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3292 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3293 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3294 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3295 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3296 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3297 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3298 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3299 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3300 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3301 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3302 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3303 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3304 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3305 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3306 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3307 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3308 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3309 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3310 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3311 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3312 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3313 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3314 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3315 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3316 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3317 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3318 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3319 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3320 MODULE_ALIAS("snd-hda-codec-id:80860054");
3321 MODULE_ALIAS("snd-hda-codec-id:80862801");
3322 MODULE_ALIAS("snd-hda-codec-id:80862802");
3323 MODULE_ALIAS("snd-hda-codec-id:80862803");
3324 MODULE_ALIAS("snd-hda-codec-id:80862804");
3325 MODULE_ALIAS("snd-hda-codec-id:80862805");
3326 MODULE_ALIAS("snd-hda-codec-id:80862806");
3327 MODULE_ALIAS("snd-hda-codec-id:80862807");
3328 MODULE_ALIAS("snd-hda-codec-id:80862880");
3329 MODULE_ALIAS("snd-hda-codec-id:80862882");
3330 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3331
3332 MODULE_LICENSE("GPL");
3333 MODULE_DESCRIPTION("HDMI HD-audio codec");
3334 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3335 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3336 MODULE_ALIAS("snd-hda-codec-atihdmi");
3337
3338 static struct hda_codec_preset_list intel_list = {
3339         .preset = snd_hda_preset_hdmi,
3340         .owner = THIS_MODULE,
3341 };
3342
3343 static int __init patch_hdmi_init(void)
3344 {
3345         return snd_hda_add_codec_preset(&intel_list);
3346 }
3347
3348 static void __exit patch_hdmi_exit(void)
3349 {
3350         snd_hda_delete_codec_preset(&intel_list);
3351 }
3352
3353 module_init(patch_hdmi_init)
3354 module_exit(patch_hdmi_exit)