drivers/net/usb/r8152.c

   1 /*
   2  *  Copyright (c) 2013 Realtek Semiconductor Corp. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * version 2 as published by the Free Software Foundation.
   7  *
   8  */
   9
  10 #include <linux/init.h>
  11 #include <linux/signal.h>
  12 #include <linux/slab.h>
  13 #include <linux/module.h>
  14 #include <linux/netdevice.h>
  15 #include <linux/etherdevice.h>
  16 #include <linux/mii.h>
  17 #include <linux/ethtool.h>
  18 #include <linux/usb.h>
  19 #include <linux/crc32.h>
  20 #include <linux/if_vlan.h>
  21 #include <linux/uaccess.h>
  22 #include <linux/list.h>
  23 #include <linux/ip.h>
  24 #include <linux/ipv6.h>
  25
  26 /* Version Information */
  27 #define DRIVER_VERSION "v1.02.0 (2013/10/28)"
  28 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
  29 #define DRIVER_DESC "Realtek RTL8152 Based USB 2.0 Ethernet Adapters"
  30 #define MODULENAME "r8152"
  31
  32 #define R8152_PHY_ID            32
  33
  34 #define PLA_IDR                 0xc000
  35 #define PLA_RCR                 0xc010
  36 #define PLA_RMS                 0xc016
  37 #define PLA_RXFIFO_CTRL0        0xc0a0
  38 #define PLA_RXFIFO_CTRL1        0xc0a4
  39 #define PLA_RXFIFO_CTRL2        0xc0a8
  40 #define PLA_FMC                 0xc0b4
  41 #define PLA_CFG_WOL             0xc0b6
  42 #define PLA_MAR                 0xcd00
  43 #define PAL_BDC_CR              0xd1a0
  44 #define PLA_LEDSEL              0xdd90
  45 #define PLA_LED_FEATURE         0xdd92
  46 #define PLA_PHYAR               0xde00
  47 #define PLA_GPHY_INTR_IMR       0xe022
  48 #define PLA_EEE_CR              0xe040
  49 #define PLA_EEEP_CR             0xe080
  50 #define PLA_MAC_PWR_CTRL        0xe0c0
  51 #define PLA_TCR0                0xe610
  52 #define PLA_TCR1                0xe612
  53 #define PLA_TXFIFO_CTRL         0xe618
  54 #define PLA_RSTTELLY            0xe800
  55 #define PLA_CR                  0xe813
  56 #define PLA_CRWECR              0xe81c
  57 #define PLA_CONFIG5             0xe822
  58 #define PLA_PHY_PWR             0xe84c
  59 #define PLA_OOB_CTRL            0xe84f
  60 #define PLA_CPCR                0xe854
  61 #define PLA_MISC_0              0xe858
  62 #define PLA_MISC_1              0xe85a
  63 #define PLA_OCP_GPHY_BASE       0xe86c
  64 #define PLA_TELLYCNT            0xe890
  65 #define PLA_SFF_STS_7           0xe8de
  66 #define PLA_PHYSTATUS           0xe908
  67 #define PLA_BP_BA               0xfc26
  68 #define PLA_BP_0                0xfc28
  69 #define PLA_BP_1                0xfc2a
  70 #define PLA_BP_2                0xfc2c
  71 #define PLA_BP_3                0xfc2e
  72 #define PLA_BP_4                0xfc30
  73 #define PLA_BP_5                0xfc32
  74 #define PLA_BP_6                0xfc34
  75 #define PLA_BP_7                0xfc36
  76
  77 #define USB_DEV_STAT            0xb808
  78 #define USB_USB_CTRL            0xd406
  79 #define USB_PHY_CTRL            0xd408
  80 #define USB_TX_AGG              0xd40a
  81 #define USB_RX_BUF_TH           0xd40c
  82 #define USB_USB_TIMER           0xd428
  83 #define USB_PM_CTRL_STATUS      0xd432
  84 #define USB_TX_DMA              0xd434
  85 #define USB_UPS_CTRL            0xd800
  86 #define USB_BP_BA               0xfc26
  87 #define USB_BP_0                0xfc28
  88 #define USB_BP_1                0xfc2a
  89 #define USB_BP_2                0xfc2c
  90 #define USB_BP_3                0xfc2e
  91 #define USB_BP_4                0xfc30
  92 #define USB_BP_5                0xfc32
  93 #define USB_BP_6                0xfc34
  94 #define USB_BP_7                0xfc36
  95
  96 /* OCP Registers */
  97 #define OCP_ALDPS_CONFIG        0x2010
  98 #define OCP_EEE_CONFIG1         0x2080
  99 #define OCP_EEE_CONFIG2         0x2092
 100 #define OCP_EEE_CONFIG3         0x2094
 101 #define OCP_EEE_AR              0xa41a
 102 #define OCP_EEE_DATA            0xa41c
 103
 104 /* PLA_RCR */
 105 #define RCR_AAP                 0x00000001
 106 #define RCR_APM                 0x00000002
 107 #define RCR_AM                  0x00000004
 108 #define RCR_AB                  0x00000008
 109 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
 110
 111 /* PLA_RXFIFO_CTRL0 */
 112 #define RXFIFO_THR1_NORMAL      0x00080002
 113 #define RXFIFO_THR1_OOB         0x01800003
 114
 115 /* PLA_RXFIFO_CTRL1 */
 116 #define RXFIFO_THR2_FULL        0x00000060
 117 #define RXFIFO_THR2_HIGH        0x00000038
 118 #define RXFIFO_THR2_OOB         0x0000004a
 119
 120 /* PLA_RXFIFO_CTRL2 */
 121 #define RXFIFO_THR3_FULL        0x00000078
 122 #define RXFIFO_THR3_HIGH        0x00000048
 123 #define RXFIFO_THR3_OOB         0x0000005a
 124
 125 /* PLA_TXFIFO_CTRL */
 126 #define TXFIFO_THR_NORMAL       0x00400008
 127
 128 /* PLA_FMC */
 129 #define FMC_FCR_MCU_EN          0x0001
 130
 131 /* PLA_EEEP_CR */
 132 #define EEEP_CR_EEEP_TX         0x0002
 133
 134 /* PLA_TCR0 */
 135 #define TCR0_TX_EMPTY           0x0800
 136 #define TCR0_AUTO_FIFO          0x0080
 137
 138 /* PLA_TCR1 */
 139 #define VERSION_MASK            0x7cf0
 140
 141 /* PLA_CR */
 142 #define CR_RST                  0x10
 143 #define CR_RE                   0x08
 144 #define CR_TE                   0x04
 145
 146 /* PLA_CRWECR */
 147 #define CRWECR_NORAML           0x00
 148 #define CRWECR_CONFIG           0xc0
 149
 150 /* PLA_OOB_CTRL */
 151 #define NOW_IS_OOB              0x80
 152 #define TXFIFO_EMPTY            0x20
 153 #define RXFIFO_EMPTY            0x10
 154 #define LINK_LIST_READY         0x02
 155 #define DIS_MCU_CLROOB          0x01
 156 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
 157
 158 /* PLA_MISC_1 */
 159 #define RXDY_GATED_EN           0x0008
 160
 161 /* PLA_SFF_STS_7 */
 162 #define RE_INIT_LL              0x8000
 163 #define MCU_BORW_EN             0x4000
 164
 165 /* PLA_CPCR */
 166 #define CPCR_RX_VLAN            0x0040
 167
 168 /* PLA_CFG_WOL */
 169 #define MAGIC_EN                0x0001
 170
 171 /* PAL_BDC_CR */
 172 #define ALDPS_PROXY_MODE        0x0001
 173
 174 /* PLA_CONFIG5 */
 175 #define LAN_WAKE_EN             0x0002
 176
 177 /* PLA_LED_FEATURE */
 178 #define LED_MODE_MASK           0x0700
 179
 180 /* PLA_PHY_PWR */
 181 #define TX_10M_IDLE_EN          0x0080
 182 #define PFM_PWM_SWITCH          0x0040
 183
 184 /* PLA_MAC_PWR_CTRL */
 185 #define D3_CLK_GATED_EN         0x00004000
 186 #define MCU_CLK_RATIO           0x07010f07
 187 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
 188
 189 /* PLA_GPHY_INTR_IMR */
 190 #define GPHY_STS_MSK            0x0001
 191 #define SPEED_DOWN_MSK          0x0002
 192 #define SPDWN_RXDV_MSK          0x0004
 193 #define SPDWN_LINKCHG_MSK       0x0008
 194
 195 /* PLA_PHYAR */
 196 #define PHYAR_FLAG              0x80000000
 197
 198 /* PLA_EEE_CR */
 199 #define EEE_RX_EN               0x0001
 200 #define EEE_TX_EN               0x0002
 201
 202 /* USB_DEV_STAT */
 203 #define STAT_SPEED_MASK         0x0006
 204 #define STAT_SPEED_HIGH         0x0000
 205 #define STAT_SPEED_FULL         0x0001
 206
 207 /* USB_TX_AGG */
 208 #define TX_AGG_MAX_THRESHOLD    0x03
 209
 210 /* USB_RX_BUF_TH */
 211 #define RX_BUF_THR              0x7a120180
 212
 213 /* USB_TX_DMA */
 214 #define TEST_MODE_DISABLE       0x00000001
 215 #define TX_SIZE_ADJUST1         0x00000100
 216
 217 /* USB_UPS_CTRL */
 218 #define POWER_CUT               0x0100
 219
 220 /* USB_PM_CTRL_STATUS */
 221 #define RWSUME_INDICATE         0x0001
 222
 223 /* USB_USB_CTRL */
 224 #define RX_AGG_DISABLE          0x0010
 225
 226 /* OCP_ALDPS_CONFIG */
 227 #define ENPWRSAVE               0x8000
 228 #define ENPDNPS                 0x0200
 229 #define LINKENA                 0x0100
 230 #define DIS_SDSAVE              0x0010
 231
 232 /* OCP_EEE_CONFIG1 */
 233 #define RG_TXLPI_MSK_HFDUP      0x8000
 234 #define RG_MATCLR_EN            0x4000
 235 #define EEE_10_CAP              0x2000
 236 #define EEE_NWAY_EN             0x1000
 237 #define TX_QUIET_EN             0x0200
 238 #define RX_QUIET_EN             0x0100
 239 #define SDRISETIME              0x0010  /* bit 4 ~ 6 */
 240 #define RG_RXLPI_MSK_HFDUP      0x0008
 241 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
 242
 243 /* OCP_EEE_CONFIG2 */
 244 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
 245 #define RG_DACQUIET_EN          0x0400
 246 #define RG_LDVQUIET_EN          0x0200
 247 #define RG_CKRSEL               0x0020
 248 #define RG_EEEPRG_EN            0x0010
 249
 250 /* OCP_EEE_CONFIG3 */
 251 #define FST_SNR_EYE_R           0x1500  /* bit 7 ~ 15 */
 252 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
 253 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
 254
 255 /* OCP_EEE_AR */
 256 /* bit[15:14] function */
 257 #define FUN_ADDR                0x0000
 258 #define FUN_DATA                0x4000
 259 /* bit[4:0] device addr */
 260 #define DEVICE_ADDR             0x0007
 261
 262 /* OCP_EEE_DATA */
 263 #define EEE_ADDR                0x003C
 264 #define EEE_DATA                0x0002
 265
 266 enum rtl_register_content {
 267         _100bps         = 0x08,
 268         _10bps          = 0x04,
 269         LINK_STATUS     = 0x02,
 270         FULL_DUP        = 0x01,
 271 };
 272
 273 #define RTL8152_MAX_TX          10
 274 #define RTL8152_MAX_RX          10
 275 #define INTBUFSIZE              2
 276
 277 #define INTR_LINK               0x0004
 278
 279 #define RTL8152_REQT_READ       0xc0
 280 #define RTL8152_REQT_WRITE      0x40
 281 #define RTL8152_REQ_GET_REGS    0x05
 282 #define RTL8152_REQ_SET_REGS    0x05
 283
 284 #define BYTE_EN_DWORD           0xff
 285 #define BYTE_EN_WORD            0x33
 286 #define BYTE_EN_BYTE            0x11
 287 #define BYTE_EN_SIX_BYTES       0x3f
 288 #define BYTE_EN_START_MASK      0x0f
 289 #define BYTE_EN_END_MASK        0xf0
 290
 291 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
 292 #define RTL8152_TX_TIMEOUT      (HZ)
 293
 294 /* rtl8152 flags */
 295 enum rtl8152_flags {
 296         RTL8152_UNPLUG = 0,
 297         RTL8152_SET_RX_MODE,
 298         WORK_ENABLE,
 299         RTL8152_LINK_CHG,
 300 };
 301
 302 /* Define these values to match your device */
 303 #define VENDOR_ID_REALTEK               0x0bda
 304 #define PRODUCT_ID_RTL8152              0x8152
 305
 306 #define MCU_TYPE_PLA                    0x0100
 307 #define MCU_TYPE_USB                    0x0000
 308
 309 struct rx_desc {
 310         u32 opts1;
 311 #define RX_LEN_MASK                     0x7fff
 312         u32 opts2;
 313         u32 opts3;
 314         u32 opts4;
 315         u32 opts5;
 316         u32 opts6;
 317 };
 318
 319 struct tx_desc {
 320         u32 opts1;
 321 #define TX_FS                   (1 << 31) /* First segment of a packet */
 322 #define TX_LS                   (1 << 30) /* Final segment of a packet */
 323 #define TX_LEN_MASK             0x3ffff
 324
 325         u32 opts2;
 326 #define UDP_CS                  (1 << 31) /* Calculate UDP/IP checksum */
 327 #define TCP_CS                  (1 << 30) /* Calculate TCP/IP checksum */
 328 #define IPV4_CS                 (1 << 29) /* Calculate IPv4 checksum */
 329 #define IPV6_CS                 (1 << 28) /* Calculate IPv6 checksum */
 330 };
 331
 332 struct r8152;
 333
 334 struct rx_agg {
 335         struct list_head list;
 336         struct urb *urb;
 337         struct r8152 *context;
 338         void *buffer;
 339         void *head;
 340 };
 341
 342 struct tx_agg {
 343         struct list_head list;
 344         struct urb *urb;
 345         struct r8152 *context;
 346         void *buffer;
 347         void *head;
 348         u32 skb_num;
 349         u32 skb_len;
 350 };
 351
 352 struct r8152 {
 353         unsigned long flags;
 354         struct usb_device *udev;
 355         struct tasklet_struct tl;
 356         struct usb_interface *intf;
 357         struct net_device *netdev;
 358         struct urb *intr_urb;
 359         struct tx_agg tx_info[RTL8152_MAX_TX];
 360         struct rx_agg rx_info[RTL8152_MAX_RX];
 361         struct list_head rx_done, tx_free;
 362         struct sk_buff_head tx_queue;
 363         spinlock_t rx_lock, tx_lock;
 364         struct delayed_work schedule;
 365         struct mii_if_info mii;
 366         int intr_interval;
 367         u32 msg_enable;
 368         u16 ocp_base;
 369         u8 *intr_buff;
 370         u8 version;
 371         u8 speed;
 372 };
 373
 374 enum rtl_version {
 375         RTL_VER_UNKNOWN = 0,
 376         RTL_VER_01,
 377         RTL_VER_02
 378 };
 379
 380 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
 381  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
 382  */
 383 static const int multicast_filter_limit = 32;
 384 static unsigned int rx_buf_sz = 16384;
 385
 386 static
 387 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
 388 {
 389         int ret;
 390         void *tmp;
 391
 392         tmp = kmalloc(size, GFP_KERNEL);
 393         if (!tmp)
 394                 return -ENOMEM;
 395
 396         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
 397                                RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
 398                                value, index, tmp, size, 500);
 399
 400         memcpy(data, tmp, size);
 401         kfree(tmp);
 402
 403         return ret;
 404 }
 405
 406 static
 407 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
 408 {
 409         int ret;
 410         void *tmp;
 411
 412         tmp = kmalloc(size, GFP_KERNEL);
 413         if (!tmp)
 414                 return -ENOMEM;
 415
 416         memcpy(tmp, data, size);
 417
 418         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
 419                                RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
 420                                value, index, tmp, size, 500);
 421
 422         kfree(tmp);
 423         return ret;
 424 }
 425
 426 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
 427                                 void *data, u16 type)
 428 {
 429         u16     limit = 64;
 430         int     ret = 0;
 431
 432         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 433                 return -ENODEV;
 434
 435         /* both size and indix must be 4 bytes align */
 436         if ((size & 3) || !size || (index & 3) || !data)
 437                 return -EPERM;
 438
 439         if ((u32)index + (u32)size > 0xffff)
 440                 return -EPERM;
 441
 442         while (size) {
 443                 if (size > limit) {
 444                         ret = get_registers(tp, index, type, limit, data);
 445                         if (ret < 0)
 446                                 break;
 447
 448                         index += limit;
 449                         data += limit;
 450                         size -= limit;
 451                 } else {
 452                         ret = get_registers(tp, index, type, size, data);
 453                         if (ret < 0)
 454                                 break;
 455
 456                         index += size;
 457                         data += size;
 458                         size = 0;
 459                         break;
 460                 }
 461         }
 462
 463         return ret;
 464 }
 465
 466 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
 467                                 u16 size, void *data, u16 type)
 468 {
 469         int     ret;
 470         u16     byteen_start, byteen_end, byen;
 471         u16     limit = 512;
 472
 473         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 474                 return -ENODEV;
 475
 476         /* both size and indix must be 4 bytes align */
 477         if ((size & 3) || !size || (index & 3) || !data)
 478                 return -EPERM;
 479
 480         if ((u32)index + (u32)size > 0xffff)
 481                 return -EPERM;
 482
 483         byteen_start = byteen & BYTE_EN_START_MASK;
 484         byteen_end = byteen & BYTE_EN_END_MASK;
 485
 486         byen = byteen_start | (byteen_start << 4);
 487         ret = set_registers(tp, index, type | byen, 4, data);
 488         if (ret < 0)
 489                 goto error1;
 490
 491         index += 4;
 492         data += 4;
 493         size -= 4;
 494
 495         if (size) {
 496                 size -= 4;
 497
 498                 while (size) {
 499                         if (size > limit) {
 500                                 ret = set_registers(tp, index,
 501                                         type | BYTE_EN_DWORD,
 502                                         limit, data);
 503                                 if (ret < 0)
 504                                         goto error1;
 505
 506                                 index += limit;
 507                                 data += limit;
 508                                 size -= limit;
 509                         } else {
 510                                 ret = set_registers(tp, index,
 511                                         type | BYTE_EN_DWORD,
 512                                         size, data);
 513                                 if (ret < 0)
 514                                         goto error1;
 515
 516                                 index += size;
 517                                 data += size;
 518                                 size = 0;
 519                                 break;
 520                         }
 521                 }
 522
 523                 byen = byteen_end | (byteen_end >> 4);
 524                 ret = set_registers(tp, index, type | byen, 4, data);
 525                 if (ret < 0)
 526                         goto error1;
 527         }
 528
 529 error1:
 530         return ret;
 531 }
 532
 533 static inline
 534 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
 535 {
 536         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
 537 }
 538
 539 static inline
 540 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
 541 {
 542         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
 543 }
 544
 545 static inline
 546 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
 547 {
 548         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
 549 }
 550
 551 static inline
 552 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
 553 {
 554         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
 555 }
 556
 557 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
 558 {
 559         __le32 data;
 560
 561         generic_ocp_read(tp, index, sizeof(data), &data, type);
 562
 563         return __le32_to_cpu(data);
 564 }
 565
 566 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
 567 {
 568         __le32 tmp = __cpu_to_le32(data);
 569
 570         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
 571 }
 572
 573 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
 574 {
 575         u32 data;
 576         __le32 tmp;
 577         u8 shift = index & 2;
 578
 579         index &= ~3;
 580
 581         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 582
 583         data = __le32_to_cpu(tmp);
 584         data >>= (shift * 8);
 585         data &= 0xffff;
 586
 587         return (u16)data;
 588 }
 589
 590 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
 591 {
 592         u32 mask = 0xffff;
 593         __le32 tmp;
 594         u16 byen = BYTE_EN_WORD;
 595         u8 shift = index & 2;
 596
 597         data &= mask;
 598
 599         if (index & 2) {
 600                 byen <<= shift;
 601                 mask <<= (shift * 8);
 602                 data <<= (shift * 8);
 603                 index &= ~3;
 604         }
 605
 606         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 607
 608         data |= __le32_to_cpu(tmp) & ~mask;
 609         tmp = __cpu_to_le32(data);
 610
 611         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
 612 }
 613
 614 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
 615 {
 616         u32 data;
 617         __le32 tmp;
 618         u8 shift = index & 3;
 619
 620         index &= ~3;
 621
 622         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 623
 624         data = __le32_to_cpu(tmp);
 625         data >>= (shift * 8);
 626         data &= 0xff;
 627
 628         return (u8)data;
 629 }
 630
 631 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
 632 {
 633         u32 mask = 0xff;
 634         __le32 tmp;
 635         u16 byen = BYTE_EN_BYTE;
 636         u8 shift = index & 3;
 637
 638         data &= mask;
 639
 640         if (index & 3) {
 641                 byen <<= shift;
 642                 mask <<= (shift * 8);
 643                 data <<= (shift * 8);
 644                 index &= ~3;
 645         }
 646
 647         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 648
 649         data |= __le32_to_cpu(tmp) & ~mask;
 650         tmp = __cpu_to_le32(data);
 651
 652         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
 653 }
 654
 655 static void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
 656 {
 657         u32     ocp_data;
 658         int     i;
 659
 660         ocp_data = PHYAR_FLAG | ((reg_addr & 0x1f) << 16) |
 661                    (value & 0xffff);
 662
 663         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data);
 664
 665         for (i = 20; i > 0; i--) {
 666                 udelay(25);
 667                 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR);
 668                 if (!(ocp_data & PHYAR_FLAG))
 669                         break;
 670         }
 671         udelay(20);
 672 }
 673
 674 static int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
 675 {
 676         u32     ocp_data;
 677         int     i;
 678
 679         ocp_data = (reg_addr & 0x1f) << 16;
 680         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data);
 681
 682         for (i = 20; i > 0; i--) {
 683                 udelay(25);
 684                 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR);
 685                 if (ocp_data & PHYAR_FLAG)
 686                         break;
 687         }
 688         udelay(20);
 689
 690         if (!(ocp_data & PHYAR_FLAG))
 691                 return -EAGAIN;
 692
 693         return (u16)(ocp_data & 0xffff);
 694 }
 695
 696 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
 697 {
 698         struct r8152 *tp = netdev_priv(netdev);
 699
 700         if (phy_id != R8152_PHY_ID)
 701                 return -EINVAL;
 702
 703         return r8152_mdio_read(tp, reg);
 704 }
 705
 706 static
 707 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
 708 {
 709         struct r8152 *tp = netdev_priv(netdev);
 710
 711         if (phy_id != R8152_PHY_ID)
 712                 return;
 713
 714         r8152_mdio_write(tp, reg, val);
 715 }
 716
 717 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
 718 {
 719         u16 ocp_base, ocp_index;
 720
 721         ocp_base = addr & 0xf000;
 722         if (ocp_base != tp->ocp_base) {
 723                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
 724                 tp->ocp_base = ocp_base;
 725         }
 726
 727         ocp_index = (addr & 0x0fff) | 0xb000;
 728         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
 729 }
 730
 731 static
 732 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
 733
 734 static inline void set_ethernet_addr(struct r8152 *tp)
 735 {
 736         struct net_device *dev = tp->netdev;
 737         u8 node_id[8] = {0};
 738
 739         if (pla_ocp_read(tp, PLA_IDR, sizeof(node_id), node_id) < 0)
 740                 netif_notice(tp, probe, dev, "inet addr fail\n");
 741         else {
 742                 memcpy(dev->dev_addr, node_id, dev->addr_len);
 743                 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
 744         }
 745 }
 746
 747 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
 748 {
 749         struct r8152 *tp = netdev_priv(netdev);
 750         struct sockaddr *addr = p;
 751
 752         if (!is_valid_ether_addr(addr->sa_data))
 753                 return -EADDRNOTAVAIL;
 754
 755         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
 756
 757         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
 758         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
 759         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
 760
 761         return 0;
 762 }
 763
 764 static struct net_device_stats *rtl8152_get_stats(struct net_device *dev)
 765 {
 766         return &dev->stats;
 767 }
 768
 769 static void read_bulk_callback(struct urb *urb)
 770 {
 771         struct net_device *netdev;
 772         unsigned long flags;
 773         int status = urb->status;
 774         struct rx_agg *agg;
 775         struct r8152 *tp;
 776         int result;
 777
 778         agg = urb->context;
 779         if (!agg)
 780                 return;
 781
 782         tp = agg->context;
 783         if (!tp)
 784                 return;
 785
 786         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 787                 return;
 788
 789         if (!test_bit(WORK_ENABLE, &tp->flags))
 790                 return;
 791
 792         netdev = tp->netdev;
 793
 794         /* When link down, the driver would cancel all bulks. */
 795         /* This avoid the re-submitting bulk */
 796         if (!netif_carrier_ok(netdev))
 797                 return;
 798
 799         switch (status) {
 800         case 0:
 801                 if (urb->actual_length < ETH_ZLEN)
 802                         break;
 803
 804                 spin_lock_irqsave(&tp->rx_lock, flags);
 805                 list_add_tail(&agg->list, &tp->rx_done);
 806                 spin_unlock_irqrestore(&tp->rx_lock, flags);
 807                 tasklet_schedule(&tp->tl);
 808                 return;
 809         case -ESHUTDOWN:
 810                 set_bit(RTL8152_UNPLUG, &tp->flags);
 811                 netif_device_detach(tp->netdev);
 812                 return;
 813         case -ENOENT:
 814                 return; /* the urb is in unlink state */
 815         case -ETIME:
 816                 pr_warn_ratelimited("may be reset is needed?..\n");
 817                 break;
 818         default:
 819                 pr_warn_ratelimited("Rx status %d\n", status);
 820                 break;
 821         }
 822
 823         result = r8152_submit_rx(tp, agg, GFP_ATOMIC);
 824         if (result == -ENODEV) {
 825                 netif_device_detach(tp->netdev);
 826         } else if (result) {
 827                 spin_lock_irqsave(&tp->rx_lock, flags);
 828                 list_add_tail(&agg->list, &tp->rx_done);
 829                 spin_unlock_irqrestore(&tp->rx_lock, flags);
 830                 tasklet_schedule(&tp->tl);
 831         }
 832 }
 833
 834 static void write_bulk_callback(struct urb *urb)
 835 {
 836         struct net_device_stats *stats;
 837         unsigned long flags;
 838         struct tx_agg *agg;
 839         struct r8152 *tp;
 840         int status = urb->status;
 841
 842         agg = urb->context;
 843         if (!agg)
 844                 return;
 845
 846         tp = agg->context;
 847         if (!tp)
 848                 return;
 849
 850         stats = rtl8152_get_stats(tp->netdev);
 851         if (status) {
 852                 pr_warn_ratelimited("Tx status %d\n", status);
 853                 stats->tx_errors += agg->skb_num;
 854         } else {
 855                 stats->tx_packets += agg->skb_num;
 856                 stats->tx_bytes += agg->skb_len;
 857         }
 858
 859         spin_lock_irqsave(&tp->tx_lock, flags);
 860         list_add_tail(&agg->list, &tp->tx_free);
 861         spin_unlock_irqrestore(&tp->tx_lock, flags);
 862
 863         if (!netif_carrier_ok(tp->netdev))
 864                 return;
 865
 866         if (!test_bit(WORK_ENABLE, &tp->flags))
 867                 return;
 868
 869         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 870                 return;
 871
 872         if (!skb_queue_empty(&tp->tx_queue))
 873                 tasklet_schedule(&tp->tl);
 874 }
 875
 876 static void intr_callback(struct urb *urb)
 877 {
 878         struct r8152 *tp;
 879         __u16 *d;
 880         int status = urb->status;
 881         int res;
 882
 883         tp = urb->context;
 884         if (!tp)
 885                 return;
 886
 887         if (!test_bit(WORK_ENABLE, &tp->flags))
 888                 return;
 889
 890         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 891                 return;
 892
 893         switch (status) {
 894         case 0:                 /* success */
 895                 break;
 896         case -ECONNRESET:       /* unlink */
 897         case -ESHUTDOWN:
 898                 netif_device_detach(tp->netdev);
 899         case -ENOENT:
 900                 return;
 901         case -EOVERFLOW:
 902                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
 903                 goto resubmit;
 904         /* -EPIPE:  should clear the halt */
 905         default:
 906                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
 907                 goto resubmit;
 908         }
 909
 910         d = urb->transfer_buffer;
 911         if (INTR_LINK & __le16_to_cpu(d[0])) {
 912                 if (!(tp->speed & LINK_STATUS)) {
 913                         set_bit(RTL8152_LINK_CHG, &tp->flags);
 914                         schedule_delayed_work(&tp->schedule, 0);
 915                 }
 916         } else {
 917                 if (tp->speed & LINK_STATUS) {
 918                         set_bit(RTL8152_LINK_CHG, &tp->flags);
 919                         schedule_delayed_work(&tp->schedule, 0);
 920                 }
 921         }
 922
 923 resubmit:
 924         res = usb_submit_urb(urb, GFP_ATOMIC);
 925         if (res == -ENODEV)
 926                 netif_device_detach(tp->netdev);
 927         else if (res)
 928                 netif_err(tp, intr, tp->netdev,
 929                         "can't resubmit intr, status %d\n", res);
 930 }
 931
 932 static inline void *rx_agg_align(void *data)
 933 {
 934         return (void *)ALIGN((uintptr_t)data, 8);
 935 }
 936
 937 static inline void *tx_agg_align(void *data)
 938 {
 939         return (void *)ALIGN((uintptr_t)data, 4);
 940 }
 941
 942 static void free_all_mem(struct r8152 *tp)
 943 {
 944         int i;
 945
 946         for (i = 0; i < RTL8152_MAX_RX; i++) {
 947                 if (tp->rx_info[i].urb) {
 948                         usb_free_urb(tp->rx_info[i].urb);
 949                         tp->rx_info[i].urb = NULL;
 950                 }
 951
 952                 if (tp->rx_info[i].buffer) {
 953                         kfree(tp->rx_info[i].buffer);
 954                         tp->rx_info[i].buffer = NULL;
 955                         tp->rx_info[i].head = NULL;
 956                 }
 957         }
 958
 959         for (i = 0; i < RTL8152_MAX_TX; i++) {
 960                 if (tp->tx_info[i].urb) {
 961                         usb_free_urb(tp->tx_info[i].urb);
 962                         tp->tx_info[i].urb = NULL;
 963                 }
 964
 965                 if (tp->tx_info[i].buffer) {
 966                         kfree(tp->tx_info[i].buffer);
 967                         tp->tx_info[i].buffer = NULL;
 968                         tp->tx_info[i].head = NULL;
 969                 }
 970         }
 971
 972         if (tp->intr_urb) {
 973                 usb_free_urb(tp->intr_urb);
 974                 tp->intr_urb = NULL;
 975         }
 976
 977         if (tp->intr_buff) {
 978                 kfree(tp->intr_buff);
 979                 tp->intr_buff = NULL;
 980         }
 981 }
 982
 983 static int alloc_all_mem(struct r8152 *tp)
 984 {
 985         struct net_device *netdev = tp->netdev;
 986         struct usb_interface *intf = tp->intf;
 987         struct usb_host_interface *alt = intf->cur_altsetting;
 988         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
 989         struct urb *urb;
 990         int node, i;
 991         u8 *buf;
 992
 993         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
 994
 995         spin_lock_init(&tp->rx_lock);
 996         spin_lock_init(&tp->tx_lock);
 997         INIT_LIST_HEAD(&tp->rx_done);
 998         INIT_LIST_HEAD(&tp->tx_free);
 999         skb_queue_head_init(&tp->tx_queue);
1000
1001         for (i = 0; i < RTL8152_MAX_RX; i++) {
1002                 buf = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
1003                 if (!buf)
1004                         goto err1;
1005
1006                 if (buf != rx_agg_align(buf)) {
1007                         kfree(buf);
1008                         buf = kmalloc_node(rx_buf_sz + 8, GFP_KERNEL, node);
1009                         if (!buf)
1010                                 goto err1;
1011                 }
1012
1013                 urb = usb_alloc_urb(0, GFP_KERNEL);
1014                 if (!urb) {
1015                         kfree(buf);
1016                         goto err1;
1017                 }
1018
1019                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1020                 tp->rx_info[i].context = tp;
1021                 tp->rx_info[i].urb = urb;
1022                 tp->rx_info[i].buffer = buf;
1023                 tp->rx_info[i].head = rx_agg_align(buf);
1024         }
1025
1026         for (i = 0; i < RTL8152_MAX_TX; i++) {
1027                 buf = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
1028                 if (!buf)
1029                         goto err1;
1030
1031                 if (buf != tx_agg_align(buf)) {
1032                         kfree(buf);
1033                         buf = kmalloc_node(rx_buf_sz + 4, GFP_KERNEL, node);
1034                         if (!buf)
1035                                 goto err1;
1036                 }
1037
1038                 urb = usb_alloc_urb(0, GFP_KERNEL);
1039                 if (!urb) {
1040                         kfree(buf);
1041                         goto err1;
1042                 }
1043
1044                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1045                 tp->tx_info[i].context = tp;
1046                 tp->tx_info[i].urb = urb;
1047                 tp->tx_info[i].buffer = buf;
1048                 tp->tx_info[i].head = tx_agg_align(buf);
1049
1050                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1051         }
1052
1053         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1054         if (!tp->intr_urb)
1055                 goto err1;
1056
1057         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1058         if (!tp->intr_buff)
1059                 goto err1;
1060
1061         tp->intr_interval = (int)ep_intr->desc.bInterval;
1062         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1063                      tp->intr_buff, INTBUFSIZE, intr_callback,
1064                      tp, tp->intr_interval);
1065
1066         return 0;
1067
1068 err1:
1069         free_all_mem(tp);
1070         return -ENOMEM;
1071 }
1072
1073 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1074 {
1075         struct tx_agg *agg = NULL;
1076         unsigned long flags;
1077
1078         spin_lock_irqsave(&tp->tx_lock, flags);
1079         if (!list_empty(&tp->tx_free)) {
1080                 struct list_head *cursor;
1081
1082                 cursor = tp->tx_free.next;
1083                 list_del_init(cursor);
1084                 agg = list_entry(cursor, struct tx_agg, list);
1085         }
1086         spin_unlock_irqrestore(&tp->tx_lock, flags);
1087
1088         return agg;
1089 }
1090
1091 static void
1092 r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc, struct sk_buff *skb)
1093 {
1094         memset(desc, 0, sizeof(*desc));
1095
1096         desc->opts1 = cpu_to_le32((skb->len & TX_LEN_MASK) | TX_FS | TX_LS);
1097
1098         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1099                 __be16 protocol;
1100                 u8 ip_protocol;
1101                 u32 opts2 = 0;
1102
1103                 if (skb->protocol == htons(ETH_P_8021Q))
1104                         protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1105                 else
1106                         protocol = skb->protocol;
1107
1108                 switch (protocol) {
1109                 case htons(ETH_P_IP):
1110                         opts2 |= IPV4_CS;
1111                         ip_protocol = ip_hdr(skb)->protocol;
1112                         break;
1113
1114                 case htons(ETH_P_IPV6):
1115                         opts2 |= IPV6_CS;
1116                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1117                         break;
1118
1119                 default:
1120                         ip_protocol = IPPROTO_RAW;
1121                         break;
1122                 }
1123
1124                 if (ip_protocol == IPPROTO_TCP) {
1125                         opts2 |= TCP_CS;
1126                         opts2 |= (skb_transport_offset(skb) & 0x7fff) << 17;
1127                 } else if (ip_protocol == IPPROTO_UDP) {
1128                         opts2 |= UDP_CS;
1129                 } else {
1130                         WARN_ON_ONCE(1);
1131                 }
1132
1133                 desc->opts2 = cpu_to_le32(opts2);
1134         }
1135 }
1136
1137 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1138 {
1139         int remain;
1140         u8 *tx_data;
1141
1142         tx_data = agg->head;
1143         agg->skb_num = agg->skb_len = 0;
1144         remain = rx_buf_sz;
1145
1146         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1147                 struct tx_desc *tx_desc;
1148                 struct sk_buff *skb;
1149                 unsigned int len;
1150
1151                 skb = skb_dequeue(&tp->tx_queue);
1152                 if (!skb)
1153                         break;
1154
1155                 remain -= sizeof(*tx_desc);
1156                 len = skb->len;
1157                 if (remain < len) {
1158                         skb_queue_head(&tp->tx_queue, skb);
1159                         break;
1160                 }
1161
1162                 tx_data = tx_agg_align(tx_data);
1163                 tx_desc = (struct tx_desc *)tx_data;
1164                 tx_data += sizeof(*tx_desc);
1165
1166                 r8152_tx_csum(tp, tx_desc, skb);
1167                 memcpy(tx_data, skb->data, len);
1168                 agg->skb_num++;
1169                 agg->skb_len += len;
1170                 dev_kfree_skb_any(skb);
1171
1172                 tx_data += len;
1173                 remain = rx_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1174         }
1175
1176         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1177                           agg->head, (int)(tx_data - (u8 *)agg->head),
1178                           (usb_complete_t)write_bulk_callback, agg);
1179
1180         return usb_submit_urb(agg->urb, GFP_ATOMIC);
1181 }
1182
1183 static void rx_bottom(struct r8152 *tp)
1184 {
1185         unsigned long flags;
1186         struct list_head *cursor, *next;
1187
1188         spin_lock_irqsave(&tp->rx_lock, flags);
1189         list_for_each_safe(cursor, next, &tp->rx_done) {
1190                 struct rx_desc *rx_desc;
1191                 struct rx_agg *agg;
1192                 int len_used = 0;
1193                 struct urb *urb;
1194                 u8 *rx_data;
1195                 int ret;
1196
1197                 list_del_init(cursor);
1198                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1199
1200                 agg = list_entry(cursor, struct rx_agg, list);
1201                 urb = agg->urb;
1202                 if (urb->actual_length < ETH_ZLEN)
1203                         goto submit;
1204
1205                 rx_desc = agg->head;
1206                 rx_data = agg->head;
1207                 len_used += sizeof(struct rx_desc);
1208
1209                 while (urb->actual_length > len_used) {
1210                         struct net_device *netdev = tp->netdev;
1211                         struct net_device_stats *stats;
1212                         unsigned int pkt_len;
1213                         struct sk_buff *skb;
1214
1215                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1216                         if (pkt_len < ETH_ZLEN)
1217                                 break;
1218
1219                         len_used += pkt_len;
1220                         if (urb->actual_length < len_used)
1221                                 break;
1222
1223                         stats = rtl8152_get_stats(netdev);
1224
1225                         pkt_len -= 4; /* CRC */
1226                         rx_data += sizeof(struct rx_desc);
1227
1228                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1229                         if (!skb) {
1230                                 stats->rx_dropped++;
1231                                 break;
1232                         }
1233                         memcpy(skb->data, rx_data, pkt_len);
1234                         skb_put(skb, pkt_len);
1235                         skb->protocol = eth_type_trans(skb, netdev);
1236                         netif_rx(skb);
1237                         stats->rx_packets++;
1238                         stats->rx_bytes += pkt_len;
1239
1240                         rx_data = rx_agg_align(rx_data + pkt_len + 4);
1241                         rx_desc = (struct rx_desc *)rx_data;
1242                         len_used = (int)(rx_data - (u8 *)agg->head);
1243                         len_used += sizeof(struct rx_desc);
1244                 }
1245
1246 submit:
1247                 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1248                 spin_lock_irqsave(&tp->rx_lock, flags);
1249                 if (ret && ret != -ENODEV) {
1250                         list_add_tail(&agg->list, next);
1251                         tasklet_schedule(&tp->tl);
1252                 }
1253         }
1254         spin_unlock_irqrestore(&tp->rx_lock, flags);
1255 }
1256
1257 static void tx_bottom(struct r8152 *tp)
1258 {
1259         int res;
1260
1261         do {
1262                 struct tx_agg *agg;
1263
1264                 if (skb_queue_empty(&tp->tx_queue))
1265                         break;
1266
1267                 agg = r8152_get_tx_agg(tp);
1268                 if (!agg)
1269                         break;
1270
1271                 res = r8152_tx_agg_fill(tp, agg);
1272                 if (res) {
1273                         struct net_device_stats *stats;
1274                         struct net_device *netdev;
1275                         unsigned long flags;
1276
1277                         netdev = tp->netdev;
1278                         stats = rtl8152_get_stats(netdev);
1279
1280                         if (res == -ENODEV) {
1281                                 netif_device_detach(netdev);
1282                         } else {
1283                                 netif_warn(tp, tx_err, netdev,
1284                                            "failed tx_urb %d\n", res);
1285                                 stats->tx_dropped += agg->skb_num;
1286                                 spin_lock_irqsave(&tp->tx_lock, flags);
1287                                 list_add_tail(&agg->list, &tp->tx_free);
1288                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1289                         }
1290                 }
1291         } while (res == 0);
1292 }
1293
1294 static void bottom_half(unsigned long data)
1295 {
1296         struct r8152 *tp;
1297
1298         tp = (struct r8152 *)data;
1299
1300         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1301                 return;
1302
1303         if (!test_bit(WORK_ENABLE, &tp->flags))
1304                 return;
1305
1306         /* When link down, the driver would cancel all bulks. */
1307         /* This avoid the re-submitting bulk */
1308         if (!netif_carrier_ok(tp->netdev))
1309                 return;
1310
1311         rx_bottom(tp);
1312         tx_bottom(tp);
1313 }
1314
1315 static
1316 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1317 {
1318         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1319                       agg->head, rx_buf_sz,
1320                       (usb_complete_t)read_bulk_callback, agg);
1321
1322         return usb_submit_urb(agg->urb, mem_flags);
1323 }
1324
1325 static void rtl8152_tx_timeout(struct net_device *netdev)
1326 {
1327         struct r8152 *tp = netdev_priv(netdev);
1328         int i;
1329
1330         netif_warn(tp, tx_err, netdev, "Tx timeout.\n");
1331         for (i = 0; i < RTL8152_MAX_TX; i++)
1332                 usb_unlink_urb(tp->tx_info[i].urb);
1333 }
1334
1335 static void rtl8152_set_rx_mode(struct net_device *netdev)
1336 {
1337         struct r8152 *tp = netdev_priv(netdev);
1338
1339         if (tp->speed & LINK_STATUS) {
1340                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1341                 schedule_delayed_work(&tp->schedule, 0);
1342         }
1343 }
1344
1345 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1346 {
1347         struct r8152 *tp = netdev_priv(netdev);
1348         u32 mc_filter[2];       /* Multicast hash filter */
1349         __le32 tmp[2];
1350         u32 ocp_data;
1351
1352         clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1353         netif_stop_queue(netdev);
1354         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1355         ocp_data &= ~RCR_ACPT_ALL;
1356         ocp_data |= RCR_AB | RCR_APM;
1357
1358         if (netdev->flags & IFF_PROMISC) {
1359                 /* Unconditionally log net taps. */
1360                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1361                 ocp_data |= RCR_AM | RCR_AAP;
1362                 mc_filter[1] = mc_filter[0] = 0xffffffff;
1363         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1364                    (netdev->flags & IFF_ALLMULTI)) {
1365                 /* Too many to filter perfectly -- accept all multicasts. */
1366                 ocp_data |= RCR_AM;
1367                 mc_filter[1] = mc_filter[0] = 0xffffffff;
1368         } else {
1369                 struct netdev_hw_addr *ha;
1370
1371                 mc_filter[1] = mc_filter[0] = 0;
1372                 netdev_for_each_mc_addr(ha, netdev) {
1373                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1374                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1375                         ocp_data |= RCR_AM;
1376                 }
1377         }
1378
1379         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1380         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1381
1382         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1383         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1384         netif_wake_queue(netdev);
1385 }
1386
1387 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1388                                             struct net_device *netdev)
1389 {
1390         struct r8152 *tp = netdev_priv(netdev);
1391
1392         skb_tx_timestamp(skb);
1393
1394         skb_queue_tail(&tp->tx_queue, skb);
1395
1396         if (!list_empty(&tp->tx_free))
1397                 tasklet_schedule(&tp->tl);
1398
1399         return NETDEV_TX_OK;
1400 }
1401
1402 static void r8152b_reset_packet_filter(struct r8152 *tp)
1403 {
1404         u32     ocp_data;
1405
1406         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1407         ocp_data &= ~FMC_FCR_MCU_EN;
1408         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1409         ocp_data |= FMC_FCR_MCU_EN;
1410         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1411 }
1412
1413 static void rtl8152_nic_reset(struct r8152 *tp)
1414 {
1415         int     i;
1416
1417         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1418
1419         for (i = 0; i < 1000; i++) {
1420                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1421                         break;
1422                 udelay(100);
1423         }
1424 }
1425
1426 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1427 {
1428         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1429 }
1430
1431 static int rtl8152_enable(struct r8152 *tp)
1432 {
1433         u32 ocp_data;
1434         int i, ret;
1435         u8 speed;
1436
1437         speed = rtl8152_get_speed(tp);
1438         if (speed & _10bps) {
1439                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1440                 ocp_data |= EEEP_CR_EEEP_TX;
1441                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1442         } else {
1443                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1444                 ocp_data &= ~EEEP_CR_EEEP_TX;
1445                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1446         }
1447
1448         r8152b_reset_packet_filter(tp);
1449
1450         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
1451         ocp_data |= CR_RE | CR_TE;
1452         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
1453
1454         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1455         ocp_data &= ~RXDY_GATED_EN;
1456         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1457
1458         INIT_LIST_HEAD(&tp->rx_done);
1459         ret = 0;
1460         for (i = 0; i < RTL8152_MAX_RX; i++) {
1461                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1462                 ret |= r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
1463         }
1464
1465         return ret;
1466 }
1467
1468 static void rtl8152_disable(struct r8152 *tp)
1469 {
1470         struct net_device_stats *stats = rtl8152_get_stats(tp->netdev);
1471         struct sk_buff *skb;
1472         u32 ocp_data;
1473         int i;
1474
1475         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1476         ocp_data &= ~RCR_ACPT_ALL;
1477         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1478
1479         while ((skb = skb_dequeue(&tp->tx_queue))) {
1480                 dev_kfree_skb(skb);
1481                 stats->tx_dropped++;
1482         }
1483
1484         for (i = 0; i < RTL8152_MAX_TX; i++)
1485                 usb_kill_urb(tp->tx_info[i].urb);
1486
1487         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1488         ocp_data |= RXDY_GATED_EN;
1489         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1490
1491         for (i = 0; i < 1000; i++) {
1492                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1493                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
1494                         break;
1495                 mdelay(1);
1496         }
1497
1498         for (i = 0; i < 1000; i++) {
1499                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
1500                         break;
1501                 mdelay(1);
1502         }
1503
1504         for (i = 0; i < RTL8152_MAX_RX; i++)
1505                 usb_kill_urb(tp->rx_info[i].urb);
1506
1507         rtl8152_nic_reset(tp);
1508 }
1509
1510 static void r8152b_exit_oob(struct r8152 *tp)
1511 {
1512         u32     ocp_data;
1513         int     i;
1514
1515         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1516         ocp_data &= ~RCR_ACPT_ALL;
1517         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1518
1519         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1520         ocp_data |= RXDY_GATED_EN;
1521         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1522
1523         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1524         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
1525
1526         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1527         ocp_data &= ~NOW_IS_OOB;
1528         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1529
1530         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1531         ocp_data &= ~MCU_BORW_EN;
1532         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1533
1534         for (i = 0; i < 1000; i++) {
1535                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1536                 if (ocp_data & LINK_LIST_READY)
1537                         break;
1538                 mdelay(1);
1539         }
1540
1541         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1542         ocp_data |= RE_INIT_LL;
1543         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1544
1545         for (i = 0; i < 1000; i++) {
1546                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1547                 if (ocp_data & LINK_LIST_READY)
1548                         break;
1549                 mdelay(1);
1550         }
1551
1552         rtl8152_nic_reset(tp);
1553
1554         /* rx share fifo credit full threshold */
1555         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
1556
1557         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_DEV_STAT);
1558         ocp_data &= STAT_SPEED_MASK;
1559         if (ocp_data == STAT_SPEED_FULL) {
1560                 /* rx share fifo credit near full threshold */
1561                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
1562                                 RXFIFO_THR2_FULL);
1563                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
1564                                 RXFIFO_THR3_FULL);
1565         } else {
1566                 /* rx share fifo credit near full threshold */
1567                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
1568                                 RXFIFO_THR2_HIGH);
1569                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
1570                                 RXFIFO_THR3_HIGH);
1571         }
1572
1573         /* TX share fifo free credit full threshold */
1574         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
1575
1576         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
1577         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_BUF_THR);
1578         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
1579                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
1580
1581         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
1582         ocp_data &= ~CPCR_RX_VLAN;
1583         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
1584
1585         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
1586
1587         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
1588         ocp_data |= TCR0_AUTO_FIFO;
1589         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
1590 }
1591
1592 static void r8152b_enter_oob(struct r8152 *tp)
1593 {
1594         u32     ocp_data;
1595         int     i;
1596
1597         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1598         ocp_data &= ~NOW_IS_OOB;
1599         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1600
1601         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
1602         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
1603         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
1604
1605         rtl8152_disable(tp);
1606
1607         for (i = 0; i < 1000; i++) {
1608                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1609                 if (ocp_data & LINK_LIST_READY)
1610                         break;
1611                 mdelay(1);
1612         }
1613
1614         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1615         ocp_data |= RE_INIT_LL;
1616         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1617
1618         for (i = 0; i < 1000; i++) {
1619                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1620                 if (ocp_data & LINK_LIST_READY)
1621                         break;
1622                 mdelay(1);
1623         }
1624
1625         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
1626
1627         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
1628         ocp_data |= MAGIC_EN;
1629         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
1630
1631         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
1632         ocp_data |= CPCR_RX_VLAN;
1633         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
1634
1635         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
1636         ocp_data |= ALDPS_PROXY_MODE;
1637         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
1638
1639         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1640         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
1641         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1642
1643         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5, LAN_WAKE_EN);
1644
1645         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1646         ocp_data &= ~RXDY_GATED_EN;
1647         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1648
1649         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1650         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
1651         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1652 }
1653
1654 static void r8152b_disable_aldps(struct r8152 *tp)
1655 {
1656         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
1657         msleep(20);
1658 }
1659
1660 static inline void r8152b_enable_aldps(struct r8152 *tp)
1661 {
1662         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
1663                                             LINKENA | DIS_SDSAVE);
1664 }
1665
1666 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
1667 {
1668         u16 bmcr, anar;
1669         int ret = 0;
1670
1671         cancel_delayed_work_sync(&tp->schedule);
1672         anar = r8152_mdio_read(tp, MII_ADVERTISE);
1673         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
1674                   ADVERTISE_100HALF | ADVERTISE_100FULL);
1675
1676         if (autoneg == AUTONEG_DISABLE) {
1677                 if (speed == SPEED_10) {
1678                         bmcr = 0;
1679                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1680                 } else if (speed == SPEED_100) {
1681                         bmcr = BMCR_SPEED100;
1682                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
1683                 } else {
1684                         ret = -EINVAL;
1685                         goto out;
1686                 }
1687
1688                 if (duplex == DUPLEX_FULL)
1689                         bmcr |= BMCR_FULLDPLX;
1690         } else {
1691                 if (speed == SPEED_10) {
1692                         if (duplex == DUPLEX_FULL)
1693                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1694                         else
1695                                 anar |= ADVERTISE_10HALF;
1696                 } else if (speed == SPEED_100) {
1697                         if (duplex == DUPLEX_FULL) {
1698                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1699                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
1700                         } else {
1701                                 anar |= ADVERTISE_10HALF;
1702                                 anar |= ADVERTISE_100HALF;
1703                         }
1704                 } else {
1705                         ret = -EINVAL;
1706                         goto out;
1707                 }
1708
1709                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
1710         }
1711
1712         r8152_mdio_write(tp, MII_ADVERTISE, anar);
1713         r8152_mdio_write(tp, MII_BMCR, bmcr);
1714
1715 out:
1716
1717         return ret;
1718 }
1719
1720 static void rtl8152_down(struct r8152 *tp)
1721 {
1722         u32     ocp_data;
1723
1724         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
1725         ocp_data &= ~POWER_CUT;
1726         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
1727
1728         r8152b_disable_aldps(tp);
1729         r8152b_enter_oob(tp);
1730         r8152b_enable_aldps(tp);
1731 }
1732
1733 static void set_carrier(struct r8152 *tp)
1734 {
1735         struct net_device *netdev = tp->netdev;
1736         u8 speed;
1737
1738         clear_bit(RTL8152_LINK_CHG, &tp->flags);
1739         speed = rtl8152_get_speed(tp);
1740
1741         if (speed & LINK_STATUS) {
1742                 if (!(tp->speed & LINK_STATUS)) {
1743                         rtl8152_enable(tp);
1744                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1745                         netif_carrier_on(netdev);
1746                 }
1747         } else {
1748                 if (tp->speed & LINK_STATUS) {
1749                         netif_carrier_off(netdev);
1750                         tasklet_disable(&tp->tl);
1751                         rtl8152_disable(tp);
1752                         tasklet_enable(&tp->tl);
1753                 }
1754         }
1755         tp->speed = speed;
1756 }
1757
1758 static void rtl_work_func_t(struct work_struct *work)
1759 {
1760         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
1761
1762         if (!test_bit(WORK_ENABLE, &tp->flags))
1763                 goto out1;
1764
1765         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1766                 goto out1;
1767
1768         if (test_bit(RTL8152_LINK_CHG, &tp->flags))
1769                 set_carrier(tp);
1770
1771         if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
1772                 _rtl8152_set_rx_mode(tp->netdev);
1773
1774 out1:
1775         return;
1776 }
1777
1778 static int rtl8152_open(struct net_device *netdev)
1779 {
1780         struct r8152 *tp = netdev_priv(netdev);
1781         int res = 0;
1782
1783         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
1784         if (res) {
1785                 if (res == -ENODEV)
1786                         netif_device_detach(tp->netdev);
1787                 netif_warn(tp, ifup, netdev,
1788                         "intr_urb submit failed: %d\n", res);
1789                 return res;
1790         }
1791
1792         rtl8152_set_speed(tp, AUTONEG_ENABLE, SPEED_100, DUPLEX_FULL);
1793         tp->speed = 0;
1794         netif_carrier_off(netdev);
1795         netif_start_queue(netdev);
1796         set_bit(WORK_ENABLE, &tp->flags);
1797
1798         return res;
1799 }
1800
1801 static int rtl8152_close(struct net_device *netdev)
1802 {
1803         struct r8152 *tp = netdev_priv(netdev);
1804         int res = 0;
1805
1806         usb_kill_urb(tp->intr_urb);
1807         clear_bit(WORK_ENABLE, &tp->flags);
1808         cancel_delayed_work_sync(&tp->schedule);
1809         netif_stop_queue(netdev);
1810         tasklet_disable(&tp->tl);
1811         rtl8152_disable(tp);
1812         tasklet_enable(&tp->tl);
1813
1814         return res;
1815 }
1816
1817 static void rtl_clear_bp(struct r8152 *tp)
1818 {
1819         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_0, 0);
1820         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_2, 0);
1821         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_4, 0);
1822         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_6, 0);
1823         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_0, 0);
1824         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_2, 0);
1825         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_4, 0);
1826         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_6, 0);
1827         mdelay(3);
1828         ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_BA, 0);
1829         ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0);
1830 }
1831
1832 static void r8152b_enable_eee(struct r8152 *tp)
1833 {
1834         u32     ocp_data;
1835
1836         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
1837         ocp_data |= EEE_RX_EN | EEE_TX_EN;
1838         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
1839         ocp_reg_write(tp, OCP_EEE_CONFIG1, RG_TXLPI_MSK_HFDUP | RG_MATCLR_EN |
1840                                            EEE_10_CAP | EEE_NWAY_EN |
1841                                            TX_QUIET_EN | RX_QUIET_EN |
1842                                            SDRISETIME | RG_RXLPI_MSK_HFDUP |
1843                                            SDFALLTIME);
1844         ocp_reg_write(tp, OCP_EEE_CONFIG2, RG_LPIHYS_NUM | RG_DACQUIET_EN |
1845                                            RG_LDVQUIET_EN | RG_CKRSEL |
1846                                            RG_EEEPRG_EN);
1847         ocp_reg_write(tp, OCP_EEE_CONFIG3, FST_SNR_EYE_R | RG_LFS_SEL | MSK_PH);
1848         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | DEVICE_ADDR);
1849         ocp_reg_write(tp, OCP_EEE_DATA, EEE_ADDR);
1850         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | DEVICE_ADDR);
1851         ocp_reg_write(tp, OCP_EEE_DATA, EEE_DATA);
1852         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
1853 }
1854
1855 static void r8152b_enable_fc(struct r8152 *tp)
1856 {
1857         u16 anar;
1858
1859         anar = r8152_mdio_read(tp, MII_ADVERTISE);
1860         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1861         r8152_mdio_write(tp, MII_ADVERTISE, anar);
1862 }
1863
1864 static void r8152b_hw_phy_cfg(struct r8152 *tp)
1865 {
1866         r8152_mdio_write(tp, MII_BMCR, BMCR_ANENABLE);
1867         r8152b_disable_aldps(tp);
1868 }
1869
1870 static void r8152b_init(struct r8152 *tp)
1871 {
1872         u32 ocp_data;
1873         int i;
1874
1875         rtl_clear_bp(tp);
1876
1877         if (tp->version == RTL_VER_01) {
1878                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
1879                 ocp_data &= ~LED_MODE_MASK;
1880                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
1881         }
1882
1883         r8152b_hw_phy_cfg(tp);
1884
1885         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
1886         ocp_data &= ~POWER_CUT;
1887         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
1888
1889         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
1890         ocp_data &= ~RWSUME_INDICATE;
1891         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
1892
1893         r8152b_exit_oob(tp);
1894
1895         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
1896         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
1897         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
1898         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
1899         ocp_data &= ~MCU_CLK_RATIO_MASK;
1900         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
1901         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
1902         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
1903                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
1904         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
1905
1906         r8152b_enable_eee(tp);
1907         r8152b_enable_aldps(tp);
1908         r8152b_enable_fc(tp);
1909
1910         r8152_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE |
1911                                        BMCR_ANRESTART);
1912         for (i = 0; i < 100; i++) {
1913                 udelay(100);
1914                 if (!(r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET))
1915                         break;
1916         }
1917
1918         /* enable rx aggregation */
1919         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
1920         ocp_data &= ~RX_AGG_DISABLE;
1921         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
1922 }
1923
1924 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
1925 {
1926         struct r8152 *tp = usb_get_intfdata(intf);
1927
1928         netif_device_detach(tp->netdev);
1929
1930         if (netif_running(tp->netdev)) {
1931                 clear_bit(WORK_ENABLE, &tp->flags);
1932                 usb_kill_urb(tp->intr_urb);
1933                 cancel_delayed_work_sync(&tp->schedule);
1934                 tasklet_disable(&tp->tl);
1935         }
1936
1937         rtl8152_down(tp);
1938
1939         return 0;
1940 }
1941
1942 static int rtl8152_resume(struct usb_interface *intf)
1943 {
1944         struct r8152 *tp = usb_get_intfdata(intf);
1945
1946         r8152b_init(tp);
1947         netif_device_attach(tp->netdev);
1948         if (netif_running(tp->netdev)) {
1949                 rtl8152_set_speed(tp, AUTONEG_ENABLE, SPEED_100, DUPLEX_FULL);
1950                 tp->speed = 0;
1951                 netif_carrier_off(tp->netdev);
1952                 set_bit(WORK_ENABLE, &tp->flags);
1953                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
1954                 tasklet_enable(&tp->tl);
1955         }
1956
1957         return 0;
1958 }
1959
1960 static void rtl8152_get_drvinfo(struct net_device *netdev,
1961                                 struct ethtool_drvinfo *info)
1962 {
1963         struct r8152 *tp = netdev_priv(netdev);
1964
1965         strncpy(info->driver, MODULENAME, ETHTOOL_BUSINFO_LEN);
1966         strncpy(info->version, DRIVER_VERSION, ETHTOOL_BUSINFO_LEN);
1967         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
1968 }
1969
1970 static
1971 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1972 {
1973         struct r8152 *tp = netdev_priv(netdev);
1974
1975         if (!tp->mii.mdio_read)
1976                 return -EOPNOTSUPP;
1977
1978         return mii_ethtool_gset(&tp->mii, cmd);
1979 }
1980
1981 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1982 {
1983         struct r8152 *tp = netdev_priv(dev);
1984
1985         return rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
1986 }
1987
1988 static struct ethtool_ops ops = {
1989         .get_drvinfo = rtl8152_get_drvinfo,
1990         .get_settings = rtl8152_get_settings,
1991         .set_settings = rtl8152_set_settings,
1992         .get_link = ethtool_op_get_link,
1993 };
1994
1995 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1996 {
1997         struct r8152 *tp = netdev_priv(netdev);
1998         struct mii_ioctl_data *data = if_mii(rq);
1999         int res = 0;
2000
2001         switch (cmd) {
2002         case SIOCGMIIPHY:
2003                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
2004                 break;
2005
2006         case SIOCGMIIREG:
2007                 data->val_out = r8152_mdio_read(tp, data->reg_num);
2008                 break;
2009
2010         case SIOCSMIIREG:
2011                 if (!capable(CAP_NET_ADMIN)) {
2012                         res = -EPERM;
2013                         break;
2014                 }
2015                 r8152_mdio_write(tp, data->reg_num, data->val_in);
2016                 break;
2017
2018         default:
2019                 res = -EOPNOTSUPP;
2020         }
2021
2022         return res;
2023 }
2024
2025 static const struct net_device_ops rtl8152_netdev_ops = {
2026         .ndo_open               = rtl8152_open,
2027         .ndo_stop               = rtl8152_close,
2028         .ndo_do_ioctl           = rtl8152_ioctl,
2029         .ndo_start_xmit         = rtl8152_start_xmit,
2030         .ndo_tx_timeout         = rtl8152_tx_timeout,
2031         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
2032         .ndo_set_mac_address    = rtl8152_set_mac_address,
2033
2034         .ndo_change_mtu         = eth_change_mtu,
2035         .ndo_validate_addr      = eth_validate_addr,
2036 };
2037
2038 static void r8152b_get_version(struct r8152 *tp)
2039 {
2040         u32     ocp_data;
2041         u16     version;
2042
2043         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
2044         version = (u16)(ocp_data & VERSION_MASK);
2045
2046         switch (version) {
2047         case 0x4c00:
2048                 tp->version = RTL_VER_01;
2049                 break;
2050         case 0x4c10:
2051                 tp->version = RTL_VER_02;
2052                 break;
2053         default:
2054                 netif_info(tp, probe, tp->netdev,
2055                            "Unknown version 0x%04x\n", version);
2056                 break;
2057         }
2058 }
2059
2060 static int rtl8152_probe(struct usb_interface *intf,
2061                          const struct usb_device_id *id)
2062 {
2063         struct usb_device *udev = interface_to_usbdev(intf);
2064         struct r8152 *tp;
2065         struct net_device *netdev;
2066         int ret;
2067
2068         if (udev->actconfig->desc.bConfigurationValue != 1) {
2069                 usb_driver_set_configuration(udev, 1);
2070                 return -ENODEV;
2071         }
2072
2073         netdev = alloc_etherdev(sizeof(struct r8152));
2074         if (!netdev) {
2075                 dev_err(&intf->dev, "Out of memory");
2076                 return -ENOMEM;
2077         }
2078
2079         SET_NETDEV_DEV(netdev, &intf->dev);
2080         tp = netdev_priv(netdev);
2081         tp->msg_enable = 0x7FFF;
2082
2083         tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
2084         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
2085
2086         tp->udev = udev;
2087         tp->netdev = netdev;
2088         tp->intf = intf;
2089         netdev->netdev_ops = &rtl8152_netdev_ops;
2090         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
2091
2092         netdev->features |= NETIF_F_IP_CSUM;
2093         netdev->hw_features = NETIF_F_IP_CSUM;
2094         SET_ETHTOOL_OPS(netdev, &ops);
2095
2096         tp->mii.dev = netdev;
2097         tp->mii.mdio_read = read_mii_word;
2098         tp->mii.mdio_write = write_mii_word;
2099         tp->mii.phy_id_mask = 0x3f;
2100         tp->mii.reg_num_mask = 0x1f;
2101         tp->mii.phy_id = R8152_PHY_ID;
2102         tp->mii.supports_gmii = 0;
2103
2104         r8152b_get_version(tp);
2105         r8152b_init(tp);
2106         set_ethernet_addr(tp);
2107
2108         ret = alloc_all_mem(tp);
2109         if (ret)
2110                 goto out;
2111
2112         usb_set_intfdata(intf, tp);
2113
2114         ret = register_netdev(netdev);
2115         if (ret != 0) {
2116                 netif_err(tp, probe, netdev, "couldn't register the device");
2117                 goto out1;
2118         }
2119
2120         netif_info(tp, probe, netdev, "%s", DRIVER_VERSION);
2121
2122         return 0;
2123
2124 out1:
2125         usb_set_intfdata(intf, NULL);
2126 out:
2127         free_netdev(netdev);
2128         return ret;
2129 }
2130
2131 static void rtl8152_unload(struct r8152 *tp)
2132 {
2133         u32     ocp_data;
2134
2135         if (tp->version != RTL_VER_01) {
2136                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2137                 ocp_data |= POWER_CUT;
2138                 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2139         }
2140
2141         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2142         ocp_data &= ~RWSUME_INDICATE;
2143         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2144 }
2145
2146 static void rtl8152_disconnect(struct usb_interface *intf)
2147 {
2148         struct r8152 *tp = usb_get_intfdata(intf);
2149
2150         usb_set_intfdata(intf, NULL);
2151         if (tp) {
2152                 set_bit(RTL8152_UNPLUG, &tp->flags);
2153                 tasklet_kill(&tp->tl);
2154                 unregister_netdev(tp->netdev);
2155                 rtl8152_unload(tp);
2156                 free_all_mem(tp);
2157                 free_netdev(tp->netdev);
2158         }
2159 }
2160
2161 /* table of devices that work with this driver */
2162 static struct usb_device_id rtl8152_table[] = {
2163         {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)},
2164         {}
2165 };
2166
2167 MODULE_DEVICE_TABLE(usb, rtl8152_table);
2168
2169 static struct usb_driver rtl8152_driver = {
2170         .name =         MODULENAME,
2171         .id_table =     rtl8152_table,
2172         .probe =        rtl8152_probe,
2173         .disconnect =   rtl8152_disconnect,
2174         .suspend =      rtl8152_suspend,
2175         .resume =       rtl8152_resume,
2176         .reset_resume = rtl8152_resume,
2177 };
2178
2179 module_usb_driver(rtl8152_driver);
2180
2181 MODULE_AUTHOR(DRIVER_AUTHOR);
2182 MODULE_DESCRIPTION(DRIVER_DESC);
2183 MODULE_LICENSE("GPL");