2 * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
4 * This is a new flat driver which is based on the original emac_lite
5 * driver from John Williams <john.williams@xilinx.com>.
7 * 2007 - 2013 (c) Xilinx, Inc.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/module.h>
16 #include <linux/uaccess.h>
17 #include <linux/init.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/skbuff.h>
22 #include <linux/slab.h>
23 #include <linux/of_address.h>
24 #include <linux/of_device.h>
25 #include <linux/of_platform.h>
26 #include <linux/of_mdio.h>
27 #include <linux/of_net.h>
28 #include <linux/phy.h>
29 #include <linux/interrupt.h>
31 #define DRIVER_NAME "xilinx_emaclite"
33 /* Register offsets for the EmacLite Core */
34 #define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */
35 #define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */
36 #define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */
37 #define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */
38 #define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */
39 #define XEL_GIER_OFFSET 0x07F8 /* GIE Register */
40 #define XEL_TSR_OFFSET 0x07FC /* Tx status */
41 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
43 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
44 #define XEL_RPLR_OFFSET 0x100C /* Rx packet length */
45 #define XEL_RSR_OFFSET 0x17FC /* Rx status */
47 #define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */
49 /* MDIO Address Register Bit Masks */
50 #define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */
51 #define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */
52 #define XEL_MDIOADDR_PHYADR_SHIFT 5
53 #define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */
55 /* MDIO Write Data Register Bit Masks */
56 #define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */
58 /* MDIO Read Data Register Bit Masks */
59 #define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */
61 /* MDIO Control Register Bit Masks */
62 #define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */
63 #define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */
65 /* Global Interrupt Enable Register (GIER) Bit Masks */
66 #define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */
68 /* Transmit Status Register (TSR) Bit Masks */
69 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */
70 #define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */
71 #define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */
72 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit
73 * only. This is not documented
76 /* Define for programming the MAC address into the EmacLite */
77 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
79 /* Receive Status Register (RSR) */
80 #define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */
81 #define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */
83 /* Transmit Packet Length Register (TPLR) */
84 #define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */
86 /* Receive Packet Length Register (RPLR) */
87 #define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */
89 #define XEL_HEADER_OFFSET 12 /* Offset to length field */
90 #define XEL_HEADER_SHIFT 16 /* Shift value for length */
92 /* General Ethernet Definitions */
93 #define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */
94 #define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */
98 #define TX_TIMEOUT (60*HZ) /* Tx timeout is 60 seconds. */
101 /* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */
102 #define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
105 * struct net_local - Our private per device data
106 * @ndev: instance of the network device
107 * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW
108 * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW
109 * @next_tx_buf_to_use: next Tx buffer to write to
110 * @next_rx_buf_to_use: next Rx buffer to read from
111 * @base_addr: base address of the Emaclite device
112 * @reset_lock: lock used for synchronization
113 * @deferred_skb: holds an skb (for transmission at a later time) when the
114 * Tx buffer is not free
115 * @phy_dev: pointer to the PHY device
116 * @phy_node: pointer to the PHY device node
117 * @mii_bus: pointer to the MII bus
118 * @mdio_irqs: IRQs table for MDIO bus
119 * @last_link: last link status
120 * @has_mdio: indicates whether MDIO is included in the HW
124 struct net_device *ndev;
128 u32 next_tx_buf_to_use;
129 u32 next_rx_buf_to_use;
130 void __iomem *base_addr;
132 spinlock_t reset_lock;
133 struct sk_buff *deferred_skb;
135 struct phy_device *phy_dev;
136 struct device_node *phy_node;
138 struct mii_bus *mii_bus;
139 int mdio_irqs[PHY_MAX_ADDR];
146 /*************************/
147 /* EmacLite driver calls */
148 /*************************/
151 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
152 * @drvdata: Pointer to the Emaclite device private data
154 * This function enables the Tx and Rx interrupts for the Emaclite device along
155 * with the Global Interrupt Enable.
157 static void xemaclite_enable_interrupts(struct net_local *drvdata)
161 /* Enable the Tx interrupts for the first Buffer */
162 reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
163 __raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
164 drvdata->base_addr + XEL_TSR_OFFSET);
166 /* Enable the Rx interrupts for the first buffer */
167 __raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);
169 /* Enable the Global Interrupt Enable */
170 __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
174 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
175 * @drvdata: Pointer to the Emaclite device private data
177 * This function disables the Tx and Rx interrupts for the Emaclite device,
178 * along with the Global Interrupt Enable.
180 static void xemaclite_disable_interrupts(struct net_local *drvdata)
184 /* Disable the Global Interrupt Enable */
185 __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
187 /* Disable the Tx interrupts for the first buffer */
188 reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
189 __raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
190 drvdata->base_addr + XEL_TSR_OFFSET);
192 /* Disable the Rx interrupts for the first buffer */
193 reg_data = __raw_readl(drvdata->base_addr + XEL_RSR_OFFSET);
194 __raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
195 drvdata->base_addr + XEL_RSR_OFFSET);
199 * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
200 * @src_ptr: Void pointer to the 16-bit aligned source address
201 * @dest_ptr: Pointer to the 32-bit aligned destination address
202 * @length: Number bytes to write from source to destination
204 * This function writes data from a 16-bit aligned buffer to a 32-bit aligned
205 * address in the EmacLite device.
207 static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
212 u16 *from_u16_ptr, *to_u16_ptr;
214 to_u32_ptr = dest_ptr;
215 from_u16_ptr = src_ptr;
218 for (; length > 3; length -= 4) {
219 to_u16_ptr = (u16 *)&align_buffer;
220 *to_u16_ptr++ = *from_u16_ptr++;
221 *to_u16_ptr++ = *from_u16_ptr++;
223 /* This barrier resolves occasional issues seen around
224 * cases where the data is not properly flushed out
225 * from the processor store buffers to the destination
231 *to_u32_ptr++ = align_buffer;
234 u8 *from_u8_ptr, *to_u8_ptr;
236 /* Set up to output the remaining data */
238 to_u8_ptr = (u8 *) &align_buffer;
239 from_u8_ptr = (u8 *) from_u16_ptr;
241 /* Output the remaining data */
242 for (; length > 0; length--)
243 *to_u8_ptr++ = *from_u8_ptr++;
245 /* This barrier resolves occasional issues seen around
246 * cases where the data is not properly flushed out
247 * from the processor store buffers to the destination
251 *to_u32_ptr = align_buffer;
256 * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer
257 * @src_ptr: Pointer to the 32-bit aligned source address
258 * @dest_ptr: Pointer to the 16-bit aligned destination address
259 * @length: Number bytes to read from source to destination
261 * This function reads data from a 32-bit aligned address in the EmacLite device
262 * to a 16-bit aligned buffer.
264 static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,
267 u16 *to_u16_ptr, *from_u16_ptr;
271 from_u32_ptr = src_ptr;
272 to_u16_ptr = (u16 *) dest_ptr;
274 for (; length > 3; length -= 4) {
275 /* Copy each word into the temporary buffer */
276 align_buffer = *from_u32_ptr++;
277 from_u16_ptr = (u16 *)&align_buffer;
279 /* Read data from source */
280 *to_u16_ptr++ = *from_u16_ptr++;
281 *to_u16_ptr++ = *from_u16_ptr++;
285 u8 *to_u8_ptr, *from_u8_ptr;
287 /* Set up to read the remaining data */
288 to_u8_ptr = (u8 *) to_u16_ptr;
289 align_buffer = *from_u32_ptr++;
290 from_u8_ptr = (u8 *) &align_buffer;
292 /* Read the remaining data */
293 for (; length > 0; length--)
294 *to_u8_ptr = *from_u8_ptr;
299 * xemaclite_send_data - Send an Ethernet frame
300 * @drvdata: Pointer to the Emaclite device private data
301 * @data: Pointer to the data to be sent
302 * @byte_count: Total frame size, including header
304 * This function checks if the Tx buffer of the Emaclite device is free to send
305 * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
308 * Return: 0 upon success or -1 if the buffer(s) are full.
310 * Note: The maximum Tx packet size can not be more than Ethernet header
311 * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
313 static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
314 unsigned int byte_count)
319 /* Determine the expected Tx buffer address */
320 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
322 /* If the length is too large, truncate it */
323 if (byte_count > ETH_FRAME_LEN)
324 byte_count = ETH_FRAME_LEN;
326 /* Check if the expected buffer is available */
327 reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
328 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
329 XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
331 /* Switch to next buffer if configured */
332 if (drvdata->tx_ping_pong != 0)
333 drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET;
334 } else if (drvdata->tx_ping_pong != 0) {
335 /* If the expected buffer is full, try the other buffer,
336 * if it is configured in HW */
338 addr = (void __iomem __force *)((u32 __force)addr ^
340 reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
342 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
343 XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
344 return -1; /* Buffers were full, return failure */
346 return -1; /* Buffer was full, return failure */
348 /* Write the frame to the buffer */
349 xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
351 __raw_writel((byte_count & XEL_TPLR_LENGTH_MASK),
352 addr + XEL_TPLR_OFFSET);
354 /* Update the Tx Status Register to indicate that there is a
355 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
356 * is used by the interrupt handler to check whether a frame
357 * has been transmitted */
358 reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
359 reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
360 __raw_writel(reg_data, addr + XEL_TSR_OFFSET);
366 * xemaclite_recv_data - Receive a frame
367 * @drvdata: Pointer to the Emaclite device private data
368 * @data: Address where the data is to be received
370 * This function is intended to be called from the interrupt context or
371 * with a wrapper which waits for the receive frame to be available.
373 * Return: Total number of bytes received
375 static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
378 u16 length, proto_type;
381 /* Determine the expected buffer address */
382 addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
384 /* Verify which buffer has valid data */
385 reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
387 if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
388 if (drvdata->rx_ping_pong != 0)
389 drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET;
391 /* The instance is out of sync, try other buffer if other
392 * buffer is configured, return 0 otherwise. If the instance is
393 * out of sync, do not update the 'next_rx_buf_to_use' since it
394 * will correct on subsequent calls */
395 if (drvdata->rx_ping_pong != 0)
396 addr = (void __iomem __force *)((u32 __force)addr ^
399 return 0; /* No data was available */
401 /* Verify that buffer has valid data */
402 reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
403 if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
404 XEL_RSR_RECV_DONE_MASK)
405 return 0; /* No data was available */
408 /* Get the protocol type of the ethernet frame that arrived */
409 proto_type = ((ntohl(__raw_readl(addr + XEL_HEADER_OFFSET +
410 XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
411 XEL_RPLR_LENGTH_MASK);
413 /* Check if received ethernet frame is a raw ethernet frame
414 * or an IP packet or an ARP packet */
415 if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
417 if (proto_type == ETH_P_IP) {
418 length = ((ntohl(__raw_readl(addr +
419 XEL_HEADER_IP_LENGTH_OFFSET +
420 XEL_RXBUFF_OFFSET)) >>
422 XEL_RPLR_LENGTH_MASK);
423 length += ETH_HLEN + ETH_FCS_LEN;
425 } else if (proto_type == ETH_P_ARP)
426 length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN;
428 /* Field contains type other than IP or ARP, use max
429 * frame size and let user parse it */
430 length = ETH_FRAME_LEN + ETH_FCS_LEN;
432 /* Use the length in the frame, plus the header and trailer */
433 length = proto_type + ETH_HLEN + ETH_FCS_LEN;
435 /* Read from the EmacLite device */
436 xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET),
439 /* Acknowledge the frame */
440 reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
441 reg_data &= ~XEL_RSR_RECV_DONE_MASK;
442 __raw_writel(reg_data, addr + XEL_RSR_OFFSET);
448 * xemaclite_update_address - Update the MAC address in the device
449 * @drvdata: Pointer to the Emaclite device private data
450 * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value)
452 * Tx must be idle and Rx should be idle for deterministic results.
453 * It is recommended that this function should be called after the
454 * initialization and before transmission of any packets from the device.
455 * The MAC address can be programmed using any of the two transmit
456 * buffers (if configured).
458 static void xemaclite_update_address(struct net_local *drvdata,
464 /* Determine the expected Tx buffer address */
465 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
467 xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
469 __raw_writel(ETH_ALEN, addr + XEL_TPLR_OFFSET);
471 /* Update the MAC address in the EmacLite */
472 reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
473 __raw_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET);
475 /* Wait for EmacLite to finish with the MAC address update */
476 while ((__raw_readl(addr + XEL_TSR_OFFSET) &
477 XEL_TSR_PROG_MAC_ADDR) != 0)
482 * xemaclite_set_mac_address - Set the MAC address for this device
483 * @dev: Pointer to the network device instance
484 * @addr: Void pointer to the sockaddr structure
486 * This function copies the HW address from the sockaddr strucutre to the
487 * net_device structure and updates the address in HW.
489 * Return: Error if the net device is busy or 0 if the addr is set
492 static int xemaclite_set_mac_address(struct net_device *dev, void *address)
494 struct net_local *lp = netdev_priv(dev);
495 struct sockaddr *addr = address;
497 if (netif_running(dev))
500 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
501 xemaclite_update_address(lp, dev->dev_addr);
506 * xemaclite_tx_timeout - Callback for Tx Timeout
507 * @dev: Pointer to the network device
509 * This function is called when Tx time out occurs for Emaclite device.
511 static void xemaclite_tx_timeout(struct net_device *dev)
513 struct net_local *lp = netdev_priv(dev);
516 dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n",
517 TX_TIMEOUT * 1000UL / HZ);
519 dev->stats.tx_errors++;
521 /* Reset the device */
522 spin_lock_irqsave(&lp->reset_lock, flags);
524 /* Shouldn't really be necessary, but shouldn't hurt */
525 netif_stop_queue(dev);
527 xemaclite_disable_interrupts(lp);
528 xemaclite_enable_interrupts(lp);
530 if (lp->deferred_skb) {
531 dev_kfree_skb(lp->deferred_skb);
532 lp->deferred_skb = NULL;
533 dev->stats.tx_errors++;
536 /* To exclude tx timeout */
537 dev->trans_start = jiffies; /* prevent tx timeout */
539 /* We're all ready to go. Start the queue */
540 netif_wake_queue(dev);
541 spin_unlock_irqrestore(&lp->reset_lock, flags);
544 /**********************/
545 /* Interrupt Handlers */
546 /**********************/
549 * xemaclite_tx_handler - Interrupt handler for frames sent
550 * @dev: Pointer to the network device
552 * This function updates the number of packets transmitted and handles the
553 * deferred skb, if there is one.
555 static void xemaclite_tx_handler(struct net_device *dev)
557 struct net_local *lp = netdev_priv(dev);
559 dev->stats.tx_packets++;
560 if (lp->deferred_skb) {
561 if (xemaclite_send_data(lp,
562 (u8 *) lp->deferred_skb->data,
563 lp->deferred_skb->len) != 0)
566 dev->stats.tx_bytes += lp->deferred_skb->len;
567 dev_kfree_skb_irq(lp->deferred_skb);
568 lp->deferred_skb = NULL;
569 dev->trans_start = jiffies; /* prevent tx timeout */
570 netif_wake_queue(dev);
576 * xemaclite_rx_handler- Interrupt handler for frames received
577 * @dev: Pointer to the network device
579 * This function allocates memory for a socket buffer, fills it with data
580 * received and hands it over to the TCP/IP stack.
582 static void xemaclite_rx_handler(struct net_device *dev)
584 struct net_local *lp = netdev_priv(dev);
589 len = ETH_FRAME_LEN + ETH_FCS_LEN;
590 skb = netdev_alloc_skb(dev, len + ALIGNMENT);
592 /* Couldn't get memory. */
593 dev->stats.rx_dropped++;
594 dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n");
599 * A new skb should have the data halfword aligned, but this code is
600 * here just in case that isn't true. Calculate how many
601 * bytes we should reserve to get the data to start on a word
603 align = BUFFER_ALIGN(skb->data);
605 skb_reserve(skb, align);
609 len = xemaclite_recv_data(lp, (u8 *) skb->data);
612 dev->stats.rx_errors++;
613 dev_kfree_skb_irq(skb);
617 skb_put(skb, len); /* Tell the skb how much data we got */
619 skb->protocol = eth_type_trans(skb, dev);
620 skb_checksum_none_assert(skb);
622 dev->stats.rx_packets++;
623 dev->stats.rx_bytes += len;
625 if (!skb_defer_rx_timestamp(skb))
626 netif_rx(skb); /* Send the packet upstream */
630 * xemaclite_interrupt - Interrupt handler for this driver
631 * @irq: Irq of the Emaclite device
632 * @dev_id: Void pointer to the network device instance used as callback
635 * This function handles the Tx and Rx interrupts of the EmacLite device.
637 static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
639 bool tx_complete = false;
640 struct net_device *dev = dev_id;
641 struct net_local *lp = netdev_priv(dev);
642 void __iomem *base_addr = lp->base_addr;
645 /* Check if there is Rx Data available */
646 if ((__raw_readl(base_addr + XEL_RSR_OFFSET) &
647 XEL_RSR_RECV_DONE_MASK) ||
648 (__raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
649 & XEL_RSR_RECV_DONE_MASK))
651 xemaclite_rx_handler(dev);
653 /* Check if the Transmission for the first buffer is completed */
654 tx_status = __raw_readl(base_addr + XEL_TSR_OFFSET);
655 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
656 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
658 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
659 __raw_writel(tx_status, base_addr + XEL_TSR_OFFSET);
664 /* Check if the Transmission for the second buffer is completed */
665 tx_status = __raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
666 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
667 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
669 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
670 __raw_writel(tx_status, base_addr + XEL_BUFFER_OFFSET +
676 /* If there was a Tx interrupt, call the Tx Handler */
677 if (tx_complete != 0)
678 xemaclite_tx_handler(dev);
683 /**********************/
684 /* MDIO Bus functions */
685 /**********************/
688 * xemaclite_mdio_wait - Wait for the MDIO to be ready to use
689 * @lp: Pointer to the Emaclite device private data
691 * This function waits till the device is ready to accept a new MDIO
694 * Return: 0 for success or ETIMEDOUT for a timeout
697 static int xemaclite_mdio_wait(struct net_local *lp)
699 long end = jiffies + 2;
701 /* wait for the MDIO interface to not be busy or timeout
704 while (__raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
705 XEL_MDIOCTRL_MDIOSTS_MASK) {
706 if (end - jiffies <= 0) {
716 * xemaclite_mdio_read - Read from a given MII management register
717 * @bus: the mii_bus struct
718 * @phy_id: the phy address
719 * @reg: register number to read from
721 * This function waits till the device is ready to accept a new MDIO
722 * request and then writes the phy address to the MDIO Address register
723 * and reads data from MDIO Read Data register, when its available.
725 * Return: Value read from the MII management register
727 static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
729 struct net_local *lp = bus->priv;
733 if (xemaclite_mdio_wait(lp))
736 /* Write the PHY address, register number and set the OP bit in the
737 * MDIO Address register. Set the Status bit in the MDIO Control
738 * register to start a MDIO read transaction.
740 ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
741 __raw_writel(XEL_MDIOADDR_OP_MASK |
742 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
743 lp->base_addr + XEL_MDIOADDR_OFFSET);
744 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
745 lp->base_addr + XEL_MDIOCTRL_OFFSET);
747 if (xemaclite_mdio_wait(lp))
750 rc = __raw_readl(lp->base_addr + XEL_MDIORD_OFFSET);
752 dev_dbg(&lp->ndev->dev,
753 "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
760 * xemaclite_mdio_write - Write to a given MII management register
761 * @bus: the mii_bus struct
762 * @phy_id: the phy address
763 * @reg: register number to write to
764 * @val: value to write to the register number specified by reg
766 * This function waits till the device is ready to accept a new MDIO
767 * request and then writes the val to the MDIO Write Data register.
769 static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
772 struct net_local *lp = bus->priv;
775 dev_dbg(&lp->ndev->dev,
776 "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n",
779 if (xemaclite_mdio_wait(lp))
782 /* Write the PHY address, register number and clear the OP bit in the
783 * MDIO Address register and then write the value into the MDIO Write
784 * Data register. Finally, set the Status bit in the MDIO Control
785 * register to start a MDIO write transaction.
787 ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
788 __raw_writel(~XEL_MDIOADDR_OP_MASK &
789 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
790 lp->base_addr + XEL_MDIOADDR_OFFSET);
791 __raw_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET);
792 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
793 lp->base_addr + XEL_MDIOCTRL_OFFSET);
799 * xemaclite_mdio_reset - Reset the mdio bus.
800 * @bus: Pointer to the MII bus
802 * This function is required(?) as per Documentation/networking/phy.txt.
803 * There is no reset in this device; this function always returns 0.
805 static int xemaclite_mdio_reset(struct mii_bus *bus)
811 * xemaclite_mdio_setup - Register mii_bus for the Emaclite device
812 * @lp: Pointer to the Emaclite device private data
813 * @ofdev: Pointer to OF device structure
815 * This function enables MDIO bus in the Emaclite device and registers a
818 * Return: 0 upon success or a negative error upon failure
820 static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
825 struct device_node *np = of_get_parent(lp->phy_node);
826 struct device_node *npp;
828 /* Don't register the MDIO bus if the phy_node or its parent node
832 dev_err(dev, "Failed to register mdio bus.\n");
835 npp = of_get_parent(np);
837 of_address_to_resource(npp, 0, &res);
838 if (lp->ndev->mem_start != res.start) {
839 struct phy_device *phydev;
840 phydev = of_phy_find_device(lp->phy_node);
843 "MDIO of the phy is not registered yet\n");
847 /* Enable the MDIO bus by asserting the enable bit in MDIO Control
850 __raw_writel(XEL_MDIOCTRL_MDIOEN_MASK,
851 lp->base_addr + XEL_MDIOCTRL_OFFSET);
853 bus = mdiobus_alloc();
855 dev_err(dev, "Failed to allocate mdiobus\n");
859 snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
860 (unsigned long long)res.start);
862 bus->name = "Xilinx Emaclite MDIO";
863 bus->read = xemaclite_mdio_read;
864 bus->write = xemaclite_mdio_write;
865 bus->reset = xemaclite_mdio_reset;
867 bus->irq = lp->mdio_irqs; /* preallocated IRQ table */
871 rc = of_mdiobus_register(bus, np);
873 dev_err(dev, "Failed to register mdio bus.\n");
885 * xemaclite_adjust_link - Link state callback for the Emaclite device
886 * @ndev: pointer to net_device struct
888 * There's nothing in the Emaclite device to be configured when the link
889 * state changes. We just print the status.
891 static void xemaclite_adjust_link(struct net_device *ndev)
893 struct net_local *lp = netdev_priv(ndev);
894 struct phy_device *phy = lp->phy_dev;
897 /* hash together the state values to decide if something has changed */
898 link_state = phy->speed | (phy->duplex << 1) | phy->link;
900 if (lp->last_link != link_state) {
901 lp->last_link = link_state;
902 phy_print_status(phy);
907 * xemaclite_open - Open the network device
908 * @dev: Pointer to the network device
910 * This function sets the MAC address, requests an IRQ and enables interrupts
911 * for the Emaclite device and starts the Tx queue.
912 * It also connects to the phy device, if MDIO is included in Emaclite device.
914 static int xemaclite_open(struct net_device *dev)
916 struct net_local *lp = netdev_priv(dev);
919 /* Just to be safe, stop the device first */
920 xemaclite_disable_interrupts(lp);
925 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
926 xemaclite_adjust_link, 0,
927 PHY_INTERFACE_MODE_MII);
929 dev_err(&lp->ndev->dev, "of_phy_connect() failed\n");
933 /* EmacLite doesn't support giga-bit speeds */
934 lp->phy_dev->supported &= (PHY_BASIC_FEATURES);
935 lp->phy_dev->advertising = lp->phy_dev->supported;
937 /* Don't advertise 1000BASE-T Full/Half duplex speeds */
938 phy_write(lp->phy_dev, MII_CTRL1000, 0);
940 /* Advertise only 10 and 100mbps full/half duplex speeds */
941 phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL |
944 /* Restart auto negotiation */
945 bmcr = phy_read(lp->phy_dev, MII_BMCR);
946 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
947 phy_write(lp->phy_dev, MII_BMCR, bmcr);
949 phy_start(lp->phy_dev);
952 /* Set the MAC address each time opened */
953 xemaclite_update_address(lp, dev->dev_addr);
956 retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev);
958 dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n",
961 phy_disconnect(lp->phy_dev);
967 /* Enable Interrupts */
968 xemaclite_enable_interrupts(lp);
970 /* We're ready to go */
971 netif_start_queue(dev);
977 * xemaclite_close - Close the network device
978 * @dev: Pointer to the network device
980 * This function stops the Tx queue, disables interrupts and frees the IRQ for
981 * the Emaclite device.
982 * It also disconnects the phy device associated with the Emaclite device.
984 static int xemaclite_close(struct net_device *dev)
986 struct net_local *lp = netdev_priv(dev);
988 netif_stop_queue(dev);
989 xemaclite_disable_interrupts(lp);
990 free_irq(dev->irq, dev);
993 phy_disconnect(lp->phy_dev);
1000 * xemaclite_send - Transmit a frame
1001 * @orig_skb: Pointer to the socket buffer to be transmitted
1002 * @dev: Pointer to the network device
1004 * This function checks if the Tx buffer of the Emaclite device is free to send
1005 * data. If so, it fills the Tx buffer with data from socket buffer data,
1006 * updates the stats and frees the socket buffer. The Tx completion is signaled
1007 * by an interrupt. If the Tx buffer isn't free, then the socket buffer is
1008 * deferred and the Tx queue is stopped so that the deferred socket buffer can
1009 * be transmitted when the Emaclite device is free to transmit data.
1011 * Return: 0, always.
1013 static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
1015 struct net_local *lp = netdev_priv(dev);
1016 struct sk_buff *new_skb;
1018 unsigned long flags;
1020 len = orig_skb->len;
1024 spin_lock_irqsave(&lp->reset_lock, flags);
1025 if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) {
1026 /* If the Emaclite Tx buffer is busy, stop the Tx queue and
1027 * defer the skb for transmission during the ISR, after the
1028 * current transmission is complete */
1029 netif_stop_queue(dev);
1030 lp->deferred_skb = new_skb;
1031 /* Take the time stamp now, since we can't do this in an ISR. */
1032 skb_tx_timestamp(new_skb);
1033 spin_unlock_irqrestore(&lp->reset_lock, flags);
1036 spin_unlock_irqrestore(&lp->reset_lock, flags);
1038 skb_tx_timestamp(new_skb);
1040 dev->stats.tx_bytes += len;
1041 dev_kfree_skb(new_skb);
1047 * xemaclite_remove_ndev - Free the network device
1048 * @ndev: Pointer to the network device to be freed
1050 * This function un maps the IO region of the Emaclite device and frees the net
1053 static void xemaclite_remove_ndev(struct net_device *ndev)
1061 * get_bool - Get a parameter from the OF device
1062 * @ofdev: Pointer to OF device structure
1063 * @s: Property to be retrieved
1065 * This function looks for a property in the device node and returns the value
1066 * of the property if its found or 0 if the property is not found.
1068 * Return: Value of the parameter if the parameter is found, or 0 otherwise
1070 static bool get_bool(struct platform_device *ofdev, const char *s)
1072 u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL);
1077 dev_warn(&ofdev->dev, "Parameter %s not found,"
1078 "defaulting to false\n", s);
1083 static struct net_device_ops xemaclite_netdev_ops;
1086 * xemaclite_of_probe - Probe method for the Emaclite device.
1087 * @ofdev: Pointer to OF device structure
1088 * @match: Pointer to the structure used for matching a device
1090 * This function probes for the Emaclite device in the device tree.
1091 * It initializes the driver data structure and the hardware, sets the MAC
1092 * address and registers the network device.
1093 * It also registers a mii_bus for the Emaclite device, if MDIO is included
1096 * Return: 0, if the driver is bound to the Emaclite device, or
1097 * a negative error if there is failure.
1099 static int xemaclite_of_probe(struct platform_device *ofdev)
1101 struct resource *res;
1102 struct net_device *ndev = NULL;
1103 struct net_local *lp = NULL;
1104 struct device *dev = &ofdev->dev;
1105 const void *mac_address;
1109 dev_info(dev, "Device Tree Probing\n");
1111 /* Create an ethernet device instance */
1112 ndev = alloc_etherdev(sizeof(struct net_local));
1116 dev_set_drvdata(dev, ndev);
1117 SET_NETDEV_DEV(ndev, &ofdev->dev);
1119 lp = netdev_priv(ndev);
1122 /* Get IRQ for the device */
1123 res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0);
1125 dev_err(dev, "no IRQ found\n");
1129 ndev->irq = res->start;
1131 res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
1132 lp->base_addr = devm_ioremap_resource(&ofdev->dev, res);
1133 if (IS_ERR(lp->base_addr)) {
1134 rc = PTR_ERR(lp->base_addr);
1138 ndev->mem_start = res->start;
1139 ndev->mem_end = res->end;
1141 spin_lock_init(&lp->reset_lock);
1142 lp->next_tx_buf_to_use = 0x0;
1143 lp->next_rx_buf_to_use = 0x0;
1144 lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong");
1145 lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong");
1146 mac_address = of_get_mac_address(ofdev->dev.of_node);
1149 /* Set the MAC address. */
1150 memcpy(ndev->dev_addr, mac_address, ETH_ALEN);
1152 dev_warn(dev, "No MAC address found\n");
1154 /* Clear the Tx CSR's in case this is a restart */
1155 __raw_writel(0, lp->base_addr + XEL_TSR_OFFSET);
1156 __raw_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
1158 /* Set the MAC address in the EmacLite device */
1159 xemaclite_update_address(lp, ndev->dev_addr);
1161 lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0);
1162 rc = xemaclite_mdio_setup(lp, &ofdev->dev);
1164 dev_warn(&ofdev->dev, "error registering MDIO bus\n");
1166 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
1168 ndev->netdev_ops = &xemaclite_netdev_ops;
1169 ndev->flags &= ~IFF_MULTICAST;
1170 ndev->watchdog_timeo = TX_TIMEOUT;
1172 /* Finally, register the device */
1173 rc = register_netdev(ndev);
1176 "Cannot register network device, aborting\n");
1181 "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n",
1182 (unsigned int __force)ndev->mem_start,
1183 (unsigned int __force)lp->base_addr, ndev->irq);
1187 xemaclite_remove_ndev(ndev);
1192 * xemaclite_of_remove - Unbind the driver from the Emaclite device.
1193 * @of_dev: Pointer to OF device structure
1195 * This function is called if a device is physically removed from the system or
1196 * if the driver module is being unloaded. It frees any resources allocated to
1199 * Return: 0, always.
1201 static int xemaclite_of_remove(struct platform_device *of_dev)
1203 struct net_device *ndev = platform_get_drvdata(of_dev);
1205 struct net_local *lp = netdev_priv(ndev);
1207 /* Un-register the mii_bus, if configured */
1209 mdiobus_unregister(lp->mii_bus);
1210 kfree(lp->mii_bus->irq);
1211 mdiobus_free(lp->mii_bus);
1215 unregister_netdev(ndev);
1218 of_node_put(lp->phy_node);
1219 lp->phy_node = NULL;
1221 xemaclite_remove_ndev(ndev);
1226 #ifdef CONFIG_NET_POLL_CONTROLLER
1228 xemaclite_poll_controller(struct net_device *ndev)
1230 disable_irq(ndev->irq);
1231 xemaclite_interrupt(ndev->irq, ndev);
1232 enable_irq(ndev->irq);
1236 static struct net_device_ops xemaclite_netdev_ops = {
1237 .ndo_open = xemaclite_open,
1238 .ndo_stop = xemaclite_close,
1239 .ndo_start_xmit = xemaclite_send,
1240 .ndo_set_mac_address = xemaclite_set_mac_address,
1241 .ndo_tx_timeout = xemaclite_tx_timeout,
1242 #ifdef CONFIG_NET_POLL_CONTROLLER
1243 .ndo_poll_controller = xemaclite_poll_controller,
1247 /* Match table for OF platform binding */
1248 static struct of_device_id xemaclite_of_match[] = {
1249 { .compatible = "xlnx,opb-ethernetlite-1.01.a", },
1250 { .compatible = "xlnx,opb-ethernetlite-1.01.b", },
1251 { .compatible = "xlnx,xps-ethernetlite-1.00.a", },
1252 { .compatible = "xlnx,xps-ethernetlite-2.00.a", },
1253 { .compatible = "xlnx,xps-ethernetlite-2.01.a", },
1254 { .compatible = "xlnx,xps-ethernetlite-3.00.a", },
1255 { /* end of list */ },
1257 MODULE_DEVICE_TABLE(of, xemaclite_of_match);
1259 static struct platform_driver xemaclite_of_driver = {
1261 .name = DRIVER_NAME,
1262 .owner = THIS_MODULE,
1263 .of_match_table = xemaclite_of_match,
1265 .probe = xemaclite_of_probe,
1266 .remove = xemaclite_of_remove,
1269 module_platform_driver(xemaclite_of_driver);
1271 MODULE_AUTHOR("Xilinx, Inc.");
1272 MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver");
1273 MODULE_LICENSE("GPL");