1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 ******************************************************************************/
28 #include "i40e_type.h"
29 #include "i40e_adminq.h"
30 #include "i40e_prototype.h"
31 #include "i40e_virtchnl.h"
34 * i40e_set_mac_type - Sets MAC type
35 * @hw: pointer to the HW structure
37 * This function sets the mac type of the adapter based on the
38 * vendor ID and device ID stored in the hw structure.
40 static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
42 i40e_status status = 0;
44 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
45 switch (hw->device_id) {
46 case I40E_SFP_XL710_DEVICE_ID:
47 case I40E_SFP_X710_DEVICE_ID:
48 case I40E_QEMU_DEVICE_ID:
49 case I40E_KX_A_DEVICE_ID:
50 case I40E_KX_B_DEVICE_ID:
51 case I40E_KX_C_DEVICE_ID:
52 case I40E_KX_D_DEVICE_ID:
53 case I40E_QSFP_A_DEVICE_ID:
54 case I40E_QSFP_B_DEVICE_ID:
55 case I40E_QSFP_C_DEVICE_ID:
56 hw->mac.type = I40E_MAC_XL710;
58 case I40E_VF_DEVICE_ID:
59 case I40E_VF_HV_DEVICE_ID:
60 hw->mac.type = I40E_MAC_VF;
63 hw->mac.type = I40E_MAC_GENERIC;
67 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
70 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
71 hw->mac.type, status);
77 * @hw: debug mask related to admin queue
78 * @cap: pointer to adminq command descriptor
79 * @buffer: pointer to command buffer
81 * Dumps debug log about adminq command with descriptor contents.
83 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
86 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
87 u8 *aq_buffer = (u8 *)buffer;
91 if ((!(mask & hw->debug_mask)) || (desc == NULL))
95 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
96 aq_desc->opcode, aq_desc->flags, aq_desc->datalen,
98 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
99 aq_desc->cookie_high, aq_desc->cookie_low);
100 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
101 aq_desc->params.internal.param0,
102 aq_desc->params.internal.param1);
103 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
104 aq_desc->params.external.addr_high,
105 aq_desc->params.external.addr_low);
107 if ((buffer != NULL) && (aq_desc->datalen != 0)) {
108 memset(data, 0, sizeof(data));
109 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
110 for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) {
111 data[((i % 16) / 4)] |=
112 ((u32)aq_buffer[i]) << (8 * (i % 4));
113 if ((i % 16) == 15) {
115 "\t0x%04X %08X %08X %08X %08X\n",
116 i - 15, data[0], data[1], data[2],
118 memset(data, 0, sizeof(data));
122 i40e_debug(hw, mask, "\t0x%04X %08X %08X %08X %08X\n",
123 i - (i % 16), data[0], data[1], data[2],
129 * i40e_init_shared_code - Initialize the shared code
130 * @hw: pointer to hardware structure
132 * This assigns the MAC type and PHY code and inits the NVM.
133 * Does not touch the hardware. This function must be called prior to any
134 * other function in the shared code. The i40e_hw structure should be
135 * memset to 0 prior to calling this function. The following fields in
136 * hw structure should be filled in prior to calling this function:
137 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
138 * subsystem_vendor_id, and revision_id
140 i40e_status i40e_init_shared_code(struct i40e_hw *hw)
142 i40e_status status = 0;
145 hw->phy.get_link_info = true;
147 /* Determine port number */
148 reg = rd32(hw, I40E_PFGEN_PORTNUM);
149 reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >>
150 I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT);
153 i40e_set_mac_type(hw);
155 switch (hw->mac.type) {
159 return I40E_ERR_DEVICE_NOT_SUPPORTED;
163 status = i40e_init_nvm(hw);
168 * i40e_aq_mac_address_read - Retrieve the MAC addresses
169 * @hw: pointer to the hw struct
170 * @flags: a return indicator of what addresses were added to the addr store
171 * @addrs: the requestor's mac addr store
172 * @cmd_details: pointer to command details structure or NULL
174 static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
176 struct i40e_aqc_mac_address_read_data *addrs,
177 struct i40e_asq_cmd_details *cmd_details)
179 struct i40e_aq_desc desc;
180 struct i40e_aqc_mac_address_read *cmd_data =
181 (struct i40e_aqc_mac_address_read *)&desc.params.raw;
184 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
185 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);
187 status = i40e_asq_send_command(hw, &desc, addrs,
188 sizeof(*addrs), cmd_details);
189 *flags = le16_to_cpu(cmd_data->command_flags);
195 * i40e_aq_mac_address_write - Change the MAC addresses
196 * @hw: pointer to the hw struct
197 * @flags: indicates which MAC to be written
198 * @mac_addr: address to write
199 * @cmd_details: pointer to command details structure or NULL
201 i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
202 u16 flags, u8 *mac_addr,
203 struct i40e_asq_cmd_details *cmd_details)
205 struct i40e_aq_desc desc;
206 struct i40e_aqc_mac_address_write *cmd_data =
207 (struct i40e_aqc_mac_address_write *)&desc.params.raw;
210 i40e_fill_default_direct_cmd_desc(&desc,
211 i40e_aqc_opc_mac_address_write);
212 cmd_data->command_flags = cpu_to_le16(flags);
213 memcpy(&cmd_data->mac_sal, &mac_addr[0], 4);
214 memcpy(&cmd_data->mac_sah, &mac_addr[4], 2);
216 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
222 * i40e_get_mac_addr - get MAC address
223 * @hw: pointer to the HW structure
224 * @mac_addr: pointer to MAC address
226 * Reads the adapter's MAC address from register
228 i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
230 struct i40e_aqc_mac_address_read_data addrs;
234 status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
236 if (flags & I40E_AQC_LAN_ADDR_VALID)
237 memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
243 * i40e_validate_mac_addr - Validate MAC address
244 * @mac_addr: pointer to MAC address
246 * Tests a MAC address to ensure it is a valid Individual Address
248 i40e_status i40e_validate_mac_addr(u8 *mac_addr)
250 i40e_status status = 0;
252 /* Make sure it is not a multicast address */
253 if (I40E_IS_MULTICAST(mac_addr)) {
254 hw_dbg(hw, "MAC address is multicast\n");
255 status = I40E_ERR_INVALID_MAC_ADDR;
256 /* Not a broadcast address */
257 } else if (I40E_IS_BROADCAST(mac_addr)) {
258 hw_dbg(hw, "MAC address is broadcast\n");
259 status = I40E_ERR_INVALID_MAC_ADDR;
260 /* Reject the zero address */
261 } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&
262 mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {
263 hw_dbg(hw, "MAC address is all zeros\n");
264 status = I40E_ERR_INVALID_MAC_ADDR;
270 * i40e_get_media_type - Gets media type
271 * @hw: pointer to the hardware structure
273 static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
275 enum i40e_media_type media;
277 switch (hw->phy.link_info.phy_type) {
278 case I40E_PHY_TYPE_10GBASE_SR:
279 case I40E_PHY_TYPE_10GBASE_LR:
280 case I40E_PHY_TYPE_40GBASE_SR4:
281 case I40E_PHY_TYPE_40GBASE_LR4:
282 media = I40E_MEDIA_TYPE_FIBER;
284 case I40E_PHY_TYPE_100BASE_TX:
285 case I40E_PHY_TYPE_1000BASE_T:
286 case I40E_PHY_TYPE_10GBASE_T:
287 media = I40E_MEDIA_TYPE_BASET;
289 case I40E_PHY_TYPE_10GBASE_CR1_CU:
290 case I40E_PHY_TYPE_40GBASE_CR4_CU:
291 case I40E_PHY_TYPE_10GBASE_CR1:
292 case I40E_PHY_TYPE_40GBASE_CR4:
293 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
294 media = I40E_MEDIA_TYPE_DA;
296 case I40E_PHY_TYPE_1000BASE_KX:
297 case I40E_PHY_TYPE_10GBASE_KX4:
298 case I40E_PHY_TYPE_10GBASE_KR:
299 case I40E_PHY_TYPE_40GBASE_KR4:
300 media = I40E_MEDIA_TYPE_BACKPLANE;
302 case I40E_PHY_TYPE_SGMII:
303 case I40E_PHY_TYPE_XAUI:
304 case I40E_PHY_TYPE_XFI:
305 case I40E_PHY_TYPE_XLAUI:
306 case I40E_PHY_TYPE_XLPPI:
308 media = I40E_MEDIA_TYPE_UNKNOWN;
316 * i40e_pf_reset - Reset the PF
317 * @hw: pointer to the hardware structure
319 * Assuming someone else has triggered a global reset,
320 * assure the global reset is complete and then reset the PF
322 i40e_status i40e_pf_reset(struct i40e_hw *hw)
328 /* Poll for Global Reset steady state in case of recent GRST.
329 * The grst delay value is in 100ms units, and we'll wait a
330 * couple counts longer to be sure we don't just miss the end.
332 grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
333 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
334 for (wait_cnt = 0; wait_cnt < grst_del + 2; wait_cnt++) {
335 reg = rd32(hw, I40E_GLGEN_RSTAT);
336 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
340 if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
341 hw_dbg(hw, "Global reset polling failed to complete.\n");
342 return I40E_ERR_RESET_FAILED;
345 /* Determine the PF number based on the PCI fn */
346 reg = rd32(hw, I40E_GLPCI_CAPSUP);
347 if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK)
348 hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func);
350 hw->pf_id = (u8)hw->bus.func;
352 /* If there was a Global Reset in progress when we got here,
353 * we don't need to do the PF Reset
356 reg = rd32(hw, I40E_PFGEN_CTRL);
357 wr32(hw, I40E_PFGEN_CTRL,
358 (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
359 for (wait_cnt = 0; wait_cnt < 10; wait_cnt++) {
360 reg = rd32(hw, I40E_PFGEN_CTRL);
361 if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
363 usleep_range(1000, 2000);
365 if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
366 hw_dbg(hw, "PF reset polling failed to complete.\n");
367 return I40E_ERR_RESET_FAILED;
371 i40e_clear_pxe_mode(hw);
376 * i40e_clear_pxe_mode - clear pxe operations mode
377 * @hw: pointer to the hw struct
379 * Make sure all PXE mode settings are cleared, including things
380 * like descriptor fetch/write-back mode.
382 void i40e_clear_pxe_mode(struct i40e_hw *hw)
386 /* Clear single descriptor fetch/write-back mode */
387 reg = rd32(hw, I40E_GLLAN_RCTL_0);
388 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
392 * i40e_led_get - return current on/off mode
393 * @hw: pointer to the hw struct
395 * The value returned is the 'mode' field as defined in the
396 * GPIO register definitions: 0x0 = off, 0xf = on, and other
397 * values are variations of possible behaviors relating to
398 * blink, link, and wire.
400 u32 i40e_led_get(struct i40e_hw *hw)
407 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
408 if (!hw->func_caps.led[i])
411 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
412 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
413 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
415 if (port != hw->port)
418 mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
419 >> I40E_GLGEN_GPIO_CTL_INT_MODE_SHIFT;
427 * i40e_led_set - set new on/off mode
428 * @hw: pointer to the hw struct
429 * @mode: 0=off, else on (see EAS for mode details)
431 void i40e_led_set(struct i40e_hw *hw, u32 mode)
438 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
439 if (!hw->func_caps.led[i])
442 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
443 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
444 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
446 if (port != hw->port)
449 led_mode = (mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
450 I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
451 gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
452 gpio_val |= led_mode;
453 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
457 /* Admin command wrappers */
459 * i40e_aq_queue_shutdown
460 * @hw: pointer to the hw struct
461 * @unloading: is the driver unloading itself
463 * Tell the Firmware that we're shutting down the AdminQ and whether
464 * or not the driver is unloading as well.
466 i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
469 struct i40e_aq_desc desc;
470 struct i40e_aqc_queue_shutdown *cmd =
471 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
474 i40e_fill_default_direct_cmd_desc(&desc,
475 i40e_aqc_opc_queue_shutdown);
478 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
479 status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
485 * i40e_aq_set_link_restart_an
486 * @hw: pointer to the hw struct
487 * @cmd_details: pointer to command details structure or NULL
489 * Sets up the link and restarts the Auto-Negotiation over the link.
491 i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
492 struct i40e_asq_cmd_details *cmd_details)
494 struct i40e_aq_desc desc;
495 struct i40e_aqc_set_link_restart_an *cmd =
496 (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
499 i40e_fill_default_direct_cmd_desc(&desc,
500 i40e_aqc_opc_set_link_restart_an);
502 cmd->command = I40E_AQ_PHY_RESTART_AN;
504 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
510 * i40e_aq_get_link_info
511 * @hw: pointer to the hw struct
512 * @enable_lse: enable/disable LinkStatusEvent reporting
513 * @link: pointer to link status structure - optional
514 * @cmd_details: pointer to command details structure or NULL
516 * Returns the link status of the adapter.
518 i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
519 bool enable_lse, struct i40e_link_status *link,
520 struct i40e_asq_cmd_details *cmd_details)
522 struct i40e_aq_desc desc;
523 struct i40e_aqc_get_link_status *resp =
524 (struct i40e_aqc_get_link_status *)&desc.params.raw;
525 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
529 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
532 command_flags = I40E_AQ_LSE_ENABLE;
534 command_flags = I40E_AQ_LSE_DISABLE;
535 resp->command_flags = cpu_to_le16(command_flags);
537 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
540 goto aq_get_link_info_exit;
542 /* save off old link status information */
543 memcpy(&hw->phy.link_info_old, hw_link_info,
544 sizeof(struct i40e_link_status));
546 /* update link status */
547 hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
548 hw->phy.media_type = i40e_get_media_type(hw);
549 hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
550 hw_link_info->link_info = resp->link_info;
551 hw_link_info->an_info = resp->an_info;
552 hw_link_info->ext_info = resp->ext_info;
554 if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
555 hw_link_info->lse_enable = true;
557 hw_link_info->lse_enable = false;
559 /* save link status information */
561 *link = *hw_link_info;
563 /* flag cleared so helper functions don't call AQ again */
564 hw->phy.get_link_info = false;
566 aq_get_link_info_exit:
572 * @hw: pointer to the hw struct
573 * @vsi: pointer to a vsi context struct
574 * @cmd_details: pointer to command details structure or NULL
576 * Add a VSI context to the hardware.
578 i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
579 struct i40e_vsi_context *vsi_ctx,
580 struct i40e_asq_cmd_details *cmd_details)
582 struct i40e_aq_desc desc;
583 struct i40e_aqc_add_get_update_vsi *cmd =
584 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
585 struct i40e_aqc_add_get_update_vsi_completion *resp =
586 (struct i40e_aqc_add_get_update_vsi_completion *)
590 i40e_fill_default_direct_cmd_desc(&desc,
591 i40e_aqc_opc_add_vsi);
593 cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
594 cmd->connection_type = vsi_ctx->connection_type;
595 cmd->vf_id = vsi_ctx->vf_num;
596 cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
598 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
599 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
600 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
602 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
603 sizeof(vsi_ctx->info), cmd_details);
606 goto aq_add_vsi_exit;
608 vsi_ctx->seid = le16_to_cpu(resp->seid);
609 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
610 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
611 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
618 * i40e_aq_set_vsi_unicast_promiscuous
619 * @hw: pointer to the hw struct
621 * @set: set unicast promiscuous enable/disable
622 * @cmd_details: pointer to command details structure or NULL
624 i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
625 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
627 struct i40e_aq_desc desc;
628 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
629 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
633 i40e_fill_default_direct_cmd_desc(&desc,
634 i40e_aqc_opc_set_vsi_promiscuous_modes);
637 flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
639 cmd->promiscuous_flags = cpu_to_le16(flags);
641 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
643 cmd->seid = cpu_to_le16(seid);
644 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
650 * i40e_aq_set_vsi_multicast_promiscuous
651 * @hw: pointer to the hw struct
653 * @set: set multicast promiscuous enable/disable
654 * @cmd_details: pointer to command details structure or NULL
656 i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
657 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
659 struct i40e_aq_desc desc;
660 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
661 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
665 i40e_fill_default_direct_cmd_desc(&desc,
666 i40e_aqc_opc_set_vsi_promiscuous_modes);
669 flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
671 cmd->promiscuous_flags = cpu_to_le16(flags);
673 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
675 cmd->seid = cpu_to_le16(seid);
676 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
682 * i40e_aq_set_vsi_broadcast
683 * @hw: pointer to the hw struct
685 * @set_filter: true to set filter, false to clear filter
686 * @cmd_details: pointer to command details structure or NULL
688 * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
690 i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
691 u16 seid, bool set_filter,
692 struct i40e_asq_cmd_details *cmd_details)
694 struct i40e_aq_desc desc;
695 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
696 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
699 i40e_fill_default_direct_cmd_desc(&desc,
700 i40e_aqc_opc_set_vsi_promiscuous_modes);
703 cmd->promiscuous_flags
704 |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
706 cmd->promiscuous_flags
707 &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);
709 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
710 cmd->seid = cpu_to_le16(seid);
711 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
717 * i40e_get_vsi_params - get VSI configuration info
718 * @hw: pointer to the hw struct
719 * @vsi: pointer to a vsi context struct
720 * @cmd_details: pointer to command details structure or NULL
722 i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
723 struct i40e_vsi_context *vsi_ctx,
724 struct i40e_asq_cmd_details *cmd_details)
726 struct i40e_aq_desc desc;
727 struct i40e_aqc_switch_seid *cmd =
728 (struct i40e_aqc_switch_seid *)&desc.params.raw;
729 struct i40e_aqc_add_get_update_vsi_completion *resp =
730 (struct i40e_aqc_add_get_update_vsi_completion *)
734 i40e_fill_default_direct_cmd_desc(&desc,
735 i40e_aqc_opc_get_vsi_parameters);
737 cmd->seid = cpu_to_le16(vsi_ctx->seid);
739 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
740 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
741 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
743 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
744 sizeof(vsi_ctx->info), NULL);
747 goto aq_get_vsi_params_exit;
749 vsi_ctx->seid = le16_to_cpu(resp->seid);
750 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
751 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
752 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
754 aq_get_vsi_params_exit:
759 * i40e_aq_update_vsi_params
760 * @hw: pointer to the hw struct
761 * @vsi: pointer to a vsi context struct
762 * @cmd_details: pointer to command details structure or NULL
764 * Update a VSI context.
766 i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
767 struct i40e_vsi_context *vsi_ctx,
768 struct i40e_asq_cmd_details *cmd_details)
770 struct i40e_aq_desc desc;
771 struct i40e_aqc_switch_seid *cmd =
772 (struct i40e_aqc_switch_seid *)&desc.params.raw;
775 i40e_fill_default_direct_cmd_desc(&desc,
776 i40e_aqc_opc_update_vsi_parameters);
777 cmd->seid = cpu_to_le16(vsi_ctx->seid);
779 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
780 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
781 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
783 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
784 sizeof(vsi_ctx->info), cmd_details);
790 * i40e_aq_get_switch_config
791 * @hw: pointer to the hardware structure
792 * @buf: pointer to the result buffer
793 * @buf_size: length of input buffer
794 * @start_seid: seid to start for the report, 0 == beginning
795 * @cmd_details: pointer to command details structure or NULL
797 * Fill the buf with switch configuration returned from AdminQ command
799 i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
800 struct i40e_aqc_get_switch_config_resp *buf,
801 u16 buf_size, u16 *start_seid,
802 struct i40e_asq_cmd_details *cmd_details)
804 struct i40e_aq_desc desc;
805 struct i40e_aqc_switch_seid *scfg =
806 (struct i40e_aqc_switch_seid *)&desc.params.raw;
809 i40e_fill_default_direct_cmd_desc(&desc,
810 i40e_aqc_opc_get_switch_config);
811 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
812 if (buf_size > I40E_AQ_LARGE_BUF)
813 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
814 scfg->seid = cpu_to_le16(*start_seid);
816 status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
817 *start_seid = le16_to_cpu(scfg->seid);
823 * i40e_aq_get_firmware_version
824 * @hw: pointer to the hw struct
825 * @fw_major_version: firmware major version
826 * @fw_minor_version: firmware minor version
827 * @api_major_version: major queue version
828 * @api_minor_version: minor queue version
829 * @cmd_details: pointer to command details structure or NULL
831 * Get the firmware version from the admin queue commands
833 i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
834 u16 *fw_major_version, u16 *fw_minor_version,
835 u16 *api_major_version, u16 *api_minor_version,
836 struct i40e_asq_cmd_details *cmd_details)
838 struct i40e_aq_desc desc;
839 struct i40e_aqc_get_version *resp =
840 (struct i40e_aqc_get_version *)&desc.params.raw;
843 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);
845 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
848 if (fw_major_version != NULL)
849 *fw_major_version = le16_to_cpu(resp->fw_major);
850 if (fw_minor_version != NULL)
851 *fw_minor_version = le16_to_cpu(resp->fw_minor);
852 if (api_major_version != NULL)
853 *api_major_version = le16_to_cpu(resp->api_major);
854 if (api_minor_version != NULL)
855 *api_minor_version = le16_to_cpu(resp->api_minor);
862 * i40e_aq_send_driver_version
863 * @hw: pointer to the hw struct
864 * @event: driver event: driver ok, start or stop
865 * @dv: driver's major, minor version
866 * @cmd_details: pointer to command details structure or NULL
868 * Send the driver version to the firmware
870 i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
871 struct i40e_driver_version *dv,
872 struct i40e_asq_cmd_details *cmd_details)
874 struct i40e_aq_desc desc;
875 struct i40e_aqc_driver_version *cmd =
876 (struct i40e_aqc_driver_version *)&desc.params.raw;
880 return I40E_ERR_PARAM;
882 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
884 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI);
885 cmd->driver_major_ver = dv->major_version;
886 cmd->driver_minor_ver = dv->minor_version;
887 cmd->driver_build_ver = dv->build_version;
888 cmd->driver_subbuild_ver = dv->subbuild_version;
889 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
895 * i40e_get_link_status - get status of the HW network link
896 * @hw: pointer to the hw struct
898 * Returns true if link is up, false if link is down.
900 * Side effect: LinkStatusEvent reporting becomes enabled
902 bool i40e_get_link_status(struct i40e_hw *hw)
904 i40e_status status = 0;
905 bool link_status = false;
907 if (hw->phy.get_link_info) {
908 status = i40e_aq_get_link_info(hw, true, NULL, NULL);
911 goto i40e_get_link_status_exit;
914 link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
916 i40e_get_link_status_exit:
921 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
922 * @hw: pointer to the hw struct
923 * @uplink_seid: the MAC or other gizmo SEID
924 * @downlink_seid: the VSI SEID
925 * @enabled_tc: bitmap of TCs to be enabled
926 * @default_port: true for default port VSI, false for control port
927 * @veb_seid: pointer to where to put the resulting VEB SEID
928 * @cmd_details: pointer to command details structure or NULL
930 * This asks the FW to add a VEB between the uplink and downlink
931 * elements. If the uplink SEID is 0, this will be a floating VEB.
933 i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
934 u16 downlink_seid, u8 enabled_tc,
935 bool default_port, u16 *veb_seid,
936 struct i40e_asq_cmd_details *cmd_details)
938 struct i40e_aq_desc desc;
939 struct i40e_aqc_add_veb *cmd =
940 (struct i40e_aqc_add_veb *)&desc.params.raw;
941 struct i40e_aqc_add_veb_completion *resp =
942 (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
946 /* SEIDs need to either both be set or both be 0 for floating VEB */
947 if (!!uplink_seid != !!downlink_seid)
948 return I40E_ERR_PARAM;
950 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
952 cmd->uplink_seid = cpu_to_le16(uplink_seid);
953 cmd->downlink_seid = cpu_to_le16(downlink_seid);
954 cmd->enable_tcs = enabled_tc;
956 veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
958 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
960 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;
961 cmd->veb_flags = cpu_to_le16(veb_flags);
963 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
965 if (!status && veb_seid)
966 *veb_seid = le16_to_cpu(resp->veb_seid);
972 * i40e_aq_get_veb_parameters - Retrieve VEB parameters
973 * @hw: pointer to the hw struct
974 * @veb_seid: the SEID of the VEB to query
975 * @switch_id: the uplink switch id
976 * @floating_veb: set to true if the VEB is floating
977 * @statistic_index: index of the stats counter block for this VEB
978 * @vebs_used: number of VEB's used by function
979 * @vebs_unallocated: total VEB's not reserved by any function
980 * @cmd_details: pointer to command details structure or NULL
982 * This retrieves the parameters for a particular VEB, specified by
983 * uplink_seid, and returns them to the caller.
985 i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
986 u16 veb_seid, u16 *switch_id,
987 bool *floating, u16 *statistic_index,
988 u16 *vebs_used, u16 *vebs_free,
989 struct i40e_asq_cmd_details *cmd_details)
991 struct i40e_aq_desc desc;
992 struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
993 (struct i40e_aqc_get_veb_parameters_completion *)
998 return I40E_ERR_PARAM;
1000 i40e_fill_default_direct_cmd_desc(&desc,
1001 i40e_aqc_opc_get_veb_parameters);
1002 cmd_resp->seid = cpu_to_le16(veb_seid);
1004 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1009 *switch_id = le16_to_cpu(cmd_resp->switch_id);
1010 if (statistic_index)
1011 *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
1013 *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
1015 *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
1017 u16 flags = le16_to_cpu(cmd_resp->veb_flags);
1018 if (flags & I40E_AQC_ADD_VEB_FLOATING)
1029 * i40e_aq_add_macvlan
1030 * @hw: pointer to the hw struct
1031 * @seid: VSI for the mac address
1032 * @mv_list: list of macvlans to be added
1033 * @count: length of the list
1034 * @cmd_details: pointer to command details structure or NULL
1036 * Add MAC/VLAN addresses to the HW filtering
1038 i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
1039 struct i40e_aqc_add_macvlan_element_data *mv_list,
1040 u16 count, struct i40e_asq_cmd_details *cmd_details)
1042 struct i40e_aq_desc desc;
1043 struct i40e_aqc_macvlan *cmd =
1044 (struct i40e_aqc_macvlan *)&desc.params.raw;
1048 if (count == 0 || !mv_list || !hw)
1049 return I40E_ERR_PARAM;
1051 buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data);
1053 /* prep the rest of the request */
1054 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
1055 cmd->num_addresses = cpu_to_le16(count);
1056 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1060 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1061 if (buf_size > I40E_AQ_LARGE_BUF)
1062 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1064 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1071 * i40e_aq_remove_macvlan
1072 * @hw: pointer to the hw struct
1073 * @seid: VSI for the mac address
1074 * @mv_list: list of macvlans to be removed
1075 * @count: length of the list
1076 * @cmd_details: pointer to command details structure or NULL
1078 * Remove MAC/VLAN addresses from the HW filtering
1080 i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
1081 struct i40e_aqc_remove_macvlan_element_data *mv_list,
1082 u16 count, struct i40e_asq_cmd_details *cmd_details)
1084 struct i40e_aq_desc desc;
1085 struct i40e_aqc_macvlan *cmd =
1086 (struct i40e_aqc_macvlan *)&desc.params.raw;
1090 if (count == 0 || !mv_list || !hw)
1091 return I40E_ERR_PARAM;
1093 buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data);
1095 /* prep the rest of the request */
1096 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
1097 cmd->num_addresses = cpu_to_le16(count);
1098 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1102 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1103 if (buf_size > I40E_AQ_LARGE_BUF)
1104 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1106 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1113 * i40e_aq_add_vlan - Add VLAN ids to the HW filtering
1114 * @hw: pointer to the hw struct
1115 * @seid: VSI for the vlan filters
1116 * @v_list: list of vlan filters to be added
1117 * @count: length of the list
1118 * @cmd_details: pointer to command details structure or NULL
1120 i40e_status i40e_aq_add_vlan(struct i40e_hw *hw, u16 seid,
1121 struct i40e_aqc_add_remove_vlan_element_data *v_list,
1122 u8 count, struct i40e_asq_cmd_details *cmd_details)
1124 struct i40e_aq_desc desc;
1125 struct i40e_aqc_macvlan *cmd =
1126 (struct i40e_aqc_macvlan *)&desc.params.raw;
1130 if (count == 0 || !v_list || !hw)
1131 return I40E_ERR_PARAM;
1133 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data);
1135 /* prep the rest of the request */
1136 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_vlan);
1137 cmd->num_addresses = cpu_to_le16(count);
1138 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID);
1142 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1143 if (buf_size > I40E_AQ_LARGE_BUF)
1144 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1146 status = i40e_asq_send_command(hw, &desc, v_list, buf_size,
1153 * i40e_aq_remove_vlan - Remove VLANs from the HW filtering
1154 * @hw: pointer to the hw struct
1155 * @seid: VSI for the vlan filters
1156 * @v_list: list of macvlans to be removed
1157 * @count: length of the list
1158 * @cmd_details: pointer to command details structure or NULL
1160 i40e_status i40e_aq_remove_vlan(struct i40e_hw *hw, u16 seid,
1161 struct i40e_aqc_add_remove_vlan_element_data *v_list,
1162 u8 count, struct i40e_asq_cmd_details *cmd_details)
1164 struct i40e_aq_desc desc;
1165 struct i40e_aqc_macvlan *cmd =
1166 (struct i40e_aqc_macvlan *)&desc.params.raw;
1170 if (count == 0 || !v_list || !hw)
1171 return I40E_ERR_PARAM;
1173 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data);
1175 /* prep the rest of the request */
1176 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_vlan);
1177 cmd->num_addresses = cpu_to_le16(count);
1178 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID);
1182 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1183 if (buf_size > I40E_AQ_LARGE_BUF)
1184 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1186 status = i40e_asq_send_command(hw, &desc, v_list, buf_size,
1193 * i40e_aq_send_msg_to_vf
1194 * @hw: pointer to the hardware structure
1195 * @vfid: vf id to send msg
1196 * @msg: pointer to the msg buffer
1197 * @msglen: msg length
1198 * @cmd_details: pointer to command details
1202 i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
1203 u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
1204 struct i40e_asq_cmd_details *cmd_details)
1206 struct i40e_aq_desc desc;
1207 struct i40e_aqc_pf_vf_message *cmd =
1208 (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
1211 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
1212 cmd->id = cpu_to_le32(vfid);
1213 desc.cookie_high = cpu_to_le32(v_opcode);
1214 desc.cookie_low = cpu_to_le32(v_retval);
1215 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1217 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
1219 if (msglen > I40E_AQ_LARGE_BUF)
1220 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1221 desc.datalen = cpu_to_le16(msglen);
1223 status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1229 * i40e_aq_set_hmc_resource_profile
1230 * @hw: pointer to the hw struct
1231 * @profile: type of profile the HMC is to be set as
1232 * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1233 * @cmd_details: pointer to command details structure or NULL
1235 * set the HMC profile of the device.
1237 i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
1238 enum i40e_aq_hmc_profile profile,
1239 u8 pe_vf_enabled_count,
1240 struct i40e_asq_cmd_details *cmd_details)
1242 struct i40e_aq_desc desc;
1243 struct i40e_aq_get_set_hmc_resource_profile *cmd =
1244 (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
1247 i40e_fill_default_direct_cmd_desc(&desc,
1248 i40e_aqc_opc_set_hmc_resource_profile);
1250 cmd->pm_profile = (u8)profile;
1251 cmd->pe_vf_enabled = pe_vf_enabled_count;
1253 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1259 * i40e_aq_request_resource
1260 * @hw: pointer to the hw struct
1261 * @resource: resource id
1262 * @access: access type
1263 * @sdp_number: resource number
1264 * @timeout: the maximum time in ms that the driver may hold the resource
1265 * @cmd_details: pointer to command details structure or NULL
1267 * requests common resource using the admin queue commands
1269 i40e_status i40e_aq_request_resource(struct i40e_hw *hw,
1270 enum i40e_aq_resources_ids resource,
1271 enum i40e_aq_resource_access_type access,
1272 u8 sdp_number, u64 *timeout,
1273 struct i40e_asq_cmd_details *cmd_details)
1275 struct i40e_aq_desc desc;
1276 struct i40e_aqc_request_resource *cmd_resp =
1277 (struct i40e_aqc_request_resource *)&desc.params.raw;
1280 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource);
1282 cmd_resp->resource_id = cpu_to_le16(resource);
1283 cmd_resp->access_type = cpu_to_le16(access);
1284 cmd_resp->resource_number = cpu_to_le32(sdp_number);
1286 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1287 /* The completion specifies the maximum time in ms that the driver
1288 * may hold the resource in the Timeout field.
1289 * If the resource is held by someone else, the command completes with
1290 * busy return value and the timeout field indicates the maximum time
1291 * the current owner of the resource has to free it.
1293 if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)
1294 *timeout = le32_to_cpu(cmd_resp->timeout);
1300 * i40e_aq_release_resource
1301 * @hw: pointer to the hw struct
1302 * @resource: resource id
1303 * @sdp_number: resource number
1304 * @cmd_details: pointer to command details structure or NULL
1306 * release common resource using the admin queue commands
1308 i40e_status i40e_aq_release_resource(struct i40e_hw *hw,
1309 enum i40e_aq_resources_ids resource,
1311 struct i40e_asq_cmd_details *cmd_details)
1313 struct i40e_aq_desc desc;
1314 struct i40e_aqc_request_resource *cmd =
1315 (struct i40e_aqc_request_resource *)&desc.params.raw;
1318 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource);
1320 cmd->resource_id = cpu_to_le16(resource);
1321 cmd->resource_number = cpu_to_le32(sdp_number);
1323 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1330 * @hw: pointer to the hw struct
1331 * @module_pointer: module pointer location in words from the NVM beginning
1332 * @offset: byte offset from the module beginning
1333 * @length: length of the section to be read (in bytes from the offset)
1334 * @data: command buffer (size [bytes] = length)
1335 * @last_command: tells if this is the last command in a series
1336 * @cmd_details: pointer to command details structure or NULL
1338 * Read the NVM using the admin queue commands
1340 i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
1341 u32 offset, u16 length, void *data,
1343 struct i40e_asq_cmd_details *cmd_details)
1345 struct i40e_aq_desc desc;
1346 struct i40e_aqc_nvm_update *cmd =
1347 (struct i40e_aqc_nvm_update *)&desc.params.raw;
1350 /* In offset the highest byte must be zeroed. */
1351 if (offset & 0xFF000000) {
1352 status = I40E_ERR_PARAM;
1353 goto i40e_aq_read_nvm_exit;
1356 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read);
1358 /* If this is the last command in a series, set the proper flag. */
1360 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
1361 cmd->module_pointer = module_pointer;
1362 cmd->offset = cpu_to_le32(offset);
1363 cmd->length = cpu_to_le16(length);
1365 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1366 if (length > I40E_AQ_LARGE_BUF)
1367 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1369 status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);
1371 i40e_aq_read_nvm_exit:
1375 #define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
1376 #define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
1377 #define I40E_DEV_FUNC_CAP_NPAR 0x03
1378 #define I40E_DEV_FUNC_CAP_OS2BMC 0x04
1379 #define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
1380 #define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
1381 #define I40E_DEV_FUNC_CAP_VF 0x13
1382 #define I40E_DEV_FUNC_CAP_VMDQ 0x14
1383 #define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
1384 #define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
1385 #define I40E_DEV_FUNC_CAP_VSI 0x17
1386 #define I40E_DEV_FUNC_CAP_DCB 0x18
1387 #define I40E_DEV_FUNC_CAP_FCOE 0x21
1388 #define I40E_DEV_FUNC_CAP_RSS 0x40
1389 #define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
1390 #define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
1391 #define I40E_DEV_FUNC_CAP_MSIX 0x43
1392 #define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
1393 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1394 #define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
1395 #define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1
1396 #define I40E_DEV_FUNC_CAP_CEM 0xF2
1397 #define I40E_DEV_FUNC_CAP_IWARP 0x51
1398 #define I40E_DEV_FUNC_CAP_LED 0x61
1399 #define I40E_DEV_FUNC_CAP_SDP 0x62
1400 #define I40E_DEV_FUNC_CAP_MDIO 0x63
1403 * i40e_parse_discover_capabilities
1404 * @hw: pointer to the hw struct
1405 * @buff: pointer to a buffer containing device/function capability records
1406 * @cap_count: number of capability records in the list
1407 * @list_type_opc: type of capabilities list to parse
1409 * Parse the device/function capabilities list.
1411 static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
1413 enum i40e_admin_queue_opc list_type_opc)
1415 struct i40e_aqc_list_capabilities_element_resp *cap;
1416 u32 number, logical_id, phys_id;
1417 struct i40e_hw_capabilities *p;
1422 cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
1424 if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
1425 p = (struct i40e_hw_capabilities *)&hw->dev_caps;
1426 else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
1427 p = (struct i40e_hw_capabilities *)&hw->func_caps;
1431 for (i = 0; i < cap_count; i++, cap++) {
1432 id = le16_to_cpu(cap->id);
1433 number = le32_to_cpu(cap->number);
1434 logical_id = le32_to_cpu(cap->logical_id);
1435 phys_id = le32_to_cpu(cap->phys_id);
1438 case I40E_DEV_FUNC_CAP_SWITCH_MODE:
1439 p->switch_mode = number;
1441 case I40E_DEV_FUNC_CAP_MGMT_MODE:
1442 p->management_mode = number;
1444 case I40E_DEV_FUNC_CAP_NPAR:
1445 p->npar_enable = number;
1447 case I40E_DEV_FUNC_CAP_OS2BMC:
1450 case I40E_DEV_FUNC_CAP_VALID_FUNC:
1451 p->valid_functions = number;
1453 case I40E_DEV_FUNC_CAP_SRIOV_1_1:
1455 p->sr_iov_1_1 = true;
1457 case I40E_DEV_FUNC_CAP_VF:
1458 p->num_vfs = number;
1459 p->vf_base_id = logical_id;
1461 case I40E_DEV_FUNC_CAP_VMDQ:
1465 case I40E_DEV_FUNC_CAP_802_1_QBG:
1467 p->evb_802_1_qbg = true;
1469 case I40E_DEV_FUNC_CAP_802_1_QBH:
1471 p->evb_802_1_qbh = true;
1473 case I40E_DEV_FUNC_CAP_VSI:
1474 p->num_vsis = number;
1476 case I40E_DEV_FUNC_CAP_DCB:
1479 p->enabled_tcmap = logical_id;
1483 case I40E_DEV_FUNC_CAP_FCOE:
1487 case I40E_DEV_FUNC_CAP_RSS:
1489 reg_val = rd32(hw, I40E_PFQF_CTL_0);
1490 if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
1491 p->rss_table_size = number;
1493 p->rss_table_size = 128;
1494 p->rss_table_entry_width = logical_id;
1496 case I40E_DEV_FUNC_CAP_RX_QUEUES:
1497 p->num_rx_qp = number;
1498 p->base_queue = phys_id;
1500 case I40E_DEV_FUNC_CAP_TX_QUEUES:
1501 p->num_tx_qp = number;
1502 p->base_queue = phys_id;
1504 case I40E_DEV_FUNC_CAP_MSIX:
1505 p->num_msix_vectors = number;
1507 case I40E_DEV_FUNC_CAP_MSIX_VF:
1508 p->num_msix_vectors_vf = number;
1510 case I40E_DEV_FUNC_CAP_MFP_MODE_1:
1512 p->mfp_mode_1 = true;
1514 case I40E_DEV_FUNC_CAP_CEM:
1518 case I40E_DEV_FUNC_CAP_IWARP:
1522 case I40E_DEV_FUNC_CAP_LED:
1523 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1524 p->led[phys_id] = true;
1526 case I40E_DEV_FUNC_CAP_SDP:
1527 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1528 p->sdp[phys_id] = true;
1530 case I40E_DEV_FUNC_CAP_MDIO:
1532 p->mdio_port_num = phys_id;
1533 p->mdio_port_mode = logical_id;
1536 case I40E_DEV_FUNC_CAP_IEEE_1588:
1538 p->ieee_1588 = true;
1540 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:
1542 p->fd_filters_guaranteed = number;
1543 p->fd_filters_best_effort = logical_id;
1550 /* additional HW specific goodies that might
1551 * someday be HW version specific
1553 p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
1557 * i40e_aq_discover_capabilities
1558 * @hw: pointer to the hw struct
1559 * @buff: a virtual buffer to hold the capabilities
1560 * @buff_size: Size of the virtual buffer
1561 * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1562 * @list_type_opc: capabilities type to discover - pass in the command opcode
1563 * @cmd_details: pointer to command details structure or NULL
1565 * Get the device capabilities descriptions from the firmware
1567 i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
1568 void *buff, u16 buff_size, u16 *data_size,
1569 enum i40e_admin_queue_opc list_type_opc,
1570 struct i40e_asq_cmd_details *cmd_details)
1572 struct i40e_aqc_list_capabilites *cmd;
1573 i40e_status status = 0;
1574 struct i40e_aq_desc desc;
1576 cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
1578 if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&
1579 list_type_opc != i40e_aqc_opc_list_dev_capabilities) {
1580 status = I40E_ERR_PARAM;
1584 i40e_fill_default_direct_cmd_desc(&desc, list_type_opc);
1586 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1587 if (buff_size > I40E_AQ_LARGE_BUF)
1588 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1590 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1591 *data_size = le16_to_cpu(desc.datalen);
1596 i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count),
1604 * i40e_aq_get_lldp_mib
1605 * @hw: pointer to the hw struct
1606 * @bridge_type: type of bridge requested
1607 * @mib_type: Local, Remote or both Local and Remote MIBs
1608 * @buff: pointer to a user supplied buffer to store the MIB block
1609 * @buff_size: size of the buffer (in bytes)
1610 * @local_len : length of the returned Local LLDP MIB
1611 * @remote_len: length of the returned Remote LLDP MIB
1612 * @cmd_details: pointer to command details structure or NULL
1614 * Requests the complete LLDP MIB (entire packet).
1616 i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
1617 u8 mib_type, void *buff, u16 buff_size,
1618 u16 *local_len, u16 *remote_len,
1619 struct i40e_asq_cmd_details *cmd_details)
1621 struct i40e_aq_desc desc;
1622 struct i40e_aqc_lldp_get_mib *cmd =
1623 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1624 struct i40e_aqc_lldp_get_mib *resp =
1625 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1628 if (buff_size == 0 || !buff)
1629 return I40E_ERR_PARAM;
1631 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);
1632 /* Indirect Command */
1633 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1635 cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK;
1636 cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) &
1637 I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
1639 desc.datalen = cpu_to_le16(buff_size);
1641 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1642 if (buff_size > I40E_AQ_LARGE_BUF)
1643 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1645 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1647 if (local_len != NULL)
1648 *local_len = le16_to_cpu(resp->local_len);
1649 if (remote_len != NULL)
1650 *remote_len = le16_to_cpu(resp->remote_len);
1657 * i40e_aq_cfg_lldp_mib_change_event
1658 * @hw: pointer to the hw struct
1659 * @enable_update: Enable or Disable event posting
1660 * @cmd_details: pointer to command details structure or NULL
1662 * Enable or Disable posting of an event on ARQ when LLDP MIB
1663 * associated with the interface changes
1665 i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
1667 struct i40e_asq_cmd_details *cmd_details)
1669 struct i40e_aq_desc desc;
1670 struct i40e_aqc_lldp_update_mib *cmd =
1671 (struct i40e_aqc_lldp_update_mib *)&desc.params.raw;
1674 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib);
1677 cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;
1679 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1686 * @hw: pointer to the hw struct
1687 * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1688 * @cmd_details: pointer to command details structure or NULL
1690 * Stop or Shutdown the embedded LLDP Agent
1692 i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
1693 struct i40e_asq_cmd_details *cmd_details)
1695 struct i40e_aq_desc desc;
1696 struct i40e_aqc_lldp_stop *cmd =
1697 (struct i40e_aqc_lldp_stop *)&desc.params.raw;
1700 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop);
1703 cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;
1705 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1711 * i40e_aq_start_lldp
1712 * @hw: pointer to the hw struct
1713 * @cmd_details: pointer to command details structure or NULL
1715 * Start the embedded LLDP Agent on all ports.
1717 i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
1718 struct i40e_asq_cmd_details *cmd_details)
1720 struct i40e_aq_desc desc;
1721 struct i40e_aqc_lldp_start *cmd =
1722 (struct i40e_aqc_lldp_start *)&desc.params.raw;
1725 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start);
1727 cmd->command = I40E_AQ_LLDP_AGENT_START;
1729 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1735 * i40e_aq_delete_element - Delete switch element
1736 * @hw: pointer to the hw struct
1737 * @seid: the SEID to delete from the switch
1738 * @cmd_details: pointer to command details structure or NULL
1740 * This deletes a switch element from the switch.
1742 i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
1743 struct i40e_asq_cmd_details *cmd_details)
1745 struct i40e_aq_desc desc;
1746 struct i40e_aqc_switch_seid *cmd =
1747 (struct i40e_aqc_switch_seid *)&desc.params.raw;
1751 return I40E_ERR_PARAM;
1753 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
1755 cmd->seid = cpu_to_le16(seid);
1757 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1763 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1764 * @hw: pointer to the hw struct
1765 * @seid: seid for the physical port/switching component/vsi
1766 * @buff: Indirect buffer to hold data parameters and response
1767 * @buff_size: Indirect buffer size
1768 * @opcode: Tx scheduler AQ command opcode
1769 * @cmd_details: pointer to command details structure or NULL
1771 * Generic command handler for Tx scheduler AQ commands
1773 static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
1774 void *buff, u16 buff_size,
1775 enum i40e_admin_queue_opc opcode,
1776 struct i40e_asq_cmd_details *cmd_details)
1778 struct i40e_aq_desc desc;
1779 struct i40e_aqc_tx_sched_ind *cmd =
1780 (struct i40e_aqc_tx_sched_ind *)&desc.params.raw;
1782 bool cmd_param_flag = false;
1785 case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit:
1786 case i40e_aqc_opc_configure_vsi_tc_bw:
1787 case i40e_aqc_opc_enable_switching_comp_ets:
1788 case i40e_aqc_opc_modify_switching_comp_ets:
1789 case i40e_aqc_opc_disable_switching_comp_ets:
1790 case i40e_aqc_opc_configure_switching_comp_ets_bw_limit:
1791 case i40e_aqc_opc_configure_switching_comp_bw_config:
1792 cmd_param_flag = true;
1794 case i40e_aqc_opc_query_vsi_bw_config:
1795 case i40e_aqc_opc_query_vsi_ets_sla_config:
1796 case i40e_aqc_opc_query_switching_comp_ets_config:
1797 case i40e_aqc_opc_query_port_ets_config:
1798 case i40e_aqc_opc_query_switching_comp_bw_config:
1799 cmd_param_flag = false;
1802 return I40E_ERR_PARAM;
1805 i40e_fill_default_direct_cmd_desc(&desc, opcode);
1807 /* Indirect command */
1808 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1810 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
1811 if (buff_size > I40E_AQ_LARGE_BUF)
1812 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1814 desc.datalen = cpu_to_le16(buff_size);
1816 cmd->vsi_seid = cpu_to_le16(seid);
1818 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1824 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1825 * @hw: pointer to the hw struct
1827 * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1828 * @cmd_details: pointer to command details structure or NULL
1830 i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,
1832 struct i40e_aqc_configure_vsi_tc_bw_data *bw_data,
1833 struct i40e_asq_cmd_details *cmd_details)
1835 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1836 i40e_aqc_opc_configure_vsi_tc_bw,
1841 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1842 * @hw: pointer to the hw struct
1843 * @seid: seid of the VSI
1844 * @bw_data: Buffer to hold VSI BW configuration
1845 * @cmd_details: pointer to command details structure or NULL
1847 i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,
1849 struct i40e_aqc_query_vsi_bw_config_resp *bw_data,
1850 struct i40e_asq_cmd_details *cmd_details)
1852 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1853 i40e_aqc_opc_query_vsi_bw_config,
1858 * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1859 * @hw: pointer to the hw struct
1860 * @seid: seid of the VSI
1861 * @bw_data: Buffer to hold VSI BW configuration per TC
1862 * @cmd_details: pointer to command details structure or NULL
1864 i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,
1866 struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data,
1867 struct i40e_asq_cmd_details *cmd_details)
1869 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1870 i40e_aqc_opc_query_vsi_ets_sla_config,
1875 * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1876 * @hw: pointer to the hw struct
1877 * @seid: seid of the switching component
1878 * @bw_data: Buffer to hold switching component's per TC BW config
1879 * @cmd_details: pointer to command details structure or NULL
1881 i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,
1883 struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data,
1884 struct i40e_asq_cmd_details *cmd_details)
1886 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1887 i40e_aqc_opc_query_switching_comp_ets_config,
1892 * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1893 * @hw: pointer to the hw struct
1894 * @seid: seid of the VSI or switching component connected to Physical Port
1895 * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1896 * @cmd_details: pointer to command details structure or NULL
1898 i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw,
1900 struct i40e_aqc_query_port_ets_config_resp *bw_data,
1901 struct i40e_asq_cmd_details *cmd_details)
1903 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1904 i40e_aqc_opc_query_port_ets_config,
1909 * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
1910 * @hw: pointer to the hw struct
1911 * @seid: seid of the switching component
1912 * @bw_data: Buffer to hold switching component's BW configuration
1913 * @cmd_details: pointer to command details structure or NULL
1915 i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,
1917 struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data,
1918 struct i40e_asq_cmd_details *cmd_details)
1920 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1921 i40e_aqc_opc_query_switching_comp_bw_config,
1926 * i40e_validate_filter_settings
1927 * @hw: pointer to the hardware structure
1928 * @settings: Filter control settings
1930 * Check and validate the filter control settings passed.
1931 * The function checks for the valid filter/context sizes being
1932 * passed for FCoE and PE.
1934 * Returns 0 if the values passed are valid and within
1935 * range else returns an error.
1937 static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
1938 struct i40e_filter_control_settings *settings)
1940 u32 fcoe_cntx_size, fcoe_filt_size;
1941 u32 pe_cntx_size, pe_filt_size;
1942 u32 fcoe_fmax, pe_fmax;
1945 /* Validate FCoE settings passed */
1946 switch (settings->fcoe_filt_num) {
1947 case I40E_HASH_FILTER_SIZE_1K:
1948 case I40E_HASH_FILTER_SIZE_2K:
1949 case I40E_HASH_FILTER_SIZE_4K:
1950 case I40E_HASH_FILTER_SIZE_8K:
1951 case I40E_HASH_FILTER_SIZE_16K:
1952 case I40E_HASH_FILTER_SIZE_32K:
1953 fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1954 fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
1957 return I40E_ERR_PARAM;
1960 switch (settings->fcoe_cntx_num) {
1961 case I40E_DMA_CNTX_SIZE_512:
1962 case I40E_DMA_CNTX_SIZE_1K:
1963 case I40E_DMA_CNTX_SIZE_2K:
1964 case I40E_DMA_CNTX_SIZE_4K:
1965 fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
1966 fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
1969 return I40E_ERR_PARAM;
1972 /* Validate PE settings passed */
1973 switch (settings->pe_filt_num) {
1974 case I40E_HASH_FILTER_SIZE_1K:
1975 case I40E_HASH_FILTER_SIZE_2K:
1976 case I40E_HASH_FILTER_SIZE_4K:
1977 case I40E_HASH_FILTER_SIZE_8K:
1978 case I40E_HASH_FILTER_SIZE_16K:
1979 case I40E_HASH_FILTER_SIZE_32K:
1980 case I40E_HASH_FILTER_SIZE_64K:
1981 case I40E_HASH_FILTER_SIZE_128K:
1982 case I40E_HASH_FILTER_SIZE_256K:
1983 case I40E_HASH_FILTER_SIZE_512K:
1984 case I40E_HASH_FILTER_SIZE_1M:
1985 pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1986 pe_filt_size <<= (u32)settings->pe_filt_num;
1989 return I40E_ERR_PARAM;
1992 switch (settings->pe_cntx_num) {
1993 case I40E_DMA_CNTX_SIZE_512:
1994 case I40E_DMA_CNTX_SIZE_1K:
1995 case I40E_DMA_CNTX_SIZE_2K:
1996 case I40E_DMA_CNTX_SIZE_4K:
1997 case I40E_DMA_CNTX_SIZE_8K:
1998 case I40E_DMA_CNTX_SIZE_16K:
1999 case I40E_DMA_CNTX_SIZE_32K:
2000 case I40E_DMA_CNTX_SIZE_64K:
2001 case I40E_DMA_CNTX_SIZE_128K:
2002 case I40E_DMA_CNTX_SIZE_256K:
2003 pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
2004 pe_cntx_size <<= (u32)settings->pe_cntx_num;
2007 return I40E_ERR_PARAM;
2010 /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
2011 val = rd32(hw, I40E_GLHMC_FCOEFMAX);
2012 fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
2013 >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;
2014 if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax)
2015 return I40E_ERR_INVALID_SIZE;
2017 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
2018 val = rd32(hw, I40E_GLHMC_PEXFMAX);
2019 pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
2020 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
2021 if (pe_filt_size + pe_cntx_size > pe_fmax)
2022 return I40E_ERR_INVALID_SIZE;
2028 * i40e_set_filter_control
2029 * @hw: pointer to the hardware structure
2030 * @settings: Filter control settings
2032 * Set the Queue Filters for PE/FCoE and enable filters required
2033 * for a single PF. It is expected that these settings are programmed
2034 * at the driver initialization time.
2036 i40e_status i40e_set_filter_control(struct i40e_hw *hw,
2037 struct i40e_filter_control_settings *settings)
2039 i40e_status ret = 0;
2040 u32 hash_lut_size = 0;
2044 return I40E_ERR_PARAM;
2046 /* Validate the input settings */
2047 ret = i40e_validate_filter_settings(hw, settings);
2051 /* Read the PF Queue Filter control register */
2052 val = rd32(hw, I40E_PFQF_CTL_0);
2054 /* Program required PE hash buckets for the PF */
2055 val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
2056 val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
2057 I40E_PFQF_CTL_0_PEHSIZE_MASK;
2058 /* Program required PE contexts for the PF */
2059 val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
2060 val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
2061 I40E_PFQF_CTL_0_PEDSIZE_MASK;
2063 /* Program required FCoE hash buckets for the PF */
2064 val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2065 val |= ((u32)settings->fcoe_filt_num <<
2066 I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) &
2067 I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2068 /* Program required FCoE DDP contexts for the PF */
2069 val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2070 val |= ((u32)settings->fcoe_cntx_num <<
2071 I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) &
2072 I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2074 /* Program Hash LUT size for the PF */
2075 val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2076 if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
2078 val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
2079 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2081 /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2082 if (settings->enable_fdir)
2083 val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
2084 if (settings->enable_ethtype)
2085 val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
2086 if (settings->enable_macvlan)
2087 val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
2089 wr32(hw, I40E_PFQF_CTL_0, val);