[media] platform drivers: Fix build on frv arch
[linux-drm-fsl-dcu.git] / drivers / media / tuners / e4000.c
1 /*
2  * Elonics E4000 silicon tuner driver
3  *
4  * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
5  *
6  *    This program is free software; you can redistribute it and/or modify
7  *    it under the terms of the GNU General Public License as published by
8  *    the Free Software Foundation; either version 2 of the License, or
9  *    (at your option) any later version.
10  *
11  *    This program is distributed in the hope that it will be useful,
12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *    GNU General Public License for more details.
15  *
16  *    You should have received a copy of the GNU General Public License along
17  *    with this program; if not, write to the Free Software Foundation, Inc.,
18  *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19  */
20
21 #include "e4000_priv.h"
22
23 /* Max transfer size done by I2C transfer functions */
24 #define MAX_XFER_SIZE  64
25
26 /* write multiple registers */
27 static int e4000_wr_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
28 {
29         int ret;
30         u8 buf[MAX_XFER_SIZE];
31         struct i2c_msg msg[1] = {
32                 {
33                         .addr = priv->cfg->i2c_addr,
34                         .flags = 0,
35                         .len = 1 + len,
36                         .buf = buf,
37                 }
38         };
39
40         if (1 + len > sizeof(buf)) {
41                 dev_warn(&priv->i2c->dev,
42                          "%s: i2c wr reg=%04x: len=%d is too big!\n",
43                          KBUILD_MODNAME, reg, len);
44                 return -EINVAL;
45         }
46
47         buf[0] = reg;
48         memcpy(&buf[1], val, len);
49
50         ret = i2c_transfer(priv->i2c, msg, 1);
51         if (ret == 1) {
52                 ret = 0;
53         } else {
54                 dev_warn(&priv->i2c->dev,
55                                 "%s: i2c wr failed=%d reg=%02x len=%d\n",
56                                 KBUILD_MODNAME, ret, reg, len);
57                 ret = -EREMOTEIO;
58         }
59         return ret;
60 }
61
62 /* read multiple registers */
63 static int e4000_rd_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
64 {
65         int ret;
66         u8 buf[MAX_XFER_SIZE];
67         struct i2c_msg msg[2] = {
68                 {
69                         .addr = priv->cfg->i2c_addr,
70                         .flags = 0,
71                         .len = 1,
72                         .buf = &reg,
73                 }, {
74                         .addr = priv->cfg->i2c_addr,
75                         .flags = I2C_M_RD,
76                         .len = len,
77                         .buf = buf,
78                 }
79         };
80
81         if (len > sizeof(buf)) {
82                 dev_warn(&priv->i2c->dev,
83                          "%s: i2c rd reg=%04x: len=%d is too big!\n",
84                          KBUILD_MODNAME, reg, len);
85                 return -EINVAL;
86         }
87
88         ret = i2c_transfer(priv->i2c, msg, 2);
89         if (ret == 2) {
90                 memcpy(val, buf, len);
91                 ret = 0;
92         } else {
93                 dev_warn(&priv->i2c->dev,
94                                 "%s: i2c rd failed=%d reg=%02x len=%d\n",
95                                 KBUILD_MODNAME, ret, reg, len);
96                 ret = -EREMOTEIO;
97         }
98
99         return ret;
100 }
101
102 /* write single register */
103 static int e4000_wr_reg(struct e4000_priv *priv, u8 reg, u8 val)
104 {
105         return e4000_wr_regs(priv, reg, &val, 1);
106 }
107
108 /* read single register */
109 static int e4000_rd_reg(struct e4000_priv *priv, u8 reg, u8 *val)
110 {
111         return e4000_rd_regs(priv, reg, val, 1);
112 }
113
114 static int e4000_init(struct dvb_frontend *fe)
115 {
116         struct e4000_priv *priv = fe->tuner_priv;
117         int ret;
118
119         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
120
121         if (fe->ops.i2c_gate_ctrl)
122                 fe->ops.i2c_gate_ctrl(fe, 1);
123
124         /* dummy I2C to ensure I2C wakes up */
125         ret = e4000_wr_reg(priv, 0x02, 0x40);
126
127         /* reset */
128         ret = e4000_wr_reg(priv, 0x00, 0x01);
129         if (ret < 0)
130                 goto err;
131
132         /* disable output clock */
133         ret = e4000_wr_reg(priv, 0x06, 0x00);
134         if (ret < 0)
135                 goto err;
136
137         ret = e4000_wr_reg(priv, 0x7a, 0x96);
138         if (ret < 0)
139                 goto err;
140
141         /* configure gains */
142         ret = e4000_wr_regs(priv, 0x7e, "\x01\xfe", 2);
143         if (ret < 0)
144                 goto err;
145
146         ret = e4000_wr_reg(priv, 0x82, 0x00);
147         if (ret < 0)
148                 goto err;
149
150         ret = e4000_wr_reg(priv, 0x24, 0x05);
151         if (ret < 0)
152                 goto err;
153
154         ret = e4000_wr_regs(priv, 0x87, "\x20\x01", 2);
155         if (ret < 0)
156                 goto err;
157
158         ret = e4000_wr_regs(priv, 0x9f, "\x7f\x07", 2);
159         if (ret < 0)
160                 goto err;
161
162         /* DC offset control */
163         ret = e4000_wr_reg(priv, 0x2d, 0x1f);
164         if (ret < 0)
165                 goto err;
166
167         ret = e4000_wr_regs(priv, 0x70, "\x01\x01", 2);
168         if (ret < 0)
169                 goto err;
170
171         /* gain control */
172         ret = e4000_wr_reg(priv, 0x1a, 0x17);
173         if (ret < 0)
174                 goto err;
175
176         ret = e4000_wr_reg(priv, 0x1f, 0x1a);
177         if (ret < 0)
178                 goto err;
179
180         if (fe->ops.i2c_gate_ctrl)
181                 fe->ops.i2c_gate_ctrl(fe, 0);
182
183         return 0;
184 err:
185         if (fe->ops.i2c_gate_ctrl)
186                 fe->ops.i2c_gate_ctrl(fe, 0);
187
188         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
189         return ret;
190 }
191
192 static int e4000_sleep(struct dvb_frontend *fe)
193 {
194         struct e4000_priv *priv = fe->tuner_priv;
195         int ret;
196
197         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
198
199         if (fe->ops.i2c_gate_ctrl)
200                 fe->ops.i2c_gate_ctrl(fe, 1);
201
202         ret = e4000_wr_reg(priv, 0x00, 0x00);
203         if (ret < 0)
204                 goto err;
205
206         if (fe->ops.i2c_gate_ctrl)
207                 fe->ops.i2c_gate_ctrl(fe, 0);
208
209         return 0;
210 err:
211         if (fe->ops.i2c_gate_ctrl)
212                 fe->ops.i2c_gate_ctrl(fe, 0);
213
214         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
215         return ret;
216 }
217
218 static int e4000_set_params(struct dvb_frontend *fe)
219 {
220         struct e4000_priv *priv = fe->tuner_priv;
221         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
222         int ret, i, sigma_delta;
223         unsigned int f_vco;
224         u8 buf[5], i_data[4], q_data[4];
225
226         dev_dbg(&priv->i2c->dev,
227                         "%s: delivery_system=%d frequency=%d bandwidth_hz=%d\n",
228                         __func__, c->delivery_system, c->frequency,
229                         c->bandwidth_hz);
230
231         if (fe->ops.i2c_gate_ctrl)
232                 fe->ops.i2c_gate_ctrl(fe, 1);
233
234         /* gain control manual */
235         ret = e4000_wr_reg(priv, 0x1a, 0x00);
236         if (ret < 0)
237                 goto err;
238
239         /* PLL */
240         for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
241                 if (c->frequency <= e4000_pll_lut[i].freq)
242                         break;
243         }
244
245         if (i == ARRAY_SIZE(e4000_pll_lut))
246                 goto err;
247
248         /*
249          * Note: Currently f_vco overflows when c->frequency is 1 073 741 824 Hz
250          * or more.
251          */
252         f_vco = c->frequency * e4000_pll_lut[i].mul;
253         sigma_delta = 0x10000UL * (f_vco % priv->cfg->clock) / priv->cfg->clock;
254         buf[0] = f_vco / priv->cfg->clock;
255         buf[1] = (sigma_delta >> 0) & 0xff;
256         buf[2] = (sigma_delta >> 8) & 0xff;
257         buf[3] = 0x00;
258         buf[4] = e4000_pll_lut[i].div;
259
260         dev_dbg(&priv->i2c->dev, "%s: f_vco=%u pll div=%d sigma_delta=%04x\n",
261                         __func__, f_vco, buf[0], sigma_delta);
262
263         ret = e4000_wr_regs(priv, 0x09, buf, 5);
264         if (ret < 0)
265                 goto err;
266
267         /* LNA filter (RF filter) */
268         for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
269                 if (c->frequency <= e400_lna_filter_lut[i].freq)
270                         break;
271         }
272
273         if (i == ARRAY_SIZE(e400_lna_filter_lut))
274                 goto err;
275
276         ret = e4000_wr_reg(priv, 0x10, e400_lna_filter_lut[i].val);
277         if (ret < 0)
278                 goto err;
279
280         /* IF filters */
281         for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
282                 if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq)
283                         break;
284         }
285
286         if (i == ARRAY_SIZE(e4000_if_filter_lut))
287                 goto err;
288
289         buf[0] = e4000_if_filter_lut[i].reg11_val;
290         buf[1] = e4000_if_filter_lut[i].reg12_val;
291
292         ret = e4000_wr_regs(priv, 0x11, buf, 2);
293         if (ret < 0)
294                 goto err;
295
296         /* frequency band */
297         for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
298                 if (c->frequency <= e4000_band_lut[i].freq)
299                         break;
300         }
301
302         if (i == ARRAY_SIZE(e4000_band_lut))
303                 goto err;
304
305         ret = e4000_wr_reg(priv, 0x07, e4000_band_lut[i].reg07_val);
306         if (ret < 0)
307                 goto err;
308
309         ret = e4000_wr_reg(priv, 0x78, e4000_band_lut[i].reg78_val);
310         if (ret < 0)
311                 goto err;
312
313         /* DC offset */
314         for (i = 0; i < 4; i++) {
315                 if (i == 0)
316                         ret = e4000_wr_regs(priv, 0x15, "\x00\x7e\x24", 3);
317                 else if (i == 1)
318                         ret = e4000_wr_regs(priv, 0x15, "\x00\x7f", 2);
319                 else if (i == 2)
320                         ret = e4000_wr_regs(priv, 0x15, "\x01", 1);
321                 else
322                         ret = e4000_wr_regs(priv, 0x16, "\x7e", 1);
323
324                 if (ret < 0)
325                         goto err;
326
327                 ret = e4000_wr_reg(priv, 0x29, 0x01);
328                 if (ret < 0)
329                         goto err;
330
331                 ret = e4000_rd_regs(priv, 0x2a, buf, 3);
332                 if (ret < 0)
333                         goto err;
334
335                 i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
336                 q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
337         }
338
339         swap(q_data[2], q_data[3]);
340         swap(i_data[2], i_data[3]);
341
342         ret = e4000_wr_regs(priv, 0x50, q_data, 4);
343         if (ret < 0)
344                 goto err;
345
346         ret = e4000_wr_regs(priv, 0x60, i_data, 4);
347         if (ret < 0)
348                 goto err;
349
350         /* gain control auto */
351         ret = e4000_wr_reg(priv, 0x1a, 0x17);
352         if (ret < 0)
353                 goto err;
354
355         if (fe->ops.i2c_gate_ctrl)
356                 fe->ops.i2c_gate_ctrl(fe, 0);
357
358         return 0;
359 err:
360         if (fe->ops.i2c_gate_ctrl)
361                 fe->ops.i2c_gate_ctrl(fe, 0);
362
363         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
364         return ret;
365 }
366
367 static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
368 {
369         struct e4000_priv *priv = fe->tuner_priv;
370
371         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
372
373         *frequency = 0; /* Zero-IF */
374
375         return 0;
376 }
377
378 static int e4000_release(struct dvb_frontend *fe)
379 {
380         struct e4000_priv *priv = fe->tuner_priv;
381
382         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
383
384         kfree(fe->tuner_priv);
385
386         return 0;
387 }
388
389 static const struct dvb_tuner_ops e4000_tuner_ops = {
390         .info = {
391                 .name           = "Elonics E4000",
392                 .frequency_min  = 174000000,
393                 .frequency_max  = 862000000,
394         },
395
396         .release = e4000_release,
397
398         .init = e4000_init,
399         .sleep = e4000_sleep,
400         .set_params = e4000_set_params,
401
402         .get_if_frequency = e4000_get_if_frequency,
403 };
404
405 struct dvb_frontend *e4000_attach(struct dvb_frontend *fe,
406                 struct i2c_adapter *i2c, const struct e4000_config *cfg)
407 {
408         struct e4000_priv *priv;
409         int ret;
410         u8 chip_id;
411
412         if (fe->ops.i2c_gate_ctrl)
413                 fe->ops.i2c_gate_ctrl(fe, 1);
414
415         priv = kzalloc(sizeof(struct e4000_priv), GFP_KERNEL);
416         if (!priv) {
417                 ret = -ENOMEM;
418                 dev_err(&i2c->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
419                 goto err;
420         }
421
422         priv->cfg = cfg;
423         priv->i2c = i2c;
424
425         /* check if the tuner is there */
426         ret = e4000_rd_reg(priv, 0x02, &chip_id);
427         if (ret < 0)
428                 goto err;
429
430         dev_dbg(&priv->i2c->dev, "%s: chip_id=%02x\n", __func__, chip_id);
431
432         if (chip_id != 0x40)
433                 goto err;
434
435         /* put sleep as chip seems to be in normal mode by default */
436         ret = e4000_wr_reg(priv, 0x00, 0x00);
437         if (ret < 0)
438                 goto err;
439
440         dev_info(&priv->i2c->dev,
441                         "%s: Elonics E4000 successfully identified\n",
442                         KBUILD_MODNAME);
443
444         fe->tuner_priv = priv;
445         memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops,
446                         sizeof(struct dvb_tuner_ops));
447
448         if (fe->ops.i2c_gate_ctrl)
449                 fe->ops.i2c_gate_ctrl(fe, 0);
450
451         return fe;
452 err:
453         if (fe->ops.i2c_gate_ctrl)
454                 fe->ops.i2c_gate_ctrl(fe, 0);
455
456         dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
457         kfree(priv);
458         return NULL;
459 }
460 EXPORT_SYMBOL(e4000_attach);
461
462 MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
463 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
464 MODULE_LICENSE("GPL");