drivers/gpu/drm/i915/i915_gem_execbuffer.c

   1 /*
   2  * Copyright © 2008,2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Chris Wilson <chris@chris-wilson.co.uk>
  26  *
  27  */
  28
  29 #include <drm/drmP.h>
  30 #include <drm/i915_drm.h>
  31 #include "i915_drv.h"
  32 #include "i915_trace.h"
  33 #include "intel_drv.h"
  34 #include <linux/dma_remapping.h>
  35
  36 #define  __EXEC_OBJECT_HAS_PIN (1<<31)
  37 #define  __EXEC_OBJECT_HAS_FENCE (1<<30)
  38
  39 struct eb_vmas {
  40         struct list_head vmas;
  41         int and;
  42         union {
  43                 struct i915_vma *lut[0];
  44                 struct hlist_head buckets[0];
  45         };
  46 };
  47
  48 static struct eb_vmas *
  49 eb_create(struct drm_i915_gem_execbuffer2 *args, struct i915_address_space *vm)
  50 {
  51         struct eb_vmas *eb = NULL;
  52
  53         if (args->flags & I915_EXEC_HANDLE_LUT) {
  54                 unsigned size = args->buffer_count;
  55                 size *= sizeof(struct i915_vma *);
  56                 size += sizeof(struct eb_vmas);
  57                 eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
  58         }
  59
  60         if (eb == NULL) {
  61                 unsigned size = args->buffer_count;
  62                 unsigned count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
  63                 BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
  64                 while (count > 2*size)
  65                         count >>= 1;
  66                 eb = kzalloc(count*sizeof(struct hlist_head) +
  67                              sizeof(struct eb_vmas),
  68                              GFP_TEMPORARY);
  69                 if (eb == NULL)
  70                         return eb;
  71
  72                 eb->and = count - 1;
  73         } else
  74                 eb->and = -args->buffer_count;
  75
  76         INIT_LIST_HEAD(&eb->vmas);
  77         return eb;
  78 }
  79
  80 static void
  81 eb_reset(struct eb_vmas *eb)
  82 {
  83         if (eb->and >= 0)
  84                 memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
  85 }
  86
  87 static int
  88 eb_lookup_vmas(struct eb_vmas *eb,
  89                struct drm_i915_gem_exec_object2 *exec,
  90                const struct drm_i915_gem_execbuffer2 *args,
  91                struct i915_address_space *vm,
  92                struct drm_file *file)
  93 {
  94         struct drm_i915_gem_object *obj;
  95         struct list_head objects;
  96         int i, ret;
  97
  98         INIT_LIST_HEAD(&objects);
  99         spin_lock(&file->table_lock);
 100         /* Grab a reference to the object and release the lock so we can lookup
 101          * or create the VMA without using GFP_ATOMIC */
 102         for (i = 0; i < args->buffer_count; i++) {
 103                 obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
 104                 if (obj == NULL) {
 105                         spin_unlock(&file->table_lock);
 106                         DRM_DEBUG("Invalid object handle %d at index %d\n",
 107                                    exec[i].handle, i);
 108                         ret = -ENOENT;
 109                         goto err;
 110                 }
 111
 112                 if (!list_empty(&obj->obj_exec_link)) {
 113                         spin_unlock(&file->table_lock);
 114                         DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
 115                                    obj, exec[i].handle, i);
 116                         ret = -EINVAL;
 117                         goto err;
 118                 }
 119
 120                 drm_gem_object_reference(&obj->base);
 121                 list_add_tail(&obj->obj_exec_link, &objects);
 122         }
 123         spin_unlock(&file->table_lock);
 124
 125         i = 0;
 126         while (!list_empty(&objects)) {
 127                 struct i915_vma *vma;
 128
 129                 obj = list_first_entry(&objects,
 130                                        struct drm_i915_gem_object,
 131                                        obj_exec_link);
 132
 133                 /*
 134                  * NOTE: We can leak any vmas created here when something fails
 135                  * later on. But that's no issue since vma_unbind can deal with
 136                  * vmas which are not actually bound. And since only
 137                  * lookup_or_create exists as an interface to get at the vma
 138                  * from the (obj, vm) we don't run the risk of creating
 139                  * duplicated vmas for the same vm.
 140                  */
 141                 vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
 142                 if (IS_ERR(vma)) {
 143                         DRM_DEBUG("Failed to lookup VMA\n");
 144                         ret = PTR_ERR(vma);
 145                         goto err;
 146                 }
 147
 148                 /* Transfer ownership from the objects list to the vmas list. */
 149                 list_add_tail(&vma->exec_list, &eb->vmas);
 150                 list_del_init(&obj->obj_exec_link);
 151
 152                 vma->exec_entry = &exec[i];
 153                 if (eb->and < 0) {
 154                         eb->lut[i] = vma;
 155                 } else {
 156                         uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
 157                         vma->exec_handle = handle;
 158                         hlist_add_head(&vma->exec_node,
 159                                        &eb->buckets[handle & eb->and]);
 160                 }
 161                 ++i;
 162         }
 163
 164         return 0;
 165
 166
 167 err:
 168         while (!list_empty(&objects)) {
 169                 obj = list_first_entry(&objects,
 170                                        struct drm_i915_gem_object,
 171                                        obj_exec_link);
 172                 list_del_init(&obj->obj_exec_link);
 173                 drm_gem_object_unreference(&obj->base);
 174         }
 175         /*
 176          * Objects already transfered to the vmas list will be unreferenced by
 177          * eb_destroy.
 178          */
 179
 180         return ret;
 181 }
 182
 183 static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
 184 {
 185         if (eb->and < 0) {
 186                 if (handle >= -eb->and)
 187                         return NULL;
 188                 return eb->lut[handle];
 189         } else {
 190                 struct hlist_head *head;
 191                 struct hlist_node *node;
 192
 193                 head = &eb->buckets[handle & eb->and];
 194                 hlist_for_each(node, head) {
 195                         struct i915_vma *vma;
 196
 197                         vma = hlist_entry(node, struct i915_vma, exec_node);
 198                         if (vma->exec_handle == handle)
 199                                 return vma;
 200                 }
 201                 return NULL;
 202         }
 203 }
 204
 205 static void
 206 i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
 207 {
 208         struct drm_i915_gem_exec_object2 *entry;
 209         struct drm_i915_gem_object *obj = vma->obj;
 210
 211         if (!drm_mm_node_allocated(&vma->node))
 212                 return;
 213
 214         entry = vma->exec_entry;
 215
 216         if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
 217                 i915_gem_object_unpin_fence(obj);
 218
 219         if (entry->flags & __EXEC_OBJECT_HAS_PIN)
 220                 i915_gem_object_unpin(obj);
 221
 222         entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
 223 }
 224
 225 static void eb_destroy(struct eb_vmas *eb)
 226 {
 227         while (!list_empty(&eb->vmas)) {
 228                 struct i915_vma *vma;
 229
 230                 vma = list_first_entry(&eb->vmas,
 231                                        struct i915_vma,
 232                                        exec_list);
 233                 list_del_init(&vma->exec_list);
 234                 i915_gem_execbuffer_unreserve_vma(vma);
 235                 drm_gem_object_unreference(&vma->obj->base);
 236         }
 237         kfree(eb);
 238 }
 239
 240 static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
 241 {
 242         return (HAS_LLC(obj->base.dev) ||
 243                 obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
 244                 !obj->map_and_fenceable ||
 245                 obj->cache_level != I915_CACHE_NONE);
 246 }
 247
 248 static int
 249 relocate_entry_cpu(struct drm_i915_gem_object *obj,
 250                    struct drm_i915_gem_relocation_entry *reloc)
 251 {
 252         struct drm_device *dev = obj->base.dev;
 253         uint32_t page_offset = offset_in_page(reloc->offset);
 254         char *vaddr;
 255         int ret = -EINVAL;
 256
 257         ret = i915_gem_object_set_to_cpu_domain(obj, true);
 258         if (ret)
 259                 return ret;
 260
 261         vaddr = kmap_atomic(i915_gem_object_get_page(obj,
 262                                 reloc->offset >> PAGE_SHIFT));
 263         *(uint32_t *)(vaddr + page_offset) = reloc->delta;
 264
 265         if (INTEL_INFO(dev)->gen >= 8) {
 266                 page_offset = offset_in_page(page_offset + sizeof(uint32_t));
 267
 268                 if (page_offset == 0) {
 269                         kunmap_atomic(vaddr);
 270                         vaddr = kmap_atomic(i915_gem_object_get_page(obj,
 271                             (reloc->offset + sizeof(uint32_t)) >> PAGE_SHIFT));
 272                 }
 273
 274                 *(uint32_t *)(vaddr + page_offset) = 0;
 275         }
 276
 277         kunmap_atomic(vaddr);
 278
 279         return 0;
 280 }
 281
 282 static int
 283 relocate_entry_gtt(struct drm_i915_gem_object *obj,
 284                    struct drm_i915_gem_relocation_entry *reloc)
 285 {
 286         struct drm_device *dev = obj->base.dev;
 287         struct drm_i915_private *dev_priv = dev->dev_private;
 288         uint32_t __iomem *reloc_entry;
 289         void __iomem *reloc_page;
 290         int ret = -EINVAL;
 291
 292         ret = i915_gem_object_set_to_gtt_domain(obj, true);
 293         if (ret)
 294                 return ret;
 295
 296         ret = i915_gem_object_put_fence(obj);
 297         if (ret)
 298                 return ret;
 299
 300         /* Map the page containing the relocation we're going to perform.  */
 301         reloc->offset += i915_gem_obj_ggtt_offset(obj);
 302         reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
 303                         reloc->offset & PAGE_MASK);
 304         reloc_entry = (uint32_t __iomem *)
 305                 (reloc_page + offset_in_page(reloc->offset));
 306         iowrite32(reloc->delta, reloc_entry);
 307
 308         if (INTEL_INFO(dev)->gen >= 8) {
 309                 reloc_entry += 1;
 310
 311                 if (offset_in_page(reloc->offset + sizeof(uint32_t)) == 0) {
 312                         io_mapping_unmap_atomic(reloc_page);
 313                         reloc_page = io_mapping_map_atomic_wc(
 314                                         dev_priv->gtt.mappable,
 315                                         reloc->offset + sizeof(uint32_t));
 316                         reloc_entry = reloc_page;
 317                 }
 318
 319                 iowrite32(0, reloc_entry);
 320         }
 321
 322         io_mapping_unmap_atomic(reloc_page);
 323
 324         return 0;
 325 }
 326
 327 static int
 328 i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
 329                                    struct eb_vmas *eb,
 330                                    struct drm_i915_gem_relocation_entry *reloc,
 331                                    struct i915_address_space *vm)
 332 {
 333         struct drm_device *dev = obj->base.dev;
 334         struct drm_gem_object *target_obj;
 335         struct drm_i915_gem_object *target_i915_obj;
 336         struct i915_vma *target_vma;
 337         uint32_t target_offset;
 338         int ret = -EINVAL;
 339
 340         /* we've already hold a reference to all valid objects */
 341         target_vma = eb_get_vma(eb, reloc->target_handle);
 342         if (unlikely(target_vma == NULL))
 343                 return -ENOENT;
 344         target_i915_obj = target_vma->obj;
 345         target_obj = &target_vma->obj->base;
 346
 347         target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
 348
 349         /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
 350          * pipe_control writes because the gpu doesn't properly redirect them
 351          * through the ppgtt for non_secure batchbuffers. */
 352         if (unlikely(IS_GEN6(dev) &&
 353             reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
 354             !target_i915_obj->has_global_gtt_mapping)) {
 355                 i915_gem_gtt_bind_object(target_i915_obj,
 356                                          target_i915_obj->cache_level);
 357         }
 358
 359         /* Validate that the target is in a valid r/w GPU domain */
 360         if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
 361                 DRM_DEBUG("reloc with multiple write domains: "
 362                           "obj %p target %d offset %d "
 363                           "read %08x write %08x",
 364                           obj, reloc->target_handle,
 365                           (int) reloc->offset,
 366                           reloc->read_domains,
 367                           reloc->write_domain);
 368                 return ret;
 369         }
 370         if (unlikely((reloc->write_domain | reloc->read_domains)
 371                      & ~I915_GEM_GPU_DOMAINS)) {
 372                 DRM_DEBUG("reloc with read/write non-GPU domains: "
 373                           "obj %p target %d offset %d "
 374                           "read %08x write %08x",
 375                           obj, reloc->target_handle,
 376                           (int) reloc->offset,
 377                           reloc->read_domains,
 378                           reloc->write_domain);
 379                 return ret;
 380         }
 381
 382         target_obj->pending_read_domains |= reloc->read_domains;
 383         target_obj->pending_write_domain |= reloc->write_domain;
 384
 385         /* If the relocation already has the right value in it, no
 386          * more work needs to be done.
 387          */
 388         if (target_offset == reloc->presumed_offset)
 389                 return 0;
 390
 391         /* Check that the relocation address is valid... */
 392         if (unlikely(reloc->offset >
 393                 obj->base.size - (INTEL_INFO(dev)->gen >= 8 ? 8 : 4))) {
 394                 DRM_DEBUG("Relocation beyond object bounds: "
 395                           "obj %p target %d offset %d size %d.\n",
 396                           obj, reloc->target_handle,
 397                           (int) reloc->offset,
 398                           (int) obj->base.size);
 399                 return ret;
 400         }
 401         if (unlikely(reloc->offset & 3)) {
 402                 DRM_DEBUG("Relocation not 4-byte aligned: "
 403                           "obj %p target %d offset %d.\n",
 404                           obj, reloc->target_handle,
 405                           (int) reloc->offset);
 406                 return ret;
 407         }
 408
 409         /* We can't wait for rendering with pagefaults disabled */
 410         if (obj->active && in_atomic())
 411                 return -EFAULT;
 412
 413         reloc->delta += target_offset;
 414         if (use_cpu_reloc(obj))
 415                 ret = relocate_entry_cpu(obj, reloc);
 416         else
 417                 ret = relocate_entry_gtt(obj, reloc);
 418
 419         if (ret)
 420                 return ret;
 421
 422         /* and update the user's relocation entry */
 423         reloc->presumed_offset = target_offset;
 424
 425         return 0;
 426 }
 427
 428 static int
 429 i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
 430                                  struct eb_vmas *eb)
 431 {
 432 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
 433         struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
 434         struct drm_i915_gem_relocation_entry __user *user_relocs;
 435         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 436         int remain, ret;
 437
 438         user_relocs = to_user_ptr(entry->relocs_ptr);
 439
 440         remain = entry->relocation_count;
 441         while (remain) {
 442                 struct drm_i915_gem_relocation_entry *r = stack_reloc;
 443                 int count = remain;
 444                 if (count > ARRAY_SIZE(stack_reloc))
 445                         count = ARRAY_SIZE(stack_reloc);
 446                 remain -= count;
 447
 448                 if (__copy_from_user_inatomic(r, user_relocs, count*sizeof(r[0])))
 449                         return -EFAULT;
 450
 451                 do {
 452                         u64 offset = r->presumed_offset;
 453
 454                         ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, r,
 455                                                                  vma->vm);
 456                         if (ret)
 457                                 return ret;
 458
 459                         if (r->presumed_offset != offset &&
 460                             __copy_to_user_inatomic(&user_relocs->presumed_offset,
 461                                                     &r->presumed_offset,
 462                                                     sizeof(r->presumed_offset))) {
 463                                 return -EFAULT;
 464                         }
 465
 466                         user_relocs++;
 467                         r++;
 468                 } while (--count);
 469         }
 470
 471         return 0;
 472 #undef N_RELOC
 473 }
 474
 475 static int
 476 i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma,
 477                                       struct eb_vmas *eb,
 478                                       struct drm_i915_gem_relocation_entry *relocs)
 479 {
 480         const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 481         int i, ret;
 482
 483         for (i = 0; i < entry->relocation_count; i++) {
 484                 ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i],
 485                                                          vma->vm);
 486                 if (ret)
 487                         return ret;
 488         }
 489
 490         return 0;
 491 }
 492
 493 static int
 494 i915_gem_execbuffer_relocate(struct eb_vmas *eb,
 495                              struct i915_address_space *vm)
 496 {
 497         struct i915_vma *vma;
 498         int ret = 0;
 499
 500         /* This is the fast path and we cannot handle a pagefault whilst
 501          * holding the struct mutex lest the user pass in the relocations
 502          * contained within a mmaped bo. For in such a case we, the page
 503          * fault handler would call i915_gem_fault() and we would try to
 504          * acquire the struct mutex again. Obviously this is bad and so
 505          * lockdep complains vehemently.
 506          */
 507         pagefault_disable();
 508         list_for_each_entry(vma, &eb->vmas, exec_list) {
 509                 ret = i915_gem_execbuffer_relocate_vma(vma, eb);
 510                 if (ret)
 511                         break;
 512         }
 513         pagefault_enable();
 514
 515         return ret;
 516 }
 517
 518 static int
 519 need_reloc_mappable(struct i915_vma *vma)
 520 {
 521         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 522         return entry->relocation_count && !use_cpu_reloc(vma->obj) &&
 523                 i915_is_ggtt(vma->vm);
 524 }
 525
 526 static int
 527 i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
 528                                 struct intel_ring_buffer *ring,
 529                                 bool *need_reloc)
 530 {
 531         struct drm_i915_private *dev_priv = ring->dev->dev_private;
 532         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 533         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 534         bool need_fence, need_mappable;
 535         struct drm_i915_gem_object *obj = vma->obj;
 536         int ret;
 537
 538         need_fence =
 539                 has_fenced_gpu_access &&
 540                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 541                 obj->tiling_mode != I915_TILING_NONE;
 542         need_mappable = need_fence || need_reloc_mappable(vma);
 543
 544         ret = i915_gem_object_pin(obj, vma->vm, entry->alignment, need_mappable,
 545                                   false);
 546         if (ret)
 547                 return ret;
 548
 549         entry->flags |= __EXEC_OBJECT_HAS_PIN;
 550
 551         if (has_fenced_gpu_access) {
 552                 if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
 553                         ret = i915_gem_object_get_fence(obj);
 554                         if (ret)
 555                                 return ret;
 556
 557                         if (i915_gem_object_pin_fence(obj))
 558                                 entry->flags |= __EXEC_OBJECT_HAS_FENCE;
 559
 560                         obj->pending_fenced_gpu_access = true;
 561                 }
 562         }
 563
 564         /* Ensure ppgtt mapping exists if needed */
 565         if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
 566                 i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
 567                                        obj, obj->cache_level);
 568
 569                 obj->has_aliasing_ppgtt_mapping = 1;
 570         }
 571
 572         if (entry->offset != vma->node.start) {
 573                 entry->offset = vma->node.start;
 574                 *need_reloc = true;
 575         }
 576
 577         if (entry->flags & EXEC_OBJECT_WRITE) {
 578                 obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
 579                 obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
 580         }
 581
 582         if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
 583             !obj->has_global_gtt_mapping)
 584                 i915_gem_gtt_bind_object(obj, obj->cache_level);
 585
 586         return 0;
 587 }
 588
 589 static int
 590 i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 591                             struct list_head *vmas,
 592                             bool *need_relocs)
 593 {
 594         struct drm_i915_gem_object *obj;
 595         struct i915_vma *vma;
 596         struct i915_address_space *vm;
 597         struct list_head ordered_vmas;
 598         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 599         int retry;
 600
 601         if (list_empty(vmas))
 602                 return 0;
 603
 604         vm = list_first_entry(vmas, struct i915_vma, exec_list)->vm;
 605
 606         INIT_LIST_HEAD(&ordered_vmas);
 607         while (!list_empty(vmas)) {
 608                 struct drm_i915_gem_exec_object2 *entry;
 609                 bool need_fence, need_mappable;
 610
 611                 vma = list_first_entry(vmas, struct i915_vma, exec_list);
 612                 obj = vma->obj;
 613                 entry = vma->exec_entry;
 614
 615                 need_fence =
 616                         has_fenced_gpu_access &&
 617                         entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 618                         obj->tiling_mode != I915_TILING_NONE;
 619                 need_mappable = need_fence || need_reloc_mappable(vma);
 620
 621                 if (need_mappable)
 622                         list_move(&vma->exec_list, &ordered_vmas);
 623                 else
 624                         list_move_tail(&vma->exec_list, &ordered_vmas);
 625
 626                 obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
 627                 obj->base.pending_write_domain = 0;
 628                 obj->pending_fenced_gpu_access = false;
 629         }
 630         list_splice(&ordered_vmas, vmas);
 631
 632         /* Attempt to pin all of the buffers into the GTT.
 633          * This is done in 3 phases:
 634          *
 635          * 1a. Unbind all objects that do not match the GTT constraints for
 636          *     the execbuffer (fenceable, mappable, alignment etc).
 637          * 1b. Increment pin count for already bound objects.
 638          * 2.  Bind new objects.
 639          * 3.  Decrement pin count.
 640          *
 641          * This avoid unnecessary unbinding of later objects in order to make
 642          * room for the earlier objects *unless* we need to defragment.
 643          */
 644         retry = 0;
 645         do {
 646                 int ret = 0;
 647
 648                 /* Unbind any ill-fitting objects or pin. */
 649                 list_for_each_entry(vma, vmas, exec_list) {
 650                         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 651                         bool need_fence, need_mappable;
 652
 653                         obj = vma->obj;
 654
 655                         if (!drm_mm_node_allocated(&vma->node))
 656                                 continue;
 657
 658                         need_fence =
 659                                 has_fenced_gpu_access &&
 660                                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 661                                 obj->tiling_mode != I915_TILING_NONE;
 662                         need_mappable = need_fence || need_reloc_mappable(vma);
 663
 664                         WARN_ON((need_mappable || need_fence) &&
 665                                !i915_is_ggtt(vma->vm));
 666
 667                         if ((entry->alignment &&
 668                              vma->node.start & (entry->alignment - 1)) ||
 669                             (need_mappable && !obj->map_and_fenceable))
 670                                 ret = i915_vma_unbind(vma);
 671                         else
 672                                 ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
 673                         if (ret)
 674                                 goto err;
 675                 }
 676
 677                 /* Bind fresh objects */
 678                 list_for_each_entry(vma, vmas, exec_list) {
 679                         if (drm_mm_node_allocated(&vma->node))
 680                                 continue;
 681
 682                         ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
 683                         if (ret)
 684                                 goto err;
 685                 }
 686
 687 err:
 688                 if (ret != -ENOSPC || retry++)
 689                         return ret;
 690
 691                 /* Decrement pin count for bound objects */
 692                 list_for_each_entry(vma, vmas, exec_list)
 693                         i915_gem_execbuffer_unreserve_vma(vma);
 694
 695                 ret = i915_gem_evict_vm(vm, true);
 696                 if (ret)
 697                         return ret;
 698         } while (1);
 699 }
 700
 701 static int
 702 i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
 703                                   struct drm_i915_gem_execbuffer2 *args,
 704                                   struct drm_file *file,
 705                                   struct intel_ring_buffer *ring,
 706                                   struct eb_vmas *eb,
 707                                   struct drm_i915_gem_exec_object2 *exec)
 708 {
 709         struct drm_i915_gem_relocation_entry *reloc;
 710         struct i915_address_space *vm;
 711         struct i915_vma *vma;
 712         bool need_relocs;
 713         int *reloc_offset;
 714         int i, total, ret;
 715         unsigned count = args->buffer_count;
 716
 717         if (WARN_ON(list_empty(&eb->vmas)))
 718                 return 0;
 719
 720         vm = list_first_entry(&eb->vmas, struct i915_vma, exec_list)->vm;
 721
 722         /* We may process another execbuffer during the unlock... */
 723         while (!list_empty(&eb->vmas)) {
 724                 vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
 725                 list_del_init(&vma->exec_list);
 726                 i915_gem_execbuffer_unreserve_vma(vma);
 727                 drm_gem_object_unreference(&vma->obj->base);
 728         }
 729
 730         mutex_unlock(&dev->struct_mutex);
 731
 732         total = 0;
 733         for (i = 0; i < count; i++)
 734                 total += exec[i].relocation_count;
 735
 736         reloc_offset = drm_malloc_ab(count, sizeof(*reloc_offset));
 737         reloc = drm_malloc_ab(total, sizeof(*reloc));
 738         if (reloc == NULL || reloc_offset == NULL) {
 739                 drm_free_large(reloc);
 740                 drm_free_large(reloc_offset);
 741                 mutex_lock(&dev->struct_mutex);
 742                 return -ENOMEM;
 743         }
 744
 745         total = 0;
 746         for (i = 0; i < count; i++) {
 747                 struct drm_i915_gem_relocation_entry __user *user_relocs;
 748                 u64 invalid_offset = (u64)-1;
 749                 int j;
 750
 751                 user_relocs = to_user_ptr(exec[i].relocs_ptr);
 752
 753                 if (copy_from_user(reloc+total, user_relocs,
 754                                    exec[i].relocation_count * sizeof(*reloc))) {
 755                         ret = -EFAULT;
 756                         mutex_lock(&dev->struct_mutex);
 757                         goto err;
 758                 }
 759
 760                 /* As we do not update the known relocation offsets after
 761                  * relocating (due to the complexities in lock handling),
 762                  * we need to mark them as invalid now so that we force the
 763                  * relocation processing next time. Just in case the target
 764                  * object is evicted and then rebound into its old
 765                  * presumed_offset before the next execbuffer - if that
 766                  * happened we would make the mistake of assuming that the
 767                  * relocations were valid.
 768                  */
 769                 for (j = 0; j < exec[i].relocation_count; j++) {
 770                         if (copy_to_user(&user_relocs[j].presumed_offset,
 771                                          &invalid_offset,
 772                                          sizeof(invalid_offset))) {
 773                                 ret = -EFAULT;
 774                                 mutex_lock(&dev->struct_mutex);
 775                                 goto err;
 776                         }
 777                 }
 778
 779                 reloc_offset[i] = total;
 780                 total += exec[i].relocation_count;
 781         }
 782
 783         ret = i915_mutex_lock_interruptible(dev);
 784         if (ret) {
 785                 mutex_lock(&dev->struct_mutex);
 786                 goto err;
 787         }
 788
 789         /* reacquire the objects */
 790         eb_reset(eb);
 791         ret = eb_lookup_vmas(eb, exec, args, vm, file);
 792         if (ret)
 793                 goto err;
 794
 795         need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
 796         ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
 797         if (ret)
 798                 goto err;
 799
 800         list_for_each_entry(vma, &eb->vmas, exec_list) {
 801                 int offset = vma->exec_entry - exec;
 802                 ret = i915_gem_execbuffer_relocate_vma_slow(vma, eb,
 803                                                             reloc + reloc_offset[offset]);
 804                 if (ret)
 805                         goto err;
 806         }
 807
 808         /* Leave the user relocations as are, this is the painfully slow path,
 809          * and we want to avoid the complication of dropping the lock whilst
 810          * having buffers reserved in the aperture and so causing spurious
 811          * ENOSPC for random operations.
 812          */
 813
 814 err:
 815         drm_free_large(reloc);
 816         drm_free_large(reloc_offset);
 817         return ret;
 818 }
 819
 820 static int
 821 i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
 822                                 struct list_head *vmas)
 823 {
 824         struct i915_vma *vma;
 825         uint32_t flush_domains = 0;
 826         bool flush_chipset = false;
 827         int ret;
 828
 829         list_for_each_entry(vma, vmas, exec_list) {
 830                 struct drm_i915_gem_object *obj = vma->obj;
 831                 ret = i915_gem_object_sync(obj, ring);
 832                 if (ret)
 833                         return ret;
 834
 835                 if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
 836                         flush_chipset |= i915_gem_clflush_object(obj, false);
 837
 838                 flush_domains |= obj->base.write_domain;
 839         }
 840
 841         if (flush_chipset)
 842                 i915_gem_chipset_flush(ring->dev);
 843
 844         if (flush_domains & I915_GEM_DOMAIN_GTT)
 845                 wmb();
 846
 847         /* Unconditionally invalidate gpu caches and ensure that we do flush
 848          * any residual writes from the previous batch.
 849          */
 850         return intel_ring_invalidate_all_caches(ring);
 851 }
 852
 853 static bool
 854 i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
 855 {
 856         if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
 857                 return false;
 858
 859         return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
 860 }
 861
 862 static int
 863 validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
 864                    int count)
 865 {
 866         int i;
 867         unsigned relocs_total = 0;
 868         unsigned relocs_max = UINT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
 869
 870         for (i = 0; i < count; i++) {
 871                 char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
 872                 int length; /* limited by fault_in_pages_readable() */
 873
 874                 if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
 875                         return -EINVAL;
 876
 877                 /* First check for malicious input causing overflow in
 878                  * the worst case where we need to allocate the entire
 879                  * relocation tree as a single array.
 880                  */
 881                 if (exec[i].relocation_count > relocs_max - relocs_total)
 882                         return -EINVAL;
 883                 relocs_total += exec[i].relocation_count;
 884
 885                 length = exec[i].relocation_count *
 886                         sizeof(struct drm_i915_gem_relocation_entry);
 887                 /*
 888                  * We must check that the entire relocation array is safe
 889                  * to read, but since we may need to update the presumed
 890                  * offsets during execution, check for full write access.
 891                  */
 892                 if (!access_ok(VERIFY_WRITE, ptr, length))
 893                         return -EFAULT;
 894
 895                 if (likely(!i915_prefault_disable)) {
 896                         if (fault_in_multipages_readable(ptr, length))
 897                                 return -EFAULT;
 898                 }
 899         }
 900
 901         return 0;
 902 }
 903
 904 static void
 905 i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 906                                    struct intel_ring_buffer *ring)
 907 {
 908         struct i915_vma *vma;
 909
 910         list_for_each_entry(vma, vmas, exec_list) {
 911                 struct drm_i915_gem_object *obj = vma->obj;
 912                 u32 old_read = obj->base.read_domains;
 913                 u32 old_write = obj->base.write_domain;
 914
 915                 obj->base.write_domain = obj->base.pending_write_domain;
 916                 if (obj->base.write_domain == 0)
 917                         obj->base.pending_read_domains |= obj->base.read_domains;
 918                 obj->base.read_domains = obj->base.pending_read_domains;
 919                 obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
 920
 921                 i915_vma_move_to_active(vma, ring);
 922                 if (obj->base.write_domain) {
 923                         obj->dirty = 1;
 924                         obj->last_write_seqno = intel_ring_get_seqno(ring);
 925                         if (obj->pin_count) /* check for potential scanout */
 926                                 intel_mark_fb_busy(obj, ring);
 927                 }
 928
 929                 trace_i915_gem_object_change_domain(obj, old_read, old_write);
 930         }
 931 }
 932
 933 static void
 934 i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 935                                     struct drm_file *file,
 936                                     struct intel_ring_buffer *ring,
 937                                     struct drm_i915_gem_object *obj)
 938 {
 939         /* Unconditionally force add_request to emit a full flush. */
 940         ring->gpu_caches_dirty = true;
 941
 942         /* Add a breadcrumb for the completion of the batch buffer */
 943         (void)__i915_add_request(ring, file, obj, NULL);
 944 }
 945
 946 static int
 947 i915_reset_gen7_sol_offsets(struct drm_device *dev,
 948                             struct intel_ring_buffer *ring)
 949 {
 950         drm_i915_private_t *dev_priv = dev->dev_private;
 951         int ret, i;
 952
 953         if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
 954                 return 0;
 955
 956         ret = intel_ring_begin(ring, 4 * 3);
 957         if (ret)
 958                 return ret;
 959
 960         for (i = 0; i < 4; i++) {
 961                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
 962                 intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
 963                 intel_ring_emit(ring, 0);
 964         }
 965
 966         intel_ring_advance(ring);
 967
 968         return 0;
 969 }
 970
 971 static int
 972 i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 973                        struct drm_file *file,
 974                        struct drm_i915_gem_execbuffer2 *args,
 975                        struct drm_i915_gem_exec_object2 *exec,
 976                        struct i915_address_space *vm)
 977 {
 978         drm_i915_private_t *dev_priv = dev->dev_private;
 979         struct eb_vmas *eb;
 980         struct drm_i915_gem_object *batch_obj;
 981         struct drm_clip_rect *cliprects = NULL;
 982         struct intel_ring_buffer *ring;
 983         struct i915_ctx_hang_stats *hs;
 984         u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 985         u32 exec_start, exec_len;
 986         u32 mask, flags;
 987         int ret, mode, i;
 988         bool need_relocs;
 989
 990         if (!i915_gem_check_execbuffer(args))
 991                 return -EINVAL;
 992
 993         ret = validate_exec_list(exec, args->buffer_count);
 994         if (ret)
 995                 return ret;
 996
 997         flags = 0;
 998         if (args->flags & I915_EXEC_SECURE) {
 999                 if (!file->is_master || !capable(CAP_SYS_ADMIN))
1000                     return -EPERM;
1001
1002                 flags |= I915_DISPATCH_SECURE;
1003         }
1004         if (args->flags & I915_EXEC_IS_PINNED)
1005                 flags |= I915_DISPATCH_PINNED;
1006
1007         switch (args->flags & I915_EXEC_RING_MASK) {
1008         case I915_EXEC_DEFAULT:
1009         case I915_EXEC_RENDER:
1010                 ring = &dev_priv->ring[RCS];
1011                 break;
1012         case I915_EXEC_BSD:
1013                 ring = &dev_priv->ring[VCS];
1014                 if (ctx_id != DEFAULT_CONTEXT_ID) {
1015                         DRM_DEBUG("Ring %s doesn't support contexts\n",
1016                                   ring->name);
1017                         return -EPERM;
1018                 }
1019                 break;
1020         case I915_EXEC_BLT:
1021                 ring = &dev_priv->ring[BCS];
1022                 if (ctx_id != DEFAULT_CONTEXT_ID) {
1023                         DRM_DEBUG("Ring %s doesn't support contexts\n",
1024                                   ring->name);
1025                         return -EPERM;
1026                 }
1027                 break;
1028         case I915_EXEC_VEBOX:
1029                 ring = &dev_priv->ring[VECS];
1030                 if (ctx_id != DEFAULT_CONTEXT_ID) {
1031                         DRM_DEBUG("Ring %s doesn't support contexts\n",
1032                                   ring->name);
1033                         return -EPERM;
1034                 }
1035                 break;
1036
1037         default:
1038                 DRM_DEBUG("execbuf with unknown ring: %d\n",
1039                           (int)(args->flags & I915_EXEC_RING_MASK));
1040                 return -EINVAL;
1041         }
1042         if (!intel_ring_initialized(ring)) {
1043                 DRM_DEBUG("execbuf with invalid ring: %d\n",
1044                           (int)(args->flags & I915_EXEC_RING_MASK));
1045                 return -EINVAL;
1046         }
1047
1048         mode = args->flags & I915_EXEC_CONSTANTS_MASK;
1049         mask = I915_EXEC_CONSTANTS_MASK;
1050         switch (mode) {
1051         case I915_EXEC_CONSTANTS_REL_GENERAL:
1052         case I915_EXEC_CONSTANTS_ABSOLUTE:
1053         case I915_EXEC_CONSTANTS_REL_SURFACE:
1054                 if (ring == &dev_priv->ring[RCS] &&
1055                     mode != dev_priv->relative_constants_mode) {
1056                         if (INTEL_INFO(dev)->gen < 4)
1057                                 return -EINVAL;
1058
1059                         if (INTEL_INFO(dev)->gen > 5 &&
1060                             mode == I915_EXEC_CONSTANTS_REL_SURFACE)
1061                                 return -EINVAL;
1062
1063                         /* The HW changed the meaning on this bit on gen6 */
1064                         if (INTEL_INFO(dev)->gen >= 6)
1065                                 mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
1066                 }
1067                 break;
1068         default:
1069                 DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
1070                 return -EINVAL;
1071         }
1072
1073         if (args->buffer_count < 1) {
1074                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1075                 return -EINVAL;
1076         }
1077
1078         if (args->num_cliprects != 0) {
1079                 if (ring != &dev_priv->ring[RCS]) {
1080                         DRM_DEBUG("clip rectangles are only valid with the render ring\n");
1081                         return -EINVAL;
1082                 }
1083
1084                 if (INTEL_INFO(dev)->gen >= 5) {
1085                         DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
1086                         return -EINVAL;
1087                 }
1088
1089                 if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
1090                         DRM_DEBUG("execbuf with %u cliprects\n",
1091                                   args->num_cliprects);
1092                         return -EINVAL;
1093                 }
1094
1095                 cliprects = kcalloc(args->num_cliprects,
1096                                     sizeof(*cliprects),
1097                                     GFP_KERNEL);
1098                 if (cliprects == NULL) {
1099                         ret = -ENOMEM;
1100                         goto pre_mutex_err;
1101                 }
1102
1103                 if (copy_from_user(cliprects,
1104                                    to_user_ptr(args->cliprects_ptr),
1105                                    sizeof(*cliprects)*args->num_cliprects)) {
1106                         ret = -EFAULT;
1107                         goto pre_mutex_err;
1108                 }
1109         }
1110
1111         ret = i915_mutex_lock_interruptible(dev);
1112         if (ret)
1113                 goto pre_mutex_err;
1114
1115         if (dev_priv->ums.mm_suspended) {
1116                 mutex_unlock(&dev->struct_mutex);
1117                 ret = -EBUSY;
1118                 goto pre_mutex_err;
1119         }
1120
1121         eb = eb_create(args, vm);
1122         if (eb == NULL) {
1123                 mutex_unlock(&dev->struct_mutex);
1124                 ret = -ENOMEM;
1125                 goto pre_mutex_err;
1126         }
1127
1128         /* Look up object handles */
1129         ret = eb_lookup_vmas(eb, exec, args, vm, file);
1130         if (ret)
1131                 goto err;
1132
1133         /* take note of the batch buffer before we might reorder the lists */
1134         batch_obj = list_entry(eb->vmas.prev, struct i915_vma, exec_list)->obj;
1135
1136         /* Move the objects en-masse into the GTT, evicting if necessary. */
1137         need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
1138         ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
1139         if (ret)
1140                 goto err;
1141
1142         /* The objects are in their final locations, apply the relocations. */
1143         if (need_relocs)
1144                 ret = i915_gem_execbuffer_relocate(eb, vm);
1145         if (ret) {
1146                 if (ret == -EFAULT) {
1147                         ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
1148                                                                 eb, exec);
1149                         BUG_ON(!mutex_is_locked(&dev->struct_mutex));
1150                 }
1151                 if (ret)
1152                         goto err;
1153         }
1154
1155         /* Set the pending read domains for the batch buffer to COMMAND */
1156         if (batch_obj->base.pending_write_domain) {
1157                 DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
1158                 ret = -EINVAL;
1159                 goto err;
1160         }
1161         batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
1162
1163         /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
1164          * batch" bit. Hence we need to pin secure batches into the global gtt.
1165          * hsw should have this fixed, but bdw mucks it up again. */
1166         if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
1167                 i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
1168
1169         ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas);
1170         if (ret)
1171                 goto err;
1172
1173         hs = i915_gem_context_get_hang_stats(dev, file, ctx_id);
1174         if (IS_ERR(hs)) {
1175                 ret = PTR_ERR(hs);
1176                 goto err;
1177         }
1178
1179         if (hs->banned) {
1180                 ret = -EIO;
1181                 goto err;
1182         }
1183
1184         ret = i915_switch_context(ring, file, ctx_id);
1185         if (ret)
1186                 goto err;
1187
1188         if (ring == &dev_priv->ring[RCS] &&
1189             mode != dev_priv->relative_constants_mode) {
1190                 ret = intel_ring_begin(ring, 4);
1191                 if (ret)
1192                                 goto err;
1193
1194                 intel_ring_emit(ring, MI_NOOP);
1195                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
1196                 intel_ring_emit(ring, INSTPM);
1197                 intel_ring_emit(ring, mask << 16 | mode);
1198                 intel_ring_advance(ring);
1199
1200                 dev_priv->relative_constants_mode = mode;
1201         }
1202
1203         if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
1204                 ret = i915_reset_gen7_sol_offsets(dev, ring);
1205                 if (ret)
1206                         goto err;
1207         }
1208
1209         exec_start = i915_gem_obj_offset(batch_obj, vm) +
1210                 args->batch_start_offset;
1211         exec_len = args->batch_len;
1212         if (cliprects) {
1213                 for (i = 0; i < args->num_cliprects; i++) {
1214                         ret = i915_emit_box(dev, &cliprects[i],
1215                                             args->DR1, args->DR4);
1216                         if (ret)
1217                                 goto err;
1218
1219                         ret = ring->dispatch_execbuffer(ring,
1220                                                         exec_start, exec_len,
1221                                                         flags);
1222                         if (ret)
1223                                 goto err;
1224                 }
1225         } else {
1226                 ret = ring->dispatch_execbuffer(ring,
1227                                                 exec_start, exec_len,
1228                                                 flags);
1229                 if (ret)
1230                         goto err;
1231         }
1232
1233         trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
1234
1235         i915_gem_execbuffer_move_to_active(&eb->vmas, ring);
1236         i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
1237
1238 err:
1239         eb_destroy(eb);
1240
1241         mutex_unlock(&dev->struct_mutex);
1242
1243 pre_mutex_err:
1244         kfree(cliprects);
1245         return ret;
1246 }
1247
1248 /*
1249  * Legacy execbuffer just creates an exec2 list from the original exec object
1250  * list array and passes it to the real function.
1251  */
1252 int
1253 i915_gem_execbuffer(struct drm_device *dev, void *data,
1254                     struct drm_file *file)
1255 {
1256         struct drm_i915_private *dev_priv = dev->dev_private;
1257         struct drm_i915_gem_execbuffer *args = data;
1258         struct drm_i915_gem_execbuffer2 exec2;
1259         struct drm_i915_gem_exec_object *exec_list = NULL;
1260         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1261         int ret, i;
1262
1263         if (args->buffer_count < 1) {
1264                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1265                 return -EINVAL;
1266         }
1267
1268         /* Copy in the exec list from userland */
1269         exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
1270         exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
1271         if (exec_list == NULL || exec2_list == NULL) {
1272                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1273                           args->buffer_count);
1274                 drm_free_large(exec_list);
1275                 drm_free_large(exec2_list);
1276                 return -ENOMEM;
1277         }
1278         ret = copy_from_user(exec_list,
1279                              to_user_ptr(args->buffers_ptr),
1280                              sizeof(*exec_list) * args->buffer_count);
1281         if (ret != 0) {
1282                 DRM_DEBUG("copy %d exec entries failed %d\n",
1283                           args->buffer_count, ret);
1284                 drm_free_large(exec_list);
1285                 drm_free_large(exec2_list);
1286                 return -EFAULT;
1287         }
1288
1289         for (i = 0; i < args->buffer_count; i++) {
1290                 exec2_list[i].handle = exec_list[i].handle;
1291                 exec2_list[i].relocation_count = exec_list[i].relocation_count;
1292                 exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
1293                 exec2_list[i].alignment = exec_list[i].alignment;
1294                 exec2_list[i].offset = exec_list[i].offset;
1295                 if (INTEL_INFO(dev)->gen < 4)
1296                         exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
1297                 else
1298                         exec2_list[i].flags = 0;
1299         }
1300
1301         exec2.buffers_ptr = args->buffers_ptr;
1302         exec2.buffer_count = args->buffer_count;
1303         exec2.batch_start_offset = args->batch_start_offset;
1304         exec2.batch_len = args->batch_len;
1305         exec2.DR1 = args->DR1;
1306         exec2.DR4 = args->DR4;
1307         exec2.num_cliprects = args->num_cliprects;
1308         exec2.cliprects_ptr = args->cliprects_ptr;
1309         exec2.flags = I915_EXEC_RENDER;
1310         i915_execbuffer2_set_context_id(exec2, 0);
1311
1312         ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list,
1313                                      &dev_priv->gtt.base);
1314         if (!ret) {
1315                 /* Copy the new buffer offsets back to the user's exec list. */
1316                 for (i = 0; i < args->buffer_count; i++)
1317                         exec_list[i].offset = exec2_list[i].offset;
1318                 /* ... and back out to userspace */
1319                 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1320                                    exec_list,
1321                                    sizeof(*exec_list) * args->buffer_count);
1322                 if (ret) {
1323                         ret = -EFAULT;
1324                         DRM_DEBUG("failed to copy %d exec entries "
1325                                   "back to user (%d)\n",
1326                                   args->buffer_count, ret);
1327                 }
1328         }
1329
1330         drm_free_large(exec_list);
1331         drm_free_large(exec2_list);
1332         return ret;
1333 }
1334
1335 int
1336 i915_gem_execbuffer2(struct drm_device *dev, void *data,
1337                      struct drm_file *file)
1338 {
1339         struct drm_i915_private *dev_priv = dev->dev_private;
1340         struct drm_i915_gem_execbuffer2 *args = data;
1341         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1342         int ret;
1343
1344         if (args->buffer_count < 1 ||
1345             args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
1346                 DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
1347                 return -EINVAL;
1348         }
1349
1350         exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
1351                              GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
1352         if (exec2_list == NULL)
1353                 exec2_list = drm_malloc_ab(sizeof(*exec2_list),
1354                                            args->buffer_count);
1355         if (exec2_list == NULL) {
1356                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1357                           args->buffer_count);
1358                 return -ENOMEM;
1359         }
1360         ret = copy_from_user(exec2_list,
1361                              to_user_ptr(args->buffers_ptr),
1362                              sizeof(*exec2_list) * args->buffer_count);
1363         if (ret != 0) {
1364                 DRM_DEBUG("copy %d exec entries failed %d\n",
1365                           args->buffer_count, ret);
1366                 drm_free_large(exec2_list);
1367                 return -EFAULT;
1368         }
1369
1370         ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list,
1371                                      &dev_priv->gtt.base);
1372         if (!ret) {
1373                 /* Copy the new buffer offsets back to the user's exec list. */
1374                 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1375                                    exec2_list,
1376                                    sizeof(*exec2_list) * args->buffer_count);
1377                 if (ret) {
1378                         ret = -EFAULT;
1379                         DRM_DEBUG("failed to copy %d exec entries "
1380                                   "back to user (%d)\n",
1381                                   args->buffer_count, ret);
1382                 }
1383         }
1384
1385         drm_free_large(exec2_list);
1386         return ret;
1387 }