1d725d99963d97d6226489316360aa3c7397f278
[linux-drm-fsl-dcu.git] / arch / x86 / pci / acpi.c
1 #include <linux/pci.h>
2 #include <linux/acpi.h>
3 #include <linux/init.h>
4 #include <linux/irq.h>
5 #include <linux/dmi.h>
6 #include <linux/slab.h>
7 #include <asm/numa.h>
8 #include <asm/pci_x86.h>
9
10 struct pci_root_info {
11         struct acpi_device *bridge;
12         char name[16];
13         unsigned int res_num;
14         struct resource *res;
15         resource_size_t *res_offset;
16         struct pci_sysdata sd;
17 #ifdef  CONFIG_PCI_MMCONFIG
18         bool mcfg_added;
19         u16 segment;
20         u8 start_bus;
21         u8 end_bus;
22 #endif
23 };
24
25 static bool pci_use_crs = true;
26 static bool pci_ignore_seg = false;
27
28 static int __init set_use_crs(const struct dmi_system_id *id)
29 {
30         pci_use_crs = true;
31         return 0;
32 }
33
34 static int __init set_nouse_crs(const struct dmi_system_id *id)
35 {
36         pci_use_crs = false;
37         return 0;
38 }
39
40 static int __init set_ignore_seg(const struct dmi_system_id *id)
41 {
42         printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
43         pci_ignore_seg = true;
44         return 0;
45 }
46
47 static const struct dmi_system_id pci_crs_quirks[] __initconst = {
48         /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
49         {
50                 .callback = set_use_crs,
51                 .ident = "IBM System x3800",
52                 .matches = {
53                         DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
54                         DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
55                 },
56         },
57         /* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
58         /* 2006 AMD HT/VIA system with two host bridges */
59         {
60                 .callback = set_use_crs,
61                 .ident = "ASRock ALiveSATA2-GLAN",
62                 .matches = {
63                         DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
64                 },
65         },
66         /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
67         /* 2006 AMD HT/VIA system with two host bridges */
68         {
69                 .callback = set_use_crs,
70                 .ident = "ASUS M2V-MX SE",
71                 .matches = {
72                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
73                         DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
74                         DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
75                 },
76         },
77         /* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
78         {
79                 .callback = set_use_crs,
80                 .ident = "MSI MS-7253",
81                 .matches = {
82                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
83                         DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
84                         DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
85                 },
86         },
87
88         /* Now for the blacklist.. */
89
90         /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
91         {
92                 .callback = set_nouse_crs,
93                 .ident = "Dell Studio 1557",
94                 .matches = {
95                         DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
96                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
97                         DMI_MATCH(DMI_BIOS_VERSION, "A09"),
98                 },
99         },
100         /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
101         {
102                 .callback = set_nouse_crs,
103                 .ident = "Thinkpad SL510",
104                 .matches = {
105                         DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
106                         DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
107                         DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
108                 },
109         },
110
111         /* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
112         {
113                 .callback = set_ignore_seg,
114                 .ident = "HP xw9300",
115                 .matches = {
116                         DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
117                         DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
118                 },
119         },
120         {}
121 };
122
123 void __init pci_acpi_crs_quirks(void)
124 {
125         int year;
126
127         if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
128                 pci_use_crs = false;
129
130         dmi_check_system(pci_crs_quirks);
131
132         /*
133          * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
134          * takes precedence over anything we figured out above.
135          */
136         if (pci_probe & PCI_ROOT_NO_CRS)
137                 pci_use_crs = false;
138         else if (pci_probe & PCI_USE__CRS)
139                 pci_use_crs = true;
140
141         printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
142                "if necessary, use \"pci=%s\" and report a bug\n",
143                pci_use_crs ? "Using" : "Ignoring",
144                pci_use_crs ? "nocrs" : "use_crs");
145 }
146
147 #ifdef  CONFIG_PCI_MMCONFIG
148 static int check_segment(u16 seg, struct device *dev, char *estr)
149 {
150         if (seg) {
151                 dev_err(dev,
152                         "%s can't access PCI configuration "
153                         "space under this host bridge.\n",
154                         estr);
155                 return -EIO;
156         }
157
158         /*
159          * Failure in adding MMCFG information is not fatal,
160          * just can't access extended configuration space of
161          * devices under this host bridge.
162          */
163         dev_warn(dev,
164                  "%s can't access extended PCI configuration "
165                  "space under this bridge.\n",
166                  estr);
167
168         return 0;
169 }
170
171 static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
172                           u8 end, phys_addr_t addr)
173 {
174         int result;
175         struct device *dev = &info->bridge->dev;
176
177         info->start_bus = start;
178         info->end_bus = end;
179         info->mcfg_added = false;
180
181         /* return success if MMCFG is not in use */
182         if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
183                 return 0;
184
185         if (!(pci_probe & PCI_PROBE_MMCONF))
186                 return check_segment(seg, dev, "MMCONFIG is disabled,");
187
188         result = pci_mmconfig_insert(dev, seg, start, end, addr);
189         if (result == 0) {
190                 /* enable MMCFG if it hasn't been enabled yet */
191                 if (raw_pci_ext_ops == NULL)
192                         raw_pci_ext_ops = &pci_mmcfg;
193                 info->mcfg_added = true;
194         } else if (result != -EEXIST)
195                 return check_segment(seg, dev,
196                          "fail to add MMCONFIG information,");
197
198         return 0;
199 }
200
201 static void teardown_mcfg_map(struct pci_root_info *info)
202 {
203         if (info->mcfg_added) {
204                 pci_mmconfig_delete(info->segment, info->start_bus,
205                                     info->end_bus);
206                 info->mcfg_added = false;
207         }
208 }
209 #else
210 static int setup_mcfg_map(struct pci_root_info *info,
211                                     u16 seg, u8 start, u8 end,
212                                     phys_addr_t addr)
213 {
214         return 0;
215 }
216 static void teardown_mcfg_map(struct pci_root_info *info)
217 {
218 }
219 #endif
220
221 static acpi_status resource_to_addr(struct acpi_resource *resource,
222                                     struct acpi_resource_address64 *addr)
223 {
224         acpi_status status;
225         struct acpi_resource_memory24 *memory24;
226         struct acpi_resource_memory32 *memory32;
227         struct acpi_resource_fixed_memory32 *fixed_memory32;
228
229         memset(addr, 0, sizeof(*addr));
230         switch (resource->type) {
231         case ACPI_RESOURCE_TYPE_MEMORY24:
232                 memory24 = &resource->data.memory24;
233                 addr->resource_type = ACPI_MEMORY_RANGE;
234                 addr->address.minimum = memory24->minimum;
235                 addr->address.address_length = memory24->address_length;
236                 addr->address.maximum = addr->address.minimum + addr->address.address_length - 1;
237                 return AE_OK;
238         case ACPI_RESOURCE_TYPE_MEMORY32:
239                 memory32 = &resource->data.memory32;
240                 addr->resource_type = ACPI_MEMORY_RANGE;
241                 addr->address.minimum = memory32->minimum;
242                 addr->address.address_length = memory32->address_length;
243                 addr->address.maximum = addr->address.minimum + addr->address.address_length - 1;
244                 return AE_OK;
245         case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
246                 fixed_memory32 = &resource->data.fixed_memory32;
247                 addr->resource_type = ACPI_MEMORY_RANGE;
248                 addr->address.minimum = fixed_memory32->address;
249                 addr->address.address_length = fixed_memory32->address_length;
250                 addr->address.maximum = addr->address.minimum + addr->address.address_length - 1;
251                 return AE_OK;
252         case ACPI_RESOURCE_TYPE_ADDRESS16:
253         case ACPI_RESOURCE_TYPE_ADDRESS32:
254         case ACPI_RESOURCE_TYPE_ADDRESS64:
255                 status = acpi_resource_to_address64(resource, addr);
256                 if (ACPI_SUCCESS(status) &&
257                     (addr->resource_type == ACPI_MEMORY_RANGE ||
258                     addr->resource_type == ACPI_IO_RANGE) &&
259                     addr->address.address_length > 0) {
260                         return AE_OK;
261                 }
262                 break;
263         }
264         return AE_ERROR;
265 }
266
267 static acpi_status count_resource(struct acpi_resource *acpi_res, void *data)
268 {
269         struct pci_root_info *info = data;
270         struct acpi_resource_address64 addr;
271         acpi_status status;
272
273         status = resource_to_addr(acpi_res, &addr);
274         if (ACPI_SUCCESS(status))
275                 info->res_num++;
276         return AE_OK;
277 }
278
279 static acpi_status setup_resource(struct acpi_resource *acpi_res, void *data)
280 {
281         struct pci_root_info *info = data;
282         struct resource *res;
283         struct acpi_resource_address64 addr;
284         acpi_status status;
285         unsigned long flags;
286         u64 start, orig_end, end, res_end;
287
288         status = resource_to_addr(acpi_res, &addr);
289         if (!ACPI_SUCCESS(status))
290                 return AE_OK;
291
292         if (addr.resource_type == ACPI_MEMORY_RANGE) {
293                 flags = IORESOURCE_MEM;
294                 if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
295                         flags |= IORESOURCE_PREFETCH;
296                 res_end = (u64)iomem_resource.end;
297         } else if (addr.resource_type == ACPI_IO_RANGE) {
298                 flags = IORESOURCE_IO;
299                 res_end = (u64)ioport_resource.end;
300         } else
301                 return AE_OK;
302
303         start = addr.address.minimum + addr.address.translation_offset;
304         orig_end = end = addr.address.maximum + addr.address.translation_offset;
305
306         /* Exclude non-addressable range or non-addressable portion of range */
307         end = min(end, res_end);
308         if (end <= start) {
309                 dev_info(&info->bridge->dev,
310                         "host bridge window [%#llx-%#llx] "
311                         "(ignored, not CPU addressable)\n", start, orig_end);
312                 return AE_OK;
313         } else if (orig_end != end) {
314                 dev_info(&info->bridge->dev,
315                         "host bridge window [%#llx-%#llx] "
316                         "([%#llx-%#llx] ignored, not CPU addressable)\n", 
317                         start, orig_end, end + 1, orig_end);
318         }
319
320         res = &info->res[info->res_num];
321         res->name = info->name;
322         res->flags = flags;
323         res->start = start;
324         res->end = end;
325         info->res_offset[info->res_num] = addr.address.translation_offset;
326         info->res_num++;
327
328         if (!pci_use_crs)
329                 dev_printk(KERN_DEBUG, &info->bridge->dev,
330                            "host bridge window %pR (ignored)\n", res);
331
332         return AE_OK;
333 }
334
335 static void coalesce_windows(struct pci_root_info *info, unsigned long type)
336 {
337         int i, j;
338         struct resource *res1, *res2;
339
340         for (i = 0; i < info->res_num; i++) {
341                 res1 = &info->res[i];
342                 if (!(res1->flags & type))
343                         continue;
344
345                 for (j = i + 1; j < info->res_num; j++) {
346                         res2 = &info->res[j];
347                         if (!(res2->flags & type))
348                                 continue;
349
350                         /*
351                          * I don't like throwing away windows because then
352                          * our resources no longer match the ACPI _CRS, but
353                          * the kernel resource tree doesn't allow overlaps.
354                          */
355                         if (resource_overlaps(res1, res2)) {
356                                 res2->start = min(res1->start, res2->start);
357                                 res2->end = max(res1->end, res2->end);
358                                 dev_info(&info->bridge->dev,
359                                          "host bridge window expanded to %pR; %pR ignored\n",
360                                          res2, res1);
361                                 res1->flags = 0;
362                         }
363                 }
364         }
365 }
366
367 static void add_resources(struct pci_root_info *info,
368                           struct list_head *resources)
369 {
370         int i;
371         struct resource *res, *root, *conflict;
372
373         coalesce_windows(info, IORESOURCE_MEM);
374         coalesce_windows(info, IORESOURCE_IO);
375
376         for (i = 0; i < info->res_num; i++) {
377                 res = &info->res[i];
378
379                 if (res->flags & IORESOURCE_MEM)
380                         root = &iomem_resource;
381                 else if (res->flags & IORESOURCE_IO)
382                         root = &ioport_resource;
383                 else
384                         continue;
385
386                 conflict = insert_resource_conflict(root, res);
387                 if (conflict)
388                         dev_info(&info->bridge->dev,
389                                  "ignoring host bridge window %pR (conflicts with %s %pR)\n",
390                                  res, conflict->name, conflict);
391                 else
392                         pci_add_resource_offset(resources, res,
393                                         info->res_offset[i]);
394         }
395 }
396
397 static void free_pci_root_info_res(struct pci_root_info *info)
398 {
399         kfree(info->res);
400         info->res = NULL;
401         kfree(info->res_offset);
402         info->res_offset = NULL;
403         info->res_num = 0;
404 }
405
406 static void __release_pci_root_info(struct pci_root_info *info)
407 {
408         int i;
409         struct resource *res;
410
411         for (i = 0; i < info->res_num; i++) {
412                 res = &info->res[i];
413
414                 if (!res->parent)
415                         continue;
416
417                 if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
418                         continue;
419
420                 release_resource(res);
421         }
422
423         free_pci_root_info_res(info);
424
425         teardown_mcfg_map(info);
426
427         kfree(info);
428 }
429
430 static void release_pci_root_info(struct pci_host_bridge *bridge)
431 {
432         struct pci_root_info *info = bridge->release_data;
433
434         __release_pci_root_info(info);
435 }
436
437 static void probe_pci_root_info(struct pci_root_info *info,
438                                 struct acpi_device *device,
439                                 int busnum, int domain)
440 {
441         size_t size;
442
443         sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
444         info->bridge = device;
445
446         info->res_num = 0;
447         acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
448                                 info);
449         if (!info->res_num)
450                 return;
451
452         size = sizeof(*info->res) * info->res_num;
453         info->res = kzalloc_node(size, GFP_KERNEL, info->sd.node);
454         if (!info->res) {
455                 info->res_num = 0;
456                 return;
457         }
458
459         size = sizeof(*info->res_offset) * info->res_num;
460         info->res_num = 0;
461         info->res_offset = kzalloc_node(size, GFP_KERNEL, info->sd.node);
462         if (!info->res_offset) {
463                 kfree(info->res);
464                 info->res = NULL;
465                 return;
466         }
467
468         acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
469                                 info);
470 }
471
472 struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
473 {
474         struct acpi_device *device = root->device;
475         struct pci_root_info *info;
476         int domain = root->segment;
477         int busnum = root->secondary.start;
478         LIST_HEAD(resources);
479         struct pci_bus *bus;
480         struct pci_sysdata *sd;
481         int node;
482
483         if (pci_ignore_seg)
484                 domain = 0;
485
486         if (domain && !pci_domains_supported) {
487                 printk(KERN_WARNING "pci_bus %04x:%02x: "
488                        "ignored (multiple domains not supported)\n",
489                        domain, busnum);
490                 return NULL;
491         }
492
493         node = acpi_get_node(device->handle);
494         if (node == NUMA_NO_NODE) {
495                 node = x86_pci_root_bus_node(busnum);
496                 if (node != 0 && node != NUMA_NO_NODE)
497                         dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n",
498                                 node);
499         }
500
501         if (node != NUMA_NO_NODE && !node_online(node))
502                 node = NUMA_NO_NODE;
503
504         info = kzalloc_node(sizeof(*info), GFP_KERNEL, node);
505         if (!info) {
506                 printk(KERN_WARNING "pci_bus %04x:%02x: "
507                        "ignored (out of memory)\n", domain, busnum);
508                 return NULL;
509         }
510
511         sd = &info->sd;
512         sd->domain = domain;
513         sd->node = node;
514         sd->companion = device;
515
516         bus = pci_find_bus(domain, busnum);
517         if (bus) {
518                 /*
519                  * If the desired bus has been scanned already, replace
520                  * its bus->sysdata.
521                  */
522                 memcpy(bus->sysdata, sd, sizeof(*sd));
523                 kfree(info);
524         } else {
525                 probe_pci_root_info(info, device, busnum, domain);
526
527                 /* insert busn res at first */
528                 pci_add_resource(&resources,  &root->secondary);
529                 /*
530                  * _CRS with no apertures is normal, so only fall back to
531                  * defaults or native bridge info if we're ignoring _CRS.
532                  */
533                 if (pci_use_crs)
534                         add_resources(info, &resources);
535                 else {
536                         free_pci_root_info_res(info);
537                         x86_pci_root_bus_resources(busnum, &resources);
538                 }
539
540                 if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
541                                     (u8)root->secondary.end, root->mcfg_addr))
542                         bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
543                                                   sd, &resources);
544
545                 if (bus) {
546                         pci_scan_child_bus(bus);
547                         pci_set_host_bridge_release(
548                                 to_pci_host_bridge(bus->bridge),
549                                 release_pci_root_info, info);
550                 } else {
551                         pci_free_resource_list(&resources);
552                         __release_pci_root_info(info);
553                 }
554         }
555
556         /* After the PCI-E bus has been walked and all devices discovered,
557          * configure any settings of the fabric that might be necessary.
558          */
559         if (bus) {
560                 struct pci_bus *child;
561                 list_for_each_entry(child, &bus->children, node)
562                         pcie_bus_configure_settings(child);
563         }
564
565         if (bus && node != NUMA_NO_NODE)
566                 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
567
568         return bus;
569 }
570
571 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
572 {
573         struct pci_sysdata *sd = bridge->bus->sysdata;
574
575         ACPI_COMPANION_SET(&bridge->dev, sd->companion);
576         return 0;
577 }
578
579 int __init pci_acpi_init(void)
580 {
581         struct pci_dev *dev = NULL;
582
583         if (acpi_noirq)
584                 return -ENODEV;
585
586         printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
587         acpi_irq_penalty_init();
588         pcibios_enable_irq = acpi_pci_irq_enable;
589         pcibios_disable_irq = acpi_pci_irq_disable;
590         x86_init.pci.init_irq = x86_init_noop;
591
592         if (pci_routeirq) {
593                 /*
594                  * PCI IRQ routing is set up by pci_enable_device(), but we
595                  * also do it here in case there are still broken drivers that
596                  * don't use pci_enable_device().
597                  */
598                 printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
599                 for_each_pci_dev(dev)
600                         acpi_pci_irq_enable(dev);
601         }
602
603         return 0;
604 }