MIPS: Remove asm/user.h
[linux-drm-fsl-dcu.git] / arch / mips / kernel / ptrace.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992 Ross Biro
7  * Copyright (C) Linus Torvalds
8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9  * Copyright (C) 1996 David S. Miller
10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11  * Copyright (C) 1999 MIPS Technologies, Inc.
12  * Copyright (C) 2000 Ulf Carlsson
13  *
14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15  * binaries.
16  */
17 #include <linux/compiler.h>
18 #include <linux/context_tracking.h>
19 #include <linux/elf.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/mm.h>
23 #include <linux/errno.h>
24 #include <linux/ptrace.h>
25 #include <linux/regset.h>
26 #include <linux/smp.h>
27 #include <linux/security.h>
28 #include <linux/tracehook.h>
29 #include <linux/audit.h>
30 #include <linux/seccomp.h>
31 #include <linux/ftrace.h>
32
33 #include <asm/byteorder.h>
34 #include <asm/cpu.h>
35 #include <asm/dsp.h>
36 #include <asm/fpu.h>
37 #include <asm/mipsregs.h>
38 #include <asm/mipsmtregs.h>
39 #include <asm/pgtable.h>
40 #include <asm/page.h>
41 #include <asm/syscall.h>
42 #include <asm/uaccess.h>
43 #include <asm/bootinfo.h>
44 #include <asm/reg.h>
45
46 #define CREATE_TRACE_POINTS
47 #include <trace/events/syscalls.h>
48
49 /*
50  * Called by kernel/ptrace.c when detaching..
51  *
52  * Make sure single step bits etc are not set.
53  */
54 void ptrace_disable(struct task_struct *child)
55 {
56         /* Don't load the watchpoint registers for the ex-child. */
57         clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
58 }
59
60 /*
61  * Read a general register set.  We always use the 64-bit format, even
62  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
63  * Registers are sign extended to fill the available space.
64  */
65 int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
66 {
67         struct pt_regs *regs;
68         int i;
69
70         if (!access_ok(VERIFY_WRITE, data, 38 * 8))
71                 return -EIO;
72
73         regs = task_pt_regs(child);
74
75         for (i = 0; i < 32; i++)
76                 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
77         __put_user((long)regs->lo, (__s64 __user *)&data->lo);
78         __put_user((long)regs->hi, (__s64 __user *)&data->hi);
79         __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
80         __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
81         __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
82         __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
83
84         return 0;
85 }
86
87 /*
88  * Write a general register set.  As for PTRACE_GETREGS, we always use
89  * the 64-bit format.  On a 32-bit kernel only the lower order half
90  * (according to endianness) will be used.
91  */
92 int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
93 {
94         struct pt_regs *regs;
95         int i;
96
97         if (!access_ok(VERIFY_READ, data, 38 * 8))
98                 return -EIO;
99
100         regs = task_pt_regs(child);
101
102         for (i = 0; i < 32; i++)
103                 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
104         __get_user(regs->lo, (__s64 __user *)&data->lo);
105         __get_user(regs->hi, (__s64 __user *)&data->hi);
106         __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
107
108         /* badvaddr, status, and cause may not be written.  */
109
110         return 0;
111 }
112
113 int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
114 {
115         int i;
116
117         if (!access_ok(VERIFY_WRITE, data, 33 * 8))
118                 return -EIO;
119
120         if (tsk_used_math(child)) {
121                 union fpureg *fregs = get_fpu_regs(child);
122                 for (i = 0; i < 32; i++)
123                         __put_user(get_fpr64(&fregs[i], 0),
124                                    i + (__u64 __user *)data);
125         } else {
126                 for (i = 0; i < 32; i++)
127                         __put_user((__u64) -1, i + (__u64 __user *) data);
128         }
129
130         __put_user(child->thread.fpu.fcr31, data + 64);
131         __put_user(boot_cpu_data.fpu_id, data + 65);
132
133         return 0;
134 }
135
136 int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
137 {
138         union fpureg *fregs;
139         u64 fpr_val;
140         int i;
141
142         if (!access_ok(VERIFY_READ, data, 33 * 8))
143                 return -EIO;
144
145         fregs = get_fpu_regs(child);
146
147         for (i = 0; i < 32; i++) {
148                 __get_user(fpr_val, i + (__u64 __user *)data);
149                 set_fpr64(&fregs[i], 0, fpr_val);
150         }
151
152         __get_user(child->thread.fpu.fcr31, data + 64);
153
154         /* FIR may not be written.  */
155
156         return 0;
157 }
158
159 int ptrace_get_watch_regs(struct task_struct *child,
160                           struct pt_watch_regs __user *addr)
161 {
162         enum pt_watch_style style;
163         int i;
164
165         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
166                 return -EIO;
167         if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
168                 return -EIO;
169
170 #ifdef CONFIG_32BIT
171         style = pt_watch_style_mips32;
172 #define WATCH_STYLE mips32
173 #else
174         style = pt_watch_style_mips64;
175 #define WATCH_STYLE mips64
176 #endif
177
178         __put_user(style, &addr->style);
179         __put_user(boot_cpu_data.watch_reg_use_cnt,
180                    &addr->WATCH_STYLE.num_valid);
181         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
182                 __put_user(child->thread.watch.mips3264.watchlo[i],
183                            &addr->WATCH_STYLE.watchlo[i]);
184                 __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
185                            &addr->WATCH_STYLE.watchhi[i]);
186                 __put_user(boot_cpu_data.watch_reg_masks[i],
187                            &addr->WATCH_STYLE.watch_masks[i]);
188         }
189         for (; i < 8; i++) {
190                 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
191                 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
192                 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
193         }
194
195         return 0;
196 }
197
198 int ptrace_set_watch_regs(struct task_struct *child,
199                           struct pt_watch_regs __user *addr)
200 {
201         int i;
202         int watch_active = 0;
203         unsigned long lt[NUM_WATCH_REGS];
204         u16 ht[NUM_WATCH_REGS];
205
206         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
207                 return -EIO;
208         if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
209                 return -EIO;
210         /* Check the values. */
211         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
212                 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
213 #ifdef CONFIG_32BIT
214                 if (lt[i] & __UA_LIMIT)
215                         return -EINVAL;
216 #else
217                 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
218                         if (lt[i] & 0xffffffff80000000UL)
219                                 return -EINVAL;
220                 } else {
221                         if (lt[i] & __UA_LIMIT)
222                                 return -EINVAL;
223                 }
224 #endif
225                 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
226                 if (ht[i] & ~0xff8)
227                         return -EINVAL;
228         }
229         /* Install them. */
230         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
231                 if (lt[i] & 7)
232                         watch_active = 1;
233                 child->thread.watch.mips3264.watchlo[i] = lt[i];
234                 /* Set the G bit. */
235                 child->thread.watch.mips3264.watchhi[i] = ht[i];
236         }
237
238         if (watch_active)
239                 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
240         else
241                 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
242
243         return 0;
244 }
245
246 /* regset get/set implementations */
247
248 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
249
250 static int gpr32_get(struct task_struct *target,
251                      const struct user_regset *regset,
252                      unsigned int pos, unsigned int count,
253                      void *kbuf, void __user *ubuf)
254 {
255         struct pt_regs *regs = task_pt_regs(target);
256         u32 uregs[ELF_NGREG] = {};
257         unsigned i;
258
259         for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
260                 /* k0/k1 are copied as zero. */
261                 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
262                         continue;
263
264                 uregs[i] = regs->regs[i - MIPS32_EF_R0];
265         }
266
267         uregs[MIPS32_EF_LO] = regs->lo;
268         uregs[MIPS32_EF_HI] = regs->hi;
269         uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
270         uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
271         uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
272         uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
273
274         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
275                                    sizeof(uregs));
276 }
277
278 static int gpr32_set(struct task_struct *target,
279                      const struct user_regset *regset,
280                      unsigned int pos, unsigned int count,
281                      const void *kbuf, const void __user *ubuf)
282 {
283         struct pt_regs *regs = task_pt_regs(target);
284         u32 uregs[ELF_NGREG];
285         unsigned start, num_regs, i;
286         int err;
287
288         start = pos / sizeof(u32);
289         num_regs = count / sizeof(u32);
290
291         if (start + num_regs > ELF_NGREG)
292                 return -EIO;
293
294         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
295                                  sizeof(uregs));
296         if (err)
297                 return err;
298
299         for (i = start; i < num_regs; i++) {
300                 /*
301                  * Cast all values to signed here so that if this is a 64-bit
302                  * kernel, the supplied 32-bit values will be sign extended.
303                  */
304                 switch (i) {
305                 case MIPS32_EF_R1 ... MIPS32_EF_R25:
306                         /* k0/k1 are ignored. */
307                 case MIPS32_EF_R28 ... MIPS32_EF_R31:
308                         regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
309                         break;
310                 case MIPS32_EF_LO:
311                         regs->lo = (s32)uregs[i];
312                         break;
313                 case MIPS32_EF_HI:
314                         regs->hi = (s32)uregs[i];
315                         break;
316                 case MIPS32_EF_CP0_EPC:
317                         regs->cp0_epc = (s32)uregs[i];
318                         break;
319                 }
320         }
321
322         return 0;
323 }
324
325 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
326
327 #ifdef CONFIG_64BIT
328
329 static int gpr64_get(struct task_struct *target,
330                      const struct user_regset *regset,
331                      unsigned int pos, unsigned int count,
332                      void *kbuf, void __user *ubuf)
333 {
334         struct pt_regs *regs = task_pt_regs(target);
335         u64 uregs[ELF_NGREG] = {};
336         unsigned i;
337
338         for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
339                 /* k0/k1 are copied as zero. */
340                 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
341                         continue;
342
343                 uregs[i] = regs->regs[i - MIPS64_EF_R0];
344         }
345
346         uregs[MIPS64_EF_LO] = regs->lo;
347         uregs[MIPS64_EF_HI] = regs->hi;
348         uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
349         uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
350         uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
351         uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
352
353         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
354                                    sizeof(uregs));
355 }
356
357 static int gpr64_set(struct task_struct *target,
358                      const struct user_regset *regset,
359                      unsigned int pos, unsigned int count,
360                      const void *kbuf, const void __user *ubuf)
361 {
362         struct pt_regs *regs = task_pt_regs(target);
363         u64 uregs[ELF_NGREG];
364         unsigned start, num_regs, i;
365         int err;
366
367         start = pos / sizeof(u64);
368         num_regs = count / sizeof(u64);
369
370         if (start + num_regs > ELF_NGREG)
371                 return -EIO;
372
373         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
374                                  sizeof(uregs));
375         if (err)
376                 return err;
377
378         for (i = start; i < num_regs; i++) {
379                 switch (i) {
380                 case MIPS64_EF_R1 ... MIPS64_EF_R25:
381                         /* k0/k1 are ignored. */
382                 case MIPS64_EF_R28 ... MIPS64_EF_R31:
383                         regs->regs[i - MIPS64_EF_R0] = uregs[i];
384                         break;
385                 case MIPS64_EF_LO:
386                         regs->lo = uregs[i];
387                         break;
388                 case MIPS64_EF_HI:
389                         regs->hi = uregs[i];
390                         break;
391                 case MIPS64_EF_CP0_EPC:
392                         regs->cp0_epc = uregs[i];
393                         break;
394                 }
395         }
396
397         return 0;
398 }
399
400 #endif /* CONFIG_64BIT */
401
402 static int fpr_get(struct task_struct *target,
403                    const struct user_regset *regset,
404                    unsigned int pos, unsigned int count,
405                    void *kbuf, void __user *ubuf)
406 {
407         unsigned i;
408         int err;
409         u64 fpr_val;
410
411         /* XXX fcr31  */
412
413         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
414                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
415                                            &target->thread.fpu,
416                                            0, sizeof(elf_fpregset_t));
417
418         for (i = 0; i < NUM_FPU_REGS; i++) {
419                 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
420                 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
421                                           &fpr_val, i * sizeof(elf_fpreg_t),
422                                           (i + 1) * sizeof(elf_fpreg_t));
423                 if (err)
424                         return err;
425         }
426
427         return 0;
428 }
429
430 static int fpr_set(struct task_struct *target,
431                    const struct user_regset *regset,
432                    unsigned int pos, unsigned int count,
433                    const void *kbuf, const void __user *ubuf)
434 {
435         unsigned i;
436         int err;
437         u64 fpr_val;
438
439         /* XXX fcr31  */
440
441         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
442                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
443                                           &target->thread.fpu,
444                                           0, sizeof(elf_fpregset_t));
445
446         for (i = 0; i < NUM_FPU_REGS; i++) {
447                 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
448                                          &fpr_val, i * sizeof(elf_fpreg_t),
449                                          (i + 1) * sizeof(elf_fpreg_t));
450                 if (err)
451                         return err;
452                 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
453         }
454
455         return 0;
456 }
457
458 enum mips_regset {
459         REGSET_GPR,
460         REGSET_FPR,
461 };
462
463 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
464
465 static const struct user_regset mips_regsets[] = {
466         [REGSET_GPR] = {
467                 .core_note_type = NT_PRSTATUS,
468                 .n              = ELF_NGREG,
469                 .size           = sizeof(unsigned int),
470                 .align          = sizeof(unsigned int),
471                 .get            = gpr32_get,
472                 .set            = gpr32_set,
473         },
474         [REGSET_FPR] = {
475                 .core_note_type = NT_PRFPREG,
476                 .n              = ELF_NFPREG,
477                 .size           = sizeof(elf_fpreg_t),
478                 .align          = sizeof(elf_fpreg_t),
479                 .get            = fpr_get,
480                 .set            = fpr_set,
481         },
482 };
483
484 static const struct user_regset_view user_mips_view = {
485         .name           = "mips",
486         .e_machine      = ELF_ARCH,
487         .ei_osabi       = ELF_OSABI,
488         .regsets        = mips_regsets,
489         .n              = ARRAY_SIZE(mips_regsets),
490 };
491
492 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
493
494 #ifdef CONFIG_64BIT
495
496 static const struct user_regset mips64_regsets[] = {
497         [REGSET_GPR] = {
498                 .core_note_type = NT_PRSTATUS,
499                 .n              = ELF_NGREG,
500                 .size           = sizeof(unsigned long),
501                 .align          = sizeof(unsigned long),
502                 .get            = gpr64_get,
503                 .set            = gpr64_set,
504         },
505         [REGSET_FPR] = {
506                 .core_note_type = NT_PRFPREG,
507                 .n              = ELF_NFPREG,
508                 .size           = sizeof(elf_fpreg_t),
509                 .align          = sizeof(elf_fpreg_t),
510                 .get            = fpr_get,
511                 .set            = fpr_set,
512         },
513 };
514
515 static const struct user_regset_view user_mips64_view = {
516         .name           = "mips64",
517         .e_machine      = ELF_ARCH,
518         .ei_osabi       = ELF_OSABI,
519         .regsets        = mips64_regsets,
520         .n              = ARRAY_SIZE(mips64_regsets),
521 };
522
523 #endif /* CONFIG_64BIT */
524
525 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
526 {
527 #ifdef CONFIG_32BIT
528         return &user_mips_view;
529 #else
530 #ifdef CONFIG_MIPS32_O32
531         if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
532                 return &user_mips_view;
533 #endif
534         return &user_mips64_view;
535 #endif
536 }
537
538 long arch_ptrace(struct task_struct *child, long request,
539                  unsigned long addr, unsigned long data)
540 {
541         int ret;
542         void __user *addrp = (void __user *) addr;
543         void __user *datavp = (void __user *) data;
544         unsigned long __user *datalp = (void __user *) data;
545
546         switch (request) {
547         /* when I and D space are separate, these will need to be fixed. */
548         case PTRACE_PEEKTEXT: /* read word at location addr. */
549         case PTRACE_PEEKDATA:
550                 ret = generic_ptrace_peekdata(child, addr, data);
551                 break;
552
553         /* Read the word at location addr in the USER area. */
554         case PTRACE_PEEKUSR: {
555                 struct pt_regs *regs;
556                 union fpureg *fregs;
557                 unsigned long tmp = 0;
558
559                 regs = task_pt_regs(child);
560                 ret = 0;  /* Default return value. */
561
562                 switch (addr) {
563                 case 0 ... 31:
564                         tmp = regs->regs[addr];
565                         break;
566                 case FPR_BASE ... FPR_BASE + 31:
567                         if (!tsk_used_math(child)) {
568                                 /* FP not yet used */
569                                 tmp = -1;
570                                 break;
571                         }
572                         fregs = get_fpu_regs(child);
573
574 #ifdef CONFIG_32BIT
575                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
576                                 /*
577                                  * The odd registers are actually the high
578                                  * order bits of the values stored in the even
579                                  * registers - unless we're using r2k_switch.S.
580                                  */
581                                 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
582                                                 addr & 1);
583                                 break;
584                         }
585 #endif
586                         tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
587                         break;
588                 case PC:
589                         tmp = regs->cp0_epc;
590                         break;
591                 case CAUSE:
592                         tmp = regs->cp0_cause;
593                         break;
594                 case BADVADDR:
595                         tmp = regs->cp0_badvaddr;
596                         break;
597                 case MMHI:
598                         tmp = regs->hi;
599                         break;
600                 case MMLO:
601                         tmp = regs->lo;
602                         break;
603 #ifdef CONFIG_CPU_HAS_SMARTMIPS
604                 case ACX:
605                         tmp = regs->acx;
606                         break;
607 #endif
608                 case FPC_CSR:
609                         tmp = child->thread.fpu.fcr31;
610                         break;
611                 case FPC_EIR:
612                         /* implementation / version register */
613                         tmp = boot_cpu_data.fpu_id;
614                         break;
615                 case DSP_BASE ... DSP_BASE + 5: {
616                         dspreg_t *dregs;
617
618                         if (!cpu_has_dsp) {
619                                 tmp = 0;
620                                 ret = -EIO;
621                                 goto out;
622                         }
623                         dregs = __get_dsp_regs(child);
624                         tmp = (unsigned long) (dregs[addr - DSP_BASE]);
625                         break;
626                 }
627                 case DSP_CONTROL:
628                         if (!cpu_has_dsp) {
629                                 tmp = 0;
630                                 ret = -EIO;
631                                 goto out;
632                         }
633                         tmp = child->thread.dsp.dspcontrol;
634                         break;
635                 default:
636                         tmp = 0;
637                         ret = -EIO;
638                         goto out;
639                 }
640                 ret = put_user(tmp, datalp);
641                 break;
642         }
643
644         /* when I and D space are separate, this will have to be fixed. */
645         case PTRACE_POKETEXT: /* write the word at location addr. */
646         case PTRACE_POKEDATA:
647                 ret = generic_ptrace_pokedata(child, addr, data);
648                 break;
649
650         case PTRACE_POKEUSR: {
651                 struct pt_regs *regs;
652                 ret = 0;
653                 regs = task_pt_regs(child);
654
655                 switch (addr) {
656                 case 0 ... 31:
657                         regs->regs[addr] = data;
658                         break;
659                 case FPR_BASE ... FPR_BASE + 31: {
660                         union fpureg *fregs = get_fpu_regs(child);
661
662                         if (!tsk_used_math(child)) {
663                                 /* FP not yet used  */
664                                 memset(&child->thread.fpu, ~0,
665                                        sizeof(child->thread.fpu));
666                                 child->thread.fpu.fcr31 = 0;
667                         }
668 #ifdef CONFIG_32BIT
669                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
670                                 /*
671                                  * The odd registers are actually the high
672                                  * order bits of the values stored in the even
673                                  * registers - unless we're using r2k_switch.S.
674                                  */
675                                 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
676                                           addr & 1, data);
677                                 break;
678                         }
679 #endif
680                         set_fpr64(&fregs[addr - FPR_BASE], 0, data);
681                         break;
682                 }
683                 case PC:
684                         regs->cp0_epc = data;
685                         break;
686                 case MMHI:
687                         regs->hi = data;
688                         break;
689                 case MMLO:
690                         regs->lo = data;
691                         break;
692 #ifdef CONFIG_CPU_HAS_SMARTMIPS
693                 case ACX:
694                         regs->acx = data;
695                         break;
696 #endif
697                 case FPC_CSR:
698                         child->thread.fpu.fcr31 = data;
699                         break;
700                 case DSP_BASE ... DSP_BASE + 5: {
701                         dspreg_t *dregs;
702
703                         if (!cpu_has_dsp) {
704                                 ret = -EIO;
705                                 break;
706                         }
707
708                         dregs = __get_dsp_regs(child);
709                         dregs[addr - DSP_BASE] = data;
710                         break;
711                 }
712                 case DSP_CONTROL:
713                         if (!cpu_has_dsp) {
714                                 ret = -EIO;
715                                 break;
716                         }
717                         child->thread.dsp.dspcontrol = data;
718                         break;
719                 default:
720                         /* The rest are not allowed. */
721                         ret = -EIO;
722                         break;
723                 }
724                 break;
725                 }
726
727         case PTRACE_GETREGS:
728                 ret = ptrace_getregs(child, datavp);
729                 break;
730
731         case PTRACE_SETREGS:
732                 ret = ptrace_setregs(child, datavp);
733                 break;
734
735         case PTRACE_GETFPREGS:
736                 ret = ptrace_getfpregs(child, datavp);
737                 break;
738
739         case PTRACE_SETFPREGS:
740                 ret = ptrace_setfpregs(child, datavp);
741                 break;
742
743         case PTRACE_GET_THREAD_AREA:
744                 ret = put_user(task_thread_info(child)->tp_value, datalp);
745                 break;
746
747         case PTRACE_GET_WATCH_REGS:
748                 ret = ptrace_get_watch_regs(child, addrp);
749                 break;
750
751         case PTRACE_SET_WATCH_REGS:
752                 ret = ptrace_set_watch_regs(child, addrp);
753                 break;
754
755         default:
756                 ret = ptrace_request(child, request, addr, data);
757                 break;
758         }
759  out:
760         return ret;
761 }
762
763 /*
764  * Notification of system call entry/exit
765  * - triggered by current->work.syscall_trace
766  */
767 asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
768 {
769         long ret = 0;
770         user_exit();
771
772         if (secure_computing(syscall) == -1)
773                 return -1;
774
775         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
776             tracehook_report_syscall_entry(regs))
777                 ret = -1;
778
779         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
780                 trace_sys_enter(regs, regs->regs[2]);
781
782         audit_syscall_entry(syscall_get_arch(),
783                             syscall,
784                             regs->regs[4], regs->regs[5],
785                             regs->regs[6], regs->regs[7]);
786         return syscall;
787 }
788
789 /*
790  * Notification of system call entry/exit
791  * - triggered by current->work.syscall_trace
792  */
793 asmlinkage void syscall_trace_leave(struct pt_regs *regs)
794 {
795         /*
796          * We may come here right after calling schedule_user()
797          * or do_notify_resume(), in which case we can be in RCU
798          * user mode.
799          */
800         user_exit();
801
802         audit_syscall_exit(regs);
803
804         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
805                 trace_sys_exit(regs, regs->regs[2]);
806
807         if (test_thread_flag(TIF_SYSCALL_TRACE))
808                 tracehook_report_syscall_exit(regs, 0);
809
810         user_enter();
811 }