regmap-mmio: Use native endianness for read/write
[linux-drm-fsl-dcu.git] / arch / mips / boot / dts / brcm / bcm7346.dtsi
1 / {
2         #address-cells = <1>;
3         #size-cells = <1>;
4         compatible = "brcm,bcm7346";
5
6         cpus {
7                 #address-cells = <1>;
8                 #size-cells = <0>;
9
10                 mips-hpt-frequency = <163125000>;
11
12                 cpu@0 {
13                         compatible = "brcm,bmips5000";
14                         device_type = "cpu";
15                         reg = <0>;
16                 };
17
18                 cpu@1 {
19                         compatible = "brcm,bmips5000";
20                         device_type = "cpu";
21                         reg = <1>;
22                 };
23         };
24
25         aliases {
26                 uart0 = &uart0;
27                 uart1 = &uart1;
28                 uart2 = &uart2;
29         };
30
31         cpu_intc: cpu_intc {
32                 #address-cells = <0>;
33                 compatible = "mti,cpu-interrupt-controller";
34
35                 interrupt-controller;
36                 #interrupt-cells = <1>;
37         };
38
39         clocks {
40                 uart_clk: uart_clk {
41                         compatible = "fixed-clock";
42                         #clock-cells = <0>;
43                         clock-frequency = <81000000>;
44                 };
45         };
46
47         rdb {
48                 #address-cells = <1>;
49                 #size-cells = <1>;
50
51                 compatible = "simple-bus";
52                 ranges = <0 0x10000000 0x01000000>;
53
54                 periph_intc: periph_intc@411400 {
55                         compatible = "brcm,bcm7038-l1-intc";
56                         reg = <0x411400 0x30>, <0x411600 0x30>;
57
58                         interrupt-controller;
59                         #interrupt-cells = <1>;
60
61                         interrupt-parent = <&cpu_intc>;
62                         interrupts = <2>, <3>;
63                 };
64
65                 sun_l2_intc: sun_l2_intc@403000 {
66                         compatible = "brcm,l2-intc";
67                         reg = <0x403000 0x30>;
68                         interrupt-controller;
69                         #interrupt-cells = <1>;
70                         interrupt-parent = <&periph_intc>;
71                         interrupts = <51>;
72                 };
73
74                 gisb-arb@400000 {
75                         compatible = "brcm,bcm7400-gisb-arb";
76                         reg = <0x400000 0xdc>;
77                         native-endian;
78                         interrupt-parent = <&sun_l2_intc>;
79                         interrupts = <0>, <2>;
80                         brcm,gisb-arb-master-mask = <0x673>;
81                         brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
82                                                      "rdc_0", "raaga_0",
83                                                      "jtag_0", "svd_0";
84                 };
85
86                 upg_irq0_intc: upg_irq0_intc@406780 {
87                         compatible = "brcm,bcm7120-l2-intc";
88                         reg = <0x406780 0x8>;
89
90                         brcm,int-map-mask = <0x44>, <0xf000000>;
91                         brcm,int-fwd-mask = <0x70000>;
92
93                         interrupt-controller;
94                         #interrupt-cells = <1>;
95
96                         interrupt-parent = <&periph_intc>;
97                         interrupts = <59>, <57>;
98                         interrupt-names = "upg_main", "upg_bsc";
99                 };
100
101                 upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
102                         compatible = "brcm,bcm7120-l2-intc";
103                         reg = <0x408b80 0x8>;
104
105                         brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
106                         brcm,int-fwd-mask = <0>;
107                         brcm,irq-can-wake;
108
109                         interrupt-controller;
110                         #interrupt-cells = <1>;
111
112                         interrupt-parent = <&periph_intc>;
113                         interrupts = <60>, <58>, <62>;
114                         interrupt-names = "upg_main_aon", "upg_bsc_aon",
115                                           "upg_spi";
116                 };
117
118                 sun_top_ctrl: syscon@404000 {
119                         compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
120                         reg = <0x404000 0x51c>;
121                 };
122
123                 reboot {
124                         compatible = "brcm,brcmstb-reboot";
125                         syscon = <&sun_top_ctrl 0x304 0x308>;
126                 };
127
128                 uart0: serial@406900 {
129                         compatible = "ns16550a";
130                         reg = <0x406900 0x20>;
131                         reg-io-width = <0x4>;
132                         reg-shift = <0x2>;
133                         native-endian;
134                         interrupt-parent = <&periph_intc>;
135                         interrupts = <64>;
136                         clocks = <&uart_clk>;
137                         status = "disabled";
138                 };
139
140                 uart1: serial@406940 {
141                         compatible = "ns16550a";
142                         reg = <0x406940 0x20>;
143                         reg-io-width = <0x4>;
144                         reg-shift = <0x2>;
145                         native-endian;
146                         interrupt-parent = <&periph_intc>;
147                         interrupts = <65>;
148                         clocks = <&uart_clk>;
149                         status = "disabled";
150                 };
151
152                 uart2: serial@406980 {
153                         compatible = "ns16550a";
154                         reg = <0x406980 0x20>;
155                         reg-io-width = <0x4>;
156                         reg-shift = <0x2>;
157                         native-endian;
158                         interrupt-parent = <&periph_intc>;
159                         interrupts = <66>;
160                         clocks = <&uart_clk>;
161                         status = "disabled";
162                 };
163
164                 bsca: i2c@406200 {
165                       clock-frequency = <390000>;
166                       compatible = "brcm,brcmstb-i2c";
167                       interrupt-parent = <&upg_irq0_intc>;
168                       reg = <0x406200 0x58>;
169                       interrupts = <24>;
170                       interrupt-names = "upg_bsca";
171                       status = "disabled";
172                 };
173
174                 bscb: i2c@406280 {
175                       clock-frequency = <390000>;
176                       compatible = "brcm,brcmstb-i2c";
177                       interrupt-parent = <&upg_irq0_intc>;
178                       reg = <0x406280 0x58>;
179                       interrupts = <25>;
180                       interrupt-names = "upg_bscb";
181                       status = "disabled";
182                 };
183
184                 bscc: i2c@406300 {
185                       clock-frequency = <390000>;
186                       compatible = "brcm,brcmstb-i2c";
187                       interrupt-parent = <&upg_irq0_intc>;
188                       reg = <0x406300 0x58>;
189                       interrupts = <26>;
190                       interrupt-names = "upg_bscc";
191                       status = "disabled";
192                 };
193
194                 bscd: i2c@406380 {
195                       clock-frequency = <390000>;
196                       compatible = "brcm,brcmstb-i2c";
197                       interrupt-parent = <&upg_irq0_intc>;
198                       reg = <0x406380 0x58>;
199                       interrupts = <27>;
200                       interrupt-names = "upg_bscd";
201                       status = "disabled";
202                 };
203
204                 bsce: i2c@408980 {
205                       clock-frequency = <390000>;
206                       compatible = "brcm,brcmstb-i2c";
207                       interrupt-parent = <&upg_aon_irq0_intc>;
208                       reg = <0x408980 0x58>;
209                       interrupts = <27>;
210                       interrupt-names = "upg_bsce";
211                       status = "disabled";
212                 };
213
214                 enet0: ethernet@430000 {
215                         phy-mode = "internal";
216                         phy-handle = <&phy1>;
217                         mac-address = [ 00 10 18 36 23 1a ];
218                         compatible = "brcm,genet-v2";
219                         #address-cells = <0x1>;
220                         #size-cells = <0x1>;
221                         reg = <0x430000 0x4c8c>;
222                         interrupts = <24>, <25>;
223                         interrupt-parent = <&periph_intc>;
224                         status = "disabled";
225
226                         mdio@e14 {
227                                 compatible = "brcm,genet-mdio-v2";
228                                 #address-cells = <0x1>;
229                                 #size-cells = <0x0>;
230                                 reg = <0xe14 0x8>;
231
232                                 phy1: ethernet-phy@1 {
233                                         max-speed = <100>;
234                                         reg = <0x1>;
235                                         compatible = "brcm,40nm-ephy",
236                                                 "ethernet-phy-ieee802.3-c22";
237                                 };
238                         };
239                 };
240
241                 ehci0: usb@480300 {
242                         compatible = "brcm,bcm7346-ehci", "generic-ehci";
243                         reg = <0x480300 0x100>;
244                         native-endian;
245                         interrupt-parent = <&periph_intc>;
246                         interrupts = <68>;
247                         status = "disabled";
248                 };
249
250                 ohci0: usb@480400 {
251                         compatible = "brcm,bcm7346-ohci", "generic-ohci";
252                         reg = <0x480400 0x100>;
253                         native-endian;
254                         no-big-frame-no;
255                         interrupt-parent = <&periph_intc>;
256                         interrupts = <70>;
257                         status = "disabled";
258                 };
259
260                 ehci1: usb@480500 {
261                         compatible = "brcm,bcm7346-ehci", "generic-ehci";
262                         reg = <0x480500 0x100>;
263                         native-endian;
264                         interrupt-parent = <&periph_intc>;
265                         interrupts = <69>;
266                         status = "disabled";
267                 };
268
269                 ohci1: usb@480600 {
270                         compatible = "brcm,bcm7346-ohci", "generic-ohci";
271                         reg = <0x480600 0x100>;
272                         native-endian;
273                         no-big-frame-no;
274                         interrupt-parent = <&periph_intc>;
275                         interrupts = <71>;
276                         status = "disabled";
277                 };
278
279                 ehci2: usb@490300 {
280                         compatible = "brcm,bcm7346-ehci", "generic-ehci";
281                         reg = <0x490300 0x100>;
282                         native-endian;
283                         interrupt-parent = <&periph_intc>;
284                         interrupts = <73>;
285                         status = "disabled";
286                 };
287
288                 ohci2: usb@490400 {
289                         compatible = "brcm,bcm7346-ohci", "generic-ohci";
290                         reg = <0x490400 0x100>;
291                         native-endian;
292                         no-big-frame-no;
293                         interrupt-parent = <&periph_intc>;
294                         interrupts = <75>;
295                         status = "disabled";
296                 };
297
298                 ehci3: usb@490500 {
299                         compatible = "brcm,bcm7346-ehci", "generic-ehci";
300                         reg = <0x490500 0x100>;
301                         native-endian;
302                         interrupt-parent = <&periph_intc>;
303                         interrupts = <74>;
304                         status = "disabled";
305                 };
306
307                 ohci3: usb@490600 {
308                         compatible = "brcm,bcm7346-ohci", "generic-ohci";
309                         reg = <0x490600 0x100>;
310                         native-endian;
311                         no-big-frame-no;
312                         interrupt-parent = <&periph_intc>;
313                         interrupts = <76>;
314                         status = "disabled";
315                 };
316
317                 sata: sata@181000 {
318                         compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
319                         reg-names = "ahci", "top-ctrl";
320                         reg = <0x181000 0xa9c>, <0x180020 0x1c>;
321                         interrupt-parent = <&periph_intc>;
322                         interrupts = <40>;
323                         #address-cells = <1>;
324                         #size-cells = <0>;
325                         brcm,broken-ncq;
326                         brcm,broken-phy;
327                         status = "disabled";
328
329                         sata0: sata-port@0 {
330                                 reg = <0>;
331                                 phys = <&sata_phy0>;
332                         };
333
334                         sata1: sata-port@1 {
335                                 reg = <1>;
336                                 phys = <&sata_phy1>;
337                         };
338                 };
339
340                 sata_phy: sata-phy@1800000 {
341                         compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
342                         reg = <0x180100 0x0eff>;
343                         reg-names = "phy";
344                         #address-cells = <1>;
345                         #size-cells = <0>;
346                         status = "disabled";
347
348                         sata_phy0: sata-phy@0 {
349                                 reg = <0>;
350                                 #phy-cells = <0>;
351                         };
352
353                         sata_phy1: sata-phy@1 {
354                                 reg = <1>;
355                                 #phy-cells = <0>;
356                         };
357                 };
358         };
359 };