arch/mips/alchemy/devboards/db1200.c

   1 /*
   2  * DBAu1200/PBAu1200 board platform device registration
   3  *
   4  * Copyright (C) 2008-2011 Manuel Lauss
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20
  21 #include <linux/dma-mapping.h>
  22 #include <linux/gpio.h>
  23 #include <linux/i2c.h>
  24 #include <linux/init.h>
  25 #include <linux/module.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/io.h>
  28 #include <linux/leds.h>
  29 #include <linux/mmc/host.h>
  30 #include <linux/mtd/mtd.h>
  31 #include <linux/mtd/nand.h>
  32 #include <linux/mtd/partitions.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/serial_8250.h>
  35 #include <linux/spi/spi.h>
  36 #include <linux/spi/flash.h>
  37 #include <linux/smc91x.h>
  38 #include <asm/mach-au1x00/au1000.h>
  39 #include <asm/mach-au1x00/au1100_mmc.h>
  40 #include <asm/mach-au1x00/au1xxx_dbdma.h>
  41 #include <asm/mach-au1x00/au1200fb.h>
  42 #include <asm/mach-au1x00/au1550_spi.h>
  43 #include <asm/mach-db1x00/bcsr.h>
  44 #include <asm/mach-db1x00/db1200.h>
  45
  46 #include "platform.h"
  47
  48 const char *get_system_type(void);
  49
  50 static int __init db1200_detect_board(void)
  51 {
  52         int bid;
  53
  54         /* try the DB1200 first */
  55         bcsr_init(DB1200_BCSR_PHYS_ADDR,
  56                   DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);
  57         if (BCSR_WHOAMI_DB1200 == BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
  58                 unsigned short t = bcsr_read(BCSR_HEXLEDS);
  59                 bcsr_write(BCSR_HEXLEDS, ~t);
  60                 if (bcsr_read(BCSR_HEXLEDS) != t) {
  61                         bcsr_write(BCSR_HEXLEDS, t);
  62                         return 0;
  63                 }
  64         }
  65
  66         /* okay, try the PB1200 then */
  67         bcsr_init(PB1200_BCSR_PHYS_ADDR,
  68                   PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
  69         bid = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
  70         if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||
  71             (bid == BCSR_WHOAMI_PB1200_DDR2)) {
  72                 unsigned short t = bcsr_read(BCSR_HEXLEDS);
  73                 bcsr_write(BCSR_HEXLEDS, ~t);
  74                 if (bcsr_read(BCSR_HEXLEDS) != t) {
  75                         bcsr_write(BCSR_HEXLEDS, t);
  76                         return 0;
  77                 }
  78         }
  79
  80         return 1;       /* it's neither */
  81 }
  82
  83 int __init db1200_board_setup(void)
  84 {
  85         unsigned long freq0, clksrc, div, pfc;
  86         unsigned short whoami;
  87
  88         if (db1200_detect_board())
  89                 return -ENODEV;
  90
  91         whoami = bcsr_read(BCSR_WHOAMI);
  92         printk(KERN_INFO "Alchemy/AMD/RMI %s Board, CPLD Rev %d"
  93                 "  Board-ID %d  Daughtercard ID %d\n", get_system_type(),
  94                 (whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf);
  95
  96         /* SMBus/SPI on PSC0, Audio on PSC1 */
  97         pfc = __raw_readl((void __iomem *)SYS_PINFUNC);
  98         pfc &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
  99         pfc &= ~(SYS_PINFUNC_P1A | SYS_PINFUNC_P1B | SYS_PINFUNC_FS3);
 100         pfc |= SYS_PINFUNC_P1C; /* SPI is configured later */
 101         __raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
 102         wmb();
 103
 104         /* Clock configurations: PSC0: ~50MHz via Clkgen0, derived from
 105          * CPU clock; all other clock generators off/unused.
 106          */
 107         div = (get_au1x00_speed() + 25000000) / 50000000;
 108         if (div & 1)
 109                 div++;
 110         div = ((div >> 1) - 1) & 0xff;
 111
 112         freq0 = div << SYS_FC_FRDIV0_BIT;
 113         __raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
 114         wmb();
 115         freq0 |= SYS_FC_FE0;    /* enable F0 */
 116         __raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
 117         wmb();
 118
 119         /* psc0_intclk comes 1:1 from F0 */
 120         clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT;
 121         __raw_writel(clksrc, (void __iomem *)SYS_CLKSRC);
 122         wmb();
 123
 124         return 0;
 125 }
 126
 127 /******************************************************************************/
 128
 129 static struct mtd_partition db1200_spiflash_parts[] = {
 130         {
 131                 .name   = "spi_flash",
 132                 .offset = 0,
 133                 .size   = MTDPART_SIZ_FULL,
 134         },
 135 };
 136
 137 static struct flash_platform_data db1200_spiflash_data = {
 138         .name           = "s25fl001",
 139         .parts          = db1200_spiflash_parts,
 140         .nr_parts       = ARRAY_SIZE(db1200_spiflash_parts),
 141         .type           = "m25p10",
 142 };
 143
 144 static struct spi_board_info db1200_spi_devs[] __initdata = {
 145         {
 146                 /* TI TMP121AIDBVR temp sensor */
 147                 .modalias       = "tmp121",
 148                 .max_speed_hz   = 2000000,
 149                 .bus_num        = 0,
 150                 .chip_select    = 0,
 151                 .mode           = 0,
 152         },
 153         {
 154                 /* Spansion S25FL001D0FMA SPI flash */
 155                 .modalias       = "m25p80",
 156                 .max_speed_hz   = 50000000,
 157                 .bus_num        = 0,
 158                 .chip_select    = 1,
 159                 .mode           = 0,
 160                 .platform_data  = &db1200_spiflash_data,
 161         },
 162 };
 163
 164 static struct i2c_board_info db1200_i2c_devs[] __initdata = {
 165         { I2C_BOARD_INFO("24c04", 0x52),  }, /* AT24C04-10 I2C eeprom */
 166         { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
 167         { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec WM8731 */
 168 };
 169
 170 /**********************************************************************/
 171
 172 static void au1200_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
 173                                  unsigned int ctrl)
 174 {
 175         struct nand_chip *this = mtd->priv;
 176         unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
 177
 178         ioaddr &= 0xffffff00;
 179
 180         if (ctrl & NAND_CLE) {
 181                 ioaddr += MEM_STNAND_CMD;
 182         } else if (ctrl & NAND_ALE) {
 183                 ioaddr += MEM_STNAND_ADDR;
 184         } else {
 185                 /* assume we want to r/w real data  by default */
 186                 ioaddr += MEM_STNAND_DATA;
 187         }
 188         this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
 189         if (cmd != NAND_CMD_NONE) {
 190                 __raw_writeb(cmd, this->IO_ADDR_W);
 191                 wmb();
 192         }
 193 }
 194
 195 static int au1200_nand_device_ready(struct mtd_info *mtd)
 196 {
 197         return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
 198 }
 199
 200 static struct mtd_partition db1200_nand_parts[] = {
 201         {
 202                 .name   = "NAND FS 0",
 203                 .offset = 0,
 204                 .size   = 8 * 1024 * 1024,
 205         },
 206         {
 207                 .name   = "NAND FS 1",
 208                 .offset = MTDPART_OFS_APPEND,
 209                 .size   = MTDPART_SIZ_FULL
 210         },
 211 };
 212
 213 struct platform_nand_data db1200_nand_platdata = {
 214         .chip = {
 215                 .nr_chips       = 1,
 216                 .chip_offset    = 0,
 217                 .nr_partitions  = ARRAY_SIZE(db1200_nand_parts),
 218                 .partitions     = db1200_nand_parts,
 219                 .chip_delay     = 20,
 220         },
 221         .ctrl = {
 222                 .dev_ready      = au1200_nand_device_ready,
 223                 .cmd_ctrl       = au1200_nand_cmd_ctrl,
 224         },
 225 };
 226
 227 static struct resource db1200_nand_res[] = {
 228         [0] = {
 229                 .start  = DB1200_NAND_PHYS_ADDR,
 230                 .end    = DB1200_NAND_PHYS_ADDR + 0xff,
 231                 .flags  = IORESOURCE_MEM,
 232         },
 233 };
 234
 235 static struct platform_device db1200_nand_dev = {
 236         .name           = "gen_nand",
 237         .num_resources  = ARRAY_SIZE(db1200_nand_res),
 238         .resource       = db1200_nand_res,
 239         .id             = -1,
 240         .dev            = {
 241                 .platform_data = &db1200_nand_platdata,
 242         }
 243 };
 244
 245 /**********************************************************************/
 246
 247 static struct smc91x_platdata db1200_eth_data = {
 248         .flags  = SMC91X_NOWAIT | SMC91X_USE_16BIT,
 249         .leda   = RPC_LED_100_10,
 250         .ledb   = RPC_LED_TX_RX,
 251 };
 252
 253 static struct resource db1200_eth_res[] = {
 254         [0] = {
 255                 .start  = DB1200_ETH_PHYS_ADDR,
 256                 .end    = DB1200_ETH_PHYS_ADDR + 0xf,
 257                 .flags  = IORESOURCE_MEM,
 258         },
 259         [1] = {
 260                 .start  = DB1200_ETH_INT,
 261                 .end    = DB1200_ETH_INT,
 262                 .flags  = IORESOURCE_IRQ,
 263         },
 264 };
 265
 266 static struct platform_device db1200_eth_dev = {
 267         .dev    = {
 268                 .platform_data  = &db1200_eth_data,
 269         },
 270         .name           = "smc91x",
 271         .id             = -1,
 272         .num_resources  = ARRAY_SIZE(db1200_eth_res),
 273         .resource       = db1200_eth_res,
 274 };
 275
 276 /**********************************************************************/
 277
 278 static struct resource db1200_ide_res[] = {
 279         [0] = {
 280                 .start  = DB1200_IDE_PHYS_ADDR,
 281                 .end    = DB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1,
 282                 .flags  = IORESOURCE_MEM,
 283         },
 284         [1] = {
 285                 .start  = DB1200_IDE_INT,
 286                 .end    = DB1200_IDE_INT,
 287                 .flags  = IORESOURCE_IRQ,
 288         },
 289         [2] = {
 290                 .start  = AU1200_DSCR_CMD0_DMA_REQ1,
 291                 .end    = AU1200_DSCR_CMD0_DMA_REQ1,
 292                 .flags  = IORESOURCE_DMA,
 293         },
 294 };
 295
 296 static u64 au1200_ide_dmamask = DMA_BIT_MASK(32);
 297
 298 static struct platform_device db1200_ide_dev = {
 299         .name           = "au1200-ide",
 300         .id             = 0,
 301         .dev = {
 302                 .dma_mask               = &au1200_ide_dmamask,
 303                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 304         },
 305         .num_resources  = ARRAY_SIZE(db1200_ide_res),
 306         .resource       = db1200_ide_res,
 307 };
 308
 309 /**********************************************************************/
 310
 311 /* SD carddetects:  they're supposed to be edge-triggered, but ack
 312  * doesn't seem to work (CPLD Rev 2).  Instead, the screaming one
 313  * is disabled and its counterpart enabled.  The 500ms timeout is
 314  * because the carddetect isn't debounced in hardware.
 315  */
 316 static irqreturn_t db1200_mmc_cd(int irq, void *ptr)
 317 {
 318         void(*mmc_cd)(struct mmc_host *, unsigned long);
 319
 320         if (irq == DB1200_SD0_INSERT_INT) {
 321                 disable_irq_nosync(DB1200_SD0_INSERT_INT);
 322                 enable_irq(DB1200_SD0_EJECT_INT);
 323         } else {
 324                 disable_irq_nosync(DB1200_SD0_EJECT_INT);
 325                 enable_irq(DB1200_SD0_INSERT_INT);
 326         }
 327
 328         /* link against CONFIG_MMC=m */
 329         mmc_cd = symbol_get(mmc_detect_change);
 330         if (mmc_cd) {
 331                 mmc_cd(ptr, msecs_to_jiffies(500));
 332                 symbol_put(mmc_detect_change);
 333         }
 334
 335         return IRQ_HANDLED;
 336 }
 337
 338 static int db1200_mmc_cd_setup(void *mmc_host, int en)
 339 {
 340         int ret;
 341
 342         if (en) {
 343                 ret = request_irq(DB1200_SD0_INSERT_INT, db1200_mmc_cd,
 344                                   0, "sd_insert", mmc_host);
 345                 if (ret)
 346                         goto out;
 347
 348                 ret = request_irq(DB1200_SD0_EJECT_INT, db1200_mmc_cd,
 349                                   0, "sd_eject", mmc_host);
 350                 if (ret) {
 351                         free_irq(DB1200_SD0_INSERT_INT, mmc_host);
 352                         goto out;
 353                 }
 354
 355                 if (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT)
 356                         enable_irq(DB1200_SD0_EJECT_INT);
 357                 else
 358                         enable_irq(DB1200_SD0_INSERT_INT);
 359
 360         } else {
 361                 free_irq(DB1200_SD0_INSERT_INT, mmc_host);
 362                 free_irq(DB1200_SD0_EJECT_INT, mmc_host);
 363         }
 364         ret = 0;
 365 out:
 366         return ret;
 367 }
 368
 369 static void db1200_mmc_set_power(void *mmc_host, int state)
 370 {
 371         if (state) {
 372                 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);
 373                 msleep(400);    /* stabilization time */
 374         } else
 375                 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);
 376 }
 377
 378 static int db1200_mmc_card_readonly(void *mmc_host)
 379 {
 380         return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 1 : 0;
 381 }
 382
 383 static int db1200_mmc_card_inserted(void *mmc_host)
 384 {
 385         return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT) ? 1 : 0;
 386 }
 387
 388 static void db1200_mmcled_set(struct led_classdev *led,
 389                               enum led_brightness brightness)
 390 {
 391         if (brightness != LED_OFF)
 392                 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
 393         else
 394                 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
 395 }
 396
 397 static struct led_classdev db1200_mmc_led = {
 398         .brightness_set = db1200_mmcled_set,
 399 };
 400
 401 /* -- */
 402
 403 static irqreturn_t pb1200_mmc1_cd(int irq, void *ptr)
 404 {
 405         void(*mmc_cd)(struct mmc_host *, unsigned long);
 406
 407         if (irq == PB1200_SD1_INSERT_INT) {
 408                 disable_irq_nosync(PB1200_SD1_INSERT_INT);
 409                 enable_irq(PB1200_SD1_EJECT_INT);
 410         } else {
 411                 disable_irq_nosync(PB1200_SD1_EJECT_INT);
 412                 enable_irq(PB1200_SD1_INSERT_INT);
 413         }
 414
 415         /* link against CONFIG_MMC=m */
 416         mmc_cd = symbol_get(mmc_detect_change);
 417         if (mmc_cd) {
 418                 mmc_cd(ptr, msecs_to_jiffies(500));
 419                 symbol_put(mmc_detect_change);
 420         }
 421
 422         return IRQ_HANDLED;
 423 }
 424
 425 static int pb1200_mmc1_cd_setup(void *mmc_host, int en)
 426 {
 427         int ret;
 428
 429         if (en) {
 430                 ret = request_irq(PB1200_SD1_INSERT_INT, pb1200_mmc1_cd, 0,
 431                                   "sd1_insert", mmc_host);
 432                 if (ret)
 433                         goto out;
 434
 435                 ret = request_irq(PB1200_SD1_EJECT_INT, pb1200_mmc1_cd, 0,
 436                                   "sd1_eject", mmc_host);
 437                 if (ret) {
 438                         free_irq(PB1200_SD1_INSERT_INT, mmc_host);
 439                         goto out;
 440                 }
 441
 442                 if (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT)
 443                         enable_irq(PB1200_SD1_EJECT_INT);
 444                 else
 445                         enable_irq(PB1200_SD1_INSERT_INT);
 446
 447         } else {
 448                 free_irq(PB1200_SD1_INSERT_INT, mmc_host);
 449                 free_irq(PB1200_SD1_EJECT_INT, mmc_host);
 450         }
 451         ret = 0;
 452 out:
 453         return ret;
 454 }
 455
 456 static void pb1200_mmc1led_set(struct led_classdev *led,
 457                         enum led_brightness brightness)
 458 {
 459         if (brightness != LED_OFF)
 460                         bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
 461         else
 462                         bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
 463 }
 464
 465 static struct led_classdev pb1200_mmc1_led = {
 466         .brightness_set = pb1200_mmc1led_set,
 467 };
 468
 469 static void pb1200_mmc1_set_power(void *mmc_host, int state)
 470 {
 471         if (state) {
 472                 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR);
 473                 msleep(400);    /* stabilization time */
 474         } else
 475                 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0);
 476 }
 477
 478 static int pb1200_mmc1_card_readonly(void *mmc_host)
 479 {
 480         return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD1WP) ? 1 : 0;
 481 }
 482
 483 static int pb1200_mmc1_card_inserted(void *mmc_host)
 484 {
 485         return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT) ? 1 : 0;
 486 }
 487
 488
 489 static struct au1xmmc_platform_data db1200_mmc_platdata[2] = {
 490         [0] = {
 491                 .cd_setup       = db1200_mmc_cd_setup,
 492                 .set_power      = db1200_mmc_set_power,
 493                 .card_inserted  = db1200_mmc_card_inserted,
 494                 .card_readonly  = db1200_mmc_card_readonly,
 495                 .led            = &db1200_mmc_led,
 496         },
 497         [1] = {
 498                 .cd_setup       = pb1200_mmc1_cd_setup,
 499                 .set_power      = pb1200_mmc1_set_power,
 500                 .card_inserted  = pb1200_mmc1_card_inserted,
 501                 .card_readonly  = pb1200_mmc1_card_readonly,
 502                 .led            = &pb1200_mmc1_led,
 503         },
 504 };
 505
 506 static struct resource au1200_mmc0_resources[] = {
 507         [0] = {
 508                 .start  = AU1100_SD0_PHYS_ADDR,
 509                 .end    = AU1100_SD0_PHYS_ADDR + 0xfff,
 510                 .flags  = IORESOURCE_MEM,
 511         },
 512         [1] = {
 513                 .start  = AU1200_SD_INT,
 514                 .end    = AU1200_SD_INT,
 515                 .flags  = IORESOURCE_IRQ,
 516         },
 517         [2] = {
 518                 .start  = AU1200_DSCR_CMD0_SDMS_TX0,
 519                 .end    = AU1200_DSCR_CMD0_SDMS_TX0,
 520                 .flags  = IORESOURCE_DMA,
 521         },
 522         [3] = {
 523                 .start  = AU1200_DSCR_CMD0_SDMS_RX0,
 524                 .end    = AU1200_DSCR_CMD0_SDMS_RX0,
 525                 .flags  = IORESOURCE_DMA,
 526         }
 527 };
 528
 529 static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);
 530
 531 static struct platform_device db1200_mmc0_dev = {
 532         .name           = "au1xxx-mmc",
 533         .id             = 0,
 534         .dev = {
 535                 .dma_mask               = &au1xxx_mmc_dmamask,
 536                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 537                 .platform_data          = &db1200_mmc_platdata[0],
 538         },
 539         .num_resources  = ARRAY_SIZE(au1200_mmc0_resources),
 540         .resource       = au1200_mmc0_resources,
 541 };
 542
 543 static struct resource au1200_mmc1_res[] = {
 544         [0] = {
 545                 .start  = AU1100_SD1_PHYS_ADDR,
 546                 .end    = AU1100_SD1_PHYS_ADDR + 0xfff,
 547                 .flags  = IORESOURCE_MEM,
 548         },
 549         [1] = {
 550                 .start  = AU1200_SD_INT,
 551                 .end    = AU1200_SD_INT,
 552                 .flags  = IORESOURCE_IRQ,
 553         },
 554         [2] = {
 555                 .start  = AU1200_DSCR_CMD0_SDMS_TX1,
 556                 .end    = AU1200_DSCR_CMD0_SDMS_TX1,
 557                 .flags  = IORESOURCE_DMA,
 558         },
 559         [3] = {
 560                 .start  = AU1200_DSCR_CMD0_SDMS_RX1,
 561                 .end    = AU1200_DSCR_CMD0_SDMS_RX1,
 562                 .flags  = IORESOURCE_DMA,
 563         }
 564 };
 565
 566 static struct platform_device pb1200_mmc1_dev = {
 567         .name           = "au1xxx-mmc",
 568         .id             = 1,
 569         .dev = {
 570                 .dma_mask               = &au1xxx_mmc_dmamask,
 571                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 572                 .platform_data          = &db1200_mmc_platdata[1],
 573         },
 574         .num_resources  = ARRAY_SIZE(au1200_mmc1_res),
 575         .resource       = au1200_mmc1_res,
 576 };
 577
 578 /**********************************************************************/
 579
 580 static int db1200fb_panel_index(void)
 581 {
 582         return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
 583 }
 584
 585 static int db1200fb_panel_init(void)
 586 {
 587         /* Apply power */
 588         bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
 589                                 BCSR_BOARD_LCDBL);
 590         return 0;
 591 }
 592
 593 static int db1200fb_panel_shutdown(void)
 594 {
 595         /* Remove power */
 596         bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
 597                              BCSR_BOARD_LCDBL, 0);
 598         return 0;
 599 }
 600
 601 static struct au1200fb_platdata db1200fb_pd = {
 602         .panel_index    = db1200fb_panel_index,
 603         .panel_init     = db1200fb_panel_init,
 604         .panel_shutdown = db1200fb_panel_shutdown,
 605 };
 606
 607 static struct resource au1200_lcd_res[] = {
 608         [0] = {
 609                 .start  = AU1200_LCD_PHYS_ADDR,
 610                 .end    = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
 611                 .flags  = IORESOURCE_MEM,
 612         },
 613         [1] = {
 614                 .start  = AU1200_LCD_INT,
 615                 .end    = AU1200_LCD_INT,
 616                 .flags  = IORESOURCE_IRQ,
 617         }
 618 };
 619
 620 static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
 621
 622 static struct platform_device au1200_lcd_dev = {
 623         .name           = "au1200-lcd",
 624         .id             = 0,
 625         .dev = {
 626                 .dma_mask               = &au1200_lcd_dmamask,
 627                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 628                 .platform_data          = &db1200fb_pd,
 629         },
 630         .num_resources  = ARRAY_SIZE(au1200_lcd_res),
 631         .resource       = au1200_lcd_res,
 632 };
 633
 634 /**********************************************************************/
 635
 636 static struct resource au1200_psc0_res[] = {
 637         [0] = {
 638                 .start  = AU1550_PSC0_PHYS_ADDR,
 639                 .end    = AU1550_PSC0_PHYS_ADDR + 0xfff,
 640                 .flags  = IORESOURCE_MEM,
 641         },
 642         [1] = {
 643                 .start  = AU1200_PSC0_INT,
 644                 .end    = AU1200_PSC0_INT,
 645                 .flags  = IORESOURCE_IRQ,
 646         },
 647         [2] = {
 648                 .start  = AU1200_DSCR_CMD0_PSC0_TX,
 649                 .end    = AU1200_DSCR_CMD0_PSC0_TX,
 650                 .flags  = IORESOURCE_DMA,
 651         },
 652         [3] = {
 653                 .start  = AU1200_DSCR_CMD0_PSC0_RX,
 654                 .end    = AU1200_DSCR_CMD0_PSC0_RX,
 655                 .flags  = IORESOURCE_DMA,
 656         },
 657 };
 658
 659 static struct platform_device db1200_i2c_dev = {
 660         .name           = "au1xpsc_smbus",
 661         .id             = 0,    /* bus number */
 662         .num_resources  = ARRAY_SIZE(au1200_psc0_res),
 663         .resource       = au1200_psc0_res,
 664 };
 665
 666 static void db1200_spi_cs_en(struct au1550_spi_info *spi, int cs, int pol)
 667 {
 668         if (cs)
 669                 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_SPISEL);
 670         else
 671                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_SPISEL, 0);
 672 }
 673
 674 static struct au1550_spi_info db1200_spi_platdata = {
 675         .mainclk_hz     = 50000000,     /* PSC0 clock */
 676         .num_chipselect = 2,
 677         .activate_cs    = db1200_spi_cs_en,
 678 };
 679
 680 static u64 spi_dmamask = DMA_BIT_MASK(32);
 681
 682 static struct platform_device db1200_spi_dev = {
 683         .dev    = {
 684                 .dma_mask               = &spi_dmamask,
 685                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 686                 .platform_data          = &db1200_spi_platdata,
 687         },
 688         .name           = "au1550-spi",
 689         .id             = 0,    /* bus number */
 690         .num_resources  = ARRAY_SIZE(au1200_psc0_res),
 691         .resource       = au1200_psc0_res,
 692 };
 693
 694 static struct resource au1200_psc1_res[] = {
 695         [0] = {
 696                 .start  = AU1550_PSC1_PHYS_ADDR,
 697                 .end    = AU1550_PSC1_PHYS_ADDR + 0xfff,
 698                 .flags  = IORESOURCE_MEM,
 699         },
 700         [1] = {
 701                 .start  = AU1200_PSC1_INT,
 702                 .end    = AU1200_PSC1_INT,
 703                 .flags  = IORESOURCE_IRQ,
 704         },
 705         [2] = {
 706                 .start  = AU1200_DSCR_CMD0_PSC1_TX,
 707                 .end    = AU1200_DSCR_CMD0_PSC1_TX,
 708                 .flags  = IORESOURCE_DMA,
 709         },
 710         [3] = {
 711                 .start  = AU1200_DSCR_CMD0_PSC1_RX,
 712                 .end    = AU1200_DSCR_CMD0_PSC1_RX,
 713                 .flags  = IORESOURCE_DMA,
 714         },
 715 };
 716
 717 /* AC97 or I2S device */
 718 static struct platform_device db1200_audio_dev = {
 719         /* name assigned later based on switch setting */
 720         .id             = 1,    /* PSC ID */
 721         .num_resources  = ARRAY_SIZE(au1200_psc1_res),
 722         .resource       = au1200_psc1_res,
 723 };
 724
 725 /* DB1200 ASoC card device */
 726 static struct platform_device db1200_sound_dev = {
 727         /* name assigned later based on switch setting */
 728         .id             = 1,    /* PSC ID */
 729 };
 730
 731 static struct platform_device db1200_stac_dev = {
 732         .name           = "ac97-codec",
 733         .id             = 1,    /* on PSC1 */
 734 };
 735
 736 static struct platform_device db1200_audiodma_dev = {
 737         .name           = "au1xpsc-pcm",
 738         .id             = 1,    /* PSC ID */
 739 };
 740
 741 static struct platform_device *db1200_devs[] __initdata = {
 742         NULL,           /* PSC0, selected by S6.8 */
 743         &db1200_ide_dev,
 744         &db1200_mmc0_dev,
 745         &au1200_lcd_dev,
 746         &db1200_eth_dev,
 747         &db1200_nand_dev,
 748         &db1200_audiodma_dev,
 749         &db1200_audio_dev,
 750         &db1200_stac_dev,
 751         &db1200_sound_dev,
 752 };
 753
 754 static struct platform_device *pb1200_devs[] __initdata = {
 755         &pb1200_mmc1_dev,
 756 };
 757
 758 /* Some peripheral base addresses differ on the PB1200 */
 759 static int __init pb1200_res_fixup(void)
 760 {
 761         /* CPLD Revs earlier than 4 cause problems */
 762         if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
 763                 printk(KERN_ERR "WARNING!!!\n");
 764                 printk(KERN_ERR "WARNING!!!\n");
 765                 printk(KERN_ERR "PB1200 must be at CPLD rev 4. Please have\n");
 766                 printk(KERN_ERR "the board updated to latest revisions.\n");
 767                 printk(KERN_ERR "This software will not work reliably\n");
 768                 printk(KERN_ERR "on anything older than CPLD rev 4.!\n");
 769                 printk(KERN_ERR "WARNING!!!\n");
 770                 printk(KERN_ERR "WARNING!!!\n");
 771                 return 1;
 772         }
 773
 774         db1200_nand_res[0].start = PB1200_NAND_PHYS_ADDR;
 775         db1200_nand_res[0].end   = PB1200_NAND_PHYS_ADDR + 0xff;
 776         db1200_ide_res[0].start = PB1200_IDE_PHYS_ADDR;
 777         db1200_ide_res[0].end   = PB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1;
 778         db1200_eth_res[0].start = PB1200_ETH_PHYS_ADDR;
 779         db1200_eth_res[0].end   = PB1200_ETH_PHYS_ADDR + 0xff;
 780         return 0;
 781 }
 782
 783 int __init db1200_dev_setup(void)
 784 {
 785         unsigned long pfc;
 786         unsigned short sw;
 787         int swapped, bid;
 788
 789         bid = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
 790         if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||
 791             (bid == BCSR_WHOAMI_PB1200_DDR2)) {
 792                 if (pb1200_res_fixup())
 793                         return -ENODEV;
 794         }
 795
 796         /* GPIO7 is low-level triggered CPLD cascade */
 797         irq_set_irq_type(AU1200_GPIO7_INT, IRQ_TYPE_LEVEL_LOW);
 798         bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);
 799
 800         /* insert/eject pairs: one of both is always screaming.  To avoid
 801          * issues they must not be automatically enabled when initially
 802          * requested.
 803          */
 804         irq_set_status_flags(DB1200_SD0_INSERT_INT, IRQ_NOAUTOEN);
 805         irq_set_status_flags(DB1200_SD0_EJECT_INT, IRQ_NOAUTOEN);
 806         irq_set_status_flags(DB1200_PC0_INSERT_INT, IRQ_NOAUTOEN);
 807         irq_set_status_flags(DB1200_PC0_EJECT_INT, IRQ_NOAUTOEN);
 808         irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN);
 809         irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN);
 810
 811         i2c_register_board_info(0, db1200_i2c_devs,
 812                                 ARRAY_SIZE(db1200_i2c_devs));
 813         spi_register_board_info(db1200_spi_devs,
 814                                 ARRAY_SIZE(db1200_i2c_devs));
 815
 816         /* SWITCHES:    S6.8 I2C/SPI selector  (OFF=I2C  ON=SPI)
 817          *              S6.7 AC97/I2S selector (OFF=AC97 ON=I2S)
 818          *              or S12 on the PB1200.
 819          */
 820
 821         /* NOTE: GPIO215 controls OTG VBUS supply.  In SPI mode however
 822          * this pin is claimed by PSC0 (unused though, but pinmux doesn't
 823          * allow to free it without crippling the SPI interface).
 824          * As a result, in SPI mode, OTG simply won't work (PSC0 uses
 825          * it as an input pin which is pulled high on the boards).
 826          */
 827         pfc = __raw_readl((void __iomem *)SYS_PINFUNC) & ~SYS_PINFUNC_P0A;
 828
 829         /* switch off OTG VBUS supply */
 830         gpio_request(215, "otg-vbus");
 831         gpio_direction_output(215, 1);
 832
 833         printk(KERN_INFO "%s device configuration:\n", get_system_type());
 834
 835         sw = bcsr_read(BCSR_SWITCHES);
 836         if (sw & BCSR_SWITCHES_DIP_8) {
 837                 db1200_devs[0] = &db1200_i2c_dev;
 838                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
 839
 840                 pfc |= (2 << 17);       /* GPIO2 block owns GPIO215 */
 841
 842                 printk(KERN_INFO " S6.8 OFF: PSC0 mode I2C\n");
 843                 printk(KERN_INFO "   OTG port VBUS supply available!\n");
 844         } else {
 845                 db1200_devs[0] = &db1200_spi_dev;
 846                 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC0MUX);
 847
 848                 pfc |= (1 << 17);       /* PSC0 owns GPIO215 */
 849
 850                 printk(KERN_INFO " S6.8 ON : PSC0 mode SPI\n");
 851                 printk(KERN_INFO "   OTG port VBUS supply disabled\n");
 852         }
 853         __raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
 854         wmb();
 855
 856         /* Audio: DIP7 selects I2S(0)/AC97(1), but need I2C for I2S!
 857          * so: DIP7=1 || DIP8=0 => AC97, DIP7=0 && DIP8=1 => I2S
 858          */
 859         sw &= BCSR_SWITCHES_DIP_8 | BCSR_SWITCHES_DIP_7;
 860         if (sw == BCSR_SWITCHES_DIP_8) {
 861                 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC1MUX);
 862                 db1200_audio_dev.name = "au1xpsc_i2s";
 863                 db1200_sound_dev.name = "db1200-i2s";
 864                 printk(KERN_INFO " S6.7 ON : PSC1 mode I2S\n");
 865         } else {
 866                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC1MUX, 0);
 867                 db1200_audio_dev.name = "au1xpsc_ac97";
 868                 db1200_sound_dev.name = "db1200-ac97";
 869                 printk(KERN_INFO " S6.7 OFF: PSC1 mode AC97\n");
 870         }
 871
 872         /* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
 873         __raw_writel(PSC_SEL_CLK_SERCLK,
 874             (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
 875         wmb();
 876
 877         db1x_register_pcmcia_socket(
 878                 AU1000_PCMCIA_ATTR_PHYS_ADDR,
 879                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
 880                 AU1000_PCMCIA_MEM_PHYS_ADDR,
 881                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
 882                 AU1000_PCMCIA_IO_PHYS_ADDR,
 883                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
 884                 DB1200_PC0_INT, DB1200_PC0_INSERT_INT,
 885                 /*DB1200_PC0_STSCHG_INT*/0, DB1200_PC0_EJECT_INT, 0);
 886
 887         db1x_register_pcmcia_socket(
 888                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
 889                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
 890                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
 891                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
 892                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004000000,
 893                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
 894                 DB1200_PC1_INT, DB1200_PC1_INSERT_INT,
 895                 /*DB1200_PC1_STSCHG_INT*/0, DB1200_PC1_EJECT_INT, 1);
 896
 897         swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
 898         db1x_register_norflash(64 << 20, 2, swapped);
 899
 900         platform_add_devices(db1200_devs, ARRAY_SIZE(db1200_devs));
 901
 902         /* PB1200 is a DB1200 with a 2nd MMC and Camera connector */
 903         if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||
 904             (bid == BCSR_WHOAMI_PB1200_DDR2))
 905                 platform_add_devices(pb1200_devs, ARRAY_SIZE(pb1200_devs));
 906
 907         return 0;
 908 }