arch/arm/boot/dts/zynq-zc702.dts

   1 /*
   2  *  Copyright (C) 2011 - 2014 Xilinx
   3  *  Copyright (C) 2012 National Instruments Corp.
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14 /dts-v1/;
  15 /include/ "zynq-7000.dtsi"
  16
  17 / {
  18         model = "Zynq ZC702 Development Board";
  19         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
  20
  21         aliases {
  22                 ethernet0 = &gem0;
  23                 i2c0 = &i2c0;
  24                 serial0 = &uart1;
  25         };
  26
  27         memory {
  28                 device_type = "memory";
  29                 reg = <0x0 0x40000000>;
  30         };
  31
  32         chosen {
  33                 bootargs = "earlyprintk";
  34                 stdout-path = "serial0:115200n8";
  35         };
  36
  37         leds {
  38                 compatible = "gpio-leds";
  39
  40                 ds23 {
  41                         label = "ds23";
  42                         gpios = <&gpio0 10 0>;
  43                         linux,default-trigger = "heartbeat";
  44                 };
  45         };
  46
  47         usb_phy0: phy0 {
  48                 compatible = "usb-nop-xceiv";
  49                 #phy-cells = <0>;
  50         };
  51 };
  52
  53 &can0 {
  54         status = "okay";
  55         pinctrl-names = "default";
  56         pinctrl-0 = <&pinctrl_can0_default>;
  57 };
  58
  59 &clkc {
  60         ps-clk-frequency = <33333333>;
  61 };
  62
  63 &gem0 {
  64         status = "okay";
  65         phy-mode = "rgmii-id";
  66         phy-handle = <&ethernet_phy>;
  67         pinctrl-names = "default";
  68         pinctrl-0 = <&pinctrl_gem0_default>;
  69
  70         ethernet_phy: ethernet-phy@7 {
  71                 reg = <7>;
  72         };
  73 };
  74
  75 &gpio0 {
  76         pinctrl-names = "default";
  77         pinctrl-0 = <&pinctrl_gpio0_default>;
  78 };
  79
  80 &i2c0 {
  81         status = "okay";
  82         clock-frequency = <400000>;
  83         pinctrl-names = "default";
  84         pinctrl-0 = <&pinctrl_i2c0_default>;
  85
  86         i2cswitch@74 {
  87                 compatible = "nxp,pca9548";
  88                 #address-cells = <1>;
  89                 #size-cells = <0>;
  90                 reg = <0x74>;
  91
  92                 i2c@0 {
  93                         #address-cells = <1>;
  94                         #size-cells = <0>;
  95                         reg = <0>;
  96                         si570: clock-generator@5d {
  97                                 #clock-cells = <0>;
  98                                 compatible = "silabs,si570";
  99                                 temperature-stability = <50>;
 100                                 reg = <0x5d>;
 101                                 factory-fout = <156250000>;
 102                                 clock-frequency = <148500000>;
 103                         };
 104                 };
 105
 106                 i2c@2 {
 107                         #address-cells = <1>;
 108                         #size-cells = <0>;
 109                         reg = <2>;
 110                         eeprom@54 {
 111                                 compatible = "at,24c08";
 112                                 reg = <0x54>;
 113                         };
 114                 };
 115
 116                 i2c@3 {
 117                         #address-cells = <1>;
 118                         #size-cells = <0>;
 119                         reg = <3>;
 120                         gpio@21 {
 121                                 compatible = "ti,tca6416";
 122                                 reg = <0x21>;
 123                                 gpio-controller;
 124                                 #gpio-cells = <2>;
 125                         };
 126                 };
 127
 128                 i2c@4 {
 129                         #address-cells = <1>;
 130                         #size-cells = <0>;
 131                         reg = <4>;
 132                         rtc@51 {
 133                                 compatible = "nxp,pcf8563";
 134                                 reg = <0x51>;
 135                         };
 136                 };
 137
 138                 i2c@7 {
 139                         #address-cells = <1>;
 140                         #size-cells = <0>;
 141                         reg = <7>;
 142                         hwmon@52 {
 143                                 compatible = "ti,ucd9248";
 144                                 reg = <52>;
 145                         };
 146                         hwmon@53 {
 147                                 compatible = "ti,ucd9248";
 148                                 reg = <53>;
 149                         };
 150                         hwmon@54 {
 151                                 compatible = "ti,ucd9248";
 152                                 reg = <54>;
 153                         };
 154                 };
 155         };
 156 };
 157
 158 &pinctrl0 {
 159         pinctrl_can0_default: can0-default {
 160                 mux {
 161                         function = "can0";
 162                         groups = "can0_9_grp";
 163                 };
 164
 165                 conf {
 166                         groups = "can0_9_grp";
 167                         slew-rate = <0>;
 168                         io-standard = <1>;
 169                 };
 170
 171                 conf-rx {
 172                         pins = "MIO46";
 173                         bias-high-impedance;
 174                 };
 175
 176                 conf-tx {
 177                         pins = "MIO47";
 178                         bias-disable;
 179                 };
 180         };
 181
 182         pinctrl_gem0_default: gem0-default {
 183                 mux {
 184                         function = "ethernet0";
 185                         groups = "ethernet0_0_grp";
 186                 };
 187
 188                 conf {
 189                         groups = "ethernet0_0_grp";
 190                         slew-rate = <0>;
 191                         io-standard = <4>;
 192                 };
 193
 194                 conf-rx {
 195                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
 196                         bias-high-impedance;
 197                         low-power-disable;
 198                 };
 199
 200                 conf-tx {
 201                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
 202                         bias-disable;
 203                         low-power-enable;
 204                 };
 205
 206                 mux-mdio {
 207                         function = "mdio0";
 208                         groups = "mdio0_0_grp";
 209                 };
 210
 211                 conf-mdio {
 212                         groups = "mdio0_0_grp";
 213                         slew-rate = <0>;
 214                         io-standard = <1>;
 215                         bias-disable;
 216                 };
 217         };
 218
 219         pinctrl_gpio0_default: gpio0-default {
 220                 mux {
 221                         function = "gpio0";
 222                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 223                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 224                                  "gpio0_13_grp", "gpio0_14_grp";
 225                 };
 226
 227                 conf {
 228                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 229                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 230                                  "gpio0_13_grp", "gpio0_14_grp";
 231                         slew-rate = <0>;
 232                         io-standard = <1>;
 233                 };
 234
 235                 conf-pull-up {
 236                         pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
 237                         bias-pull-up;
 238                 };
 239
 240                 conf-pull-none {
 241                         pins = "MIO7", "MIO8";
 242                         bias-disable;
 243                 };
 244         };
 245
 246         pinctrl_i2c0_default: i2c0-default {
 247                 mux {
 248                         groups = "i2c0_10_grp";
 249                         function = "i2c0";
 250                 };
 251
 252                 conf {
 253                         groups = "i2c0_10_grp";
 254                         bias-pull-up;
 255                         slew-rate = <0>;
 256                         io-standard = <1>;
 257                 };
 258         };
 259
 260         pinctrl_sdhci0_default: sdhci0-default {
 261                 mux {
 262                         groups = "sdio0_2_grp";
 263                         function = "sdio0";
 264                 };
 265
 266                 conf {
 267                         groups = "sdio0_2_grp";
 268                         slew-rate = <0>;
 269                         io-standard = <1>;
 270                         bias-disable;
 271                 };
 272
 273                 mux-cd {
 274                         groups = "gpio0_0_grp";
 275                         function = "sdio0_cd";
 276                 };
 277
 278                 conf-cd {
 279                         groups = "gpio0_0_grp";
 280                         bias-high-impedance;
 281                         bias-pull-up;
 282                         slew-rate = <0>;
 283                         io-standard = <1>;
 284                 };
 285
 286                 mux-wp {
 287                         groups = "gpio0_15_grp";
 288                         function = "sdio0_wp";
 289                 };
 290
 291                 conf-wp {
 292                         groups = "gpio0_15_grp";
 293                         bias-high-impedance;
 294                         bias-pull-up;
 295                         slew-rate = <0>;
 296                         io-standard = <1>;
 297                 };
 298         };
 299
 300         pinctrl_uart1_default: uart1-default {
 301                 mux {
 302                         groups = "uart1_10_grp";
 303                         function = "uart1";
 304                 };
 305
 306                 conf {
 307                         groups = "uart1_10_grp";
 308                         slew-rate = <0>;
 309                         io-standard = <1>;
 310                 };
 311
 312                 conf-rx {
 313                         pins = "MIO49";
 314                         bias-high-impedance;
 315                 };
 316
 317                 conf-tx {
 318                         pins = "MIO48";
 319                         bias-disable;
 320                 };
 321         };
 322
 323         pinctrl_usb0_default: usb0-default {
 324                 mux {
 325                         groups = "usb0_0_grp";
 326                         function = "usb0";
 327                 };
 328
 329                 conf {
 330                         groups = "usb0_0_grp";
 331                         slew-rate = <0>;
 332                         io-standard = <1>;
 333                 };
 334
 335                 conf-rx {
 336                         pins = "MIO29", "MIO31", "MIO36";
 337                         bias-high-impedance;
 338                 };
 339
 340                 conf-tx {
 341                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
 342                                "MIO35", "MIO37", "MIO38", "MIO39";
 343                         bias-disable;
 344                 };
 345         };
 346 };
 347
 348 &sdhci0 {
 349         status = "okay";
 350         pinctrl-names = "default";
 351         pinctrl-0 = <&pinctrl_sdhci0_default>;
 352 };
 353
 354 &uart1 {
 355         status = "okay";
 356         pinctrl-names = "default";
 357         pinctrl-0 = <&pinctrl_uart1_default>;
 358 };
 359
 360 &usb0 {
 361         status = "okay";
 362         dr_mode = "host";
 363         usb-phy = <&usb_phy0>;
 364         pinctrl-names = "default";
 365         pinctrl-0 = <&pinctrl_usb0_default>;
 366 };