arch/arm/boot/dts/lpc32xx.dtsi

   1 /*
   2  * NXP LPC32xx SoC
   3  *
   4  * Copyright 2012 Roland Stigge <stigge@antcom.de>
   5  *
   6  * The code contained herein is licensed under the GNU General Public
   7  * License. You may obtain a copy of the GNU General Public License
   8  * Version 2 or later at the following locations:
   9  *
  10  * http://www.opensource.org/licenses/gpl-license.html
  11  * http://www.gnu.org/copyleft/gpl.html
  12  */
  13
  14 /include/ "skeleton.dtsi"
  15
  16 / {
  17         compatible = "nxp,lpc3220";
  18         interrupt-parent = <&mic>;
  19
  20         cpus {
  21                 cpu@0 {
  22                         compatible = "arm,arm926ejs";
  23                 };
  24         };
  25
  26         ahb {
  27                 #address-cells = <1>;
  28                 #size-cells = <1>;
  29                 compatible = "simple-bus";
  30                 ranges = <0x20000000 0x20000000 0x30000000>;
  31
  32                 /*
  33                  * Enable either SLC or MLC
  34                  */
  35                 slc: flash@20020000 {
  36                         compatible = "nxp,lpc3220-slc";
  37                         reg = <0x20020000 0x1000>;
  38                         status = "disable";
  39                 };
  40
  41                 mlc: flash@200B0000 {
  42                         compatible = "nxp,lpc3220-mlc";
  43                         reg = <0x200B0000 0x1000>;
  44                         status = "disable";
  45                 };
  46
  47                 dma@31000000 {
  48                         compatible = "arm,pl080", "arm,primecell";
  49                         reg = <0x31000000 0x1000>;
  50                         interrupts = <0x1c 0>;
  51                 };
  52
  53                 /*
  54                  * Enable either ohci or usbd (gadget)!
  55                  */
  56                 ohci@31020000 {
  57                         compatible = "nxp,ohci-nxp", "usb-ohci";
  58                         reg = <0x31020000 0x300>;
  59                         interrupts = <0x3b 0>;
  60                         status = "disable";
  61                 };
  62
  63                 usbd@31020000 {
  64                         compatible = "nxp,lpc3220-udc";
  65                         reg = <0x31020000 0x300>;
  66                         interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>;
  67                         status = "disable";
  68                 };
  69
  70                 clcd@31040000 {
  71                         compatible = "arm,pl110", "arm,primecell";
  72                         reg = <0x31040000 0x1000>;
  73                         interrupts = <0x0e 0>;
  74                         status = "disable";
  75                 };
  76
  77                 mac: ethernet@31060000 {
  78                         compatible = "nxp,lpc-eth";
  79                         reg = <0x31060000 0x1000>;
  80                         interrupts = <0x1d 0>;
  81                 };
  82
  83                 apb {
  84                         #address-cells = <1>;
  85                         #size-cells = <1>;
  86                         compatible = "simple-bus";
  87                         ranges = <0x20000000 0x20000000 0x30000000>;
  88
  89                         ssp0: ssp@20084000 {
  90                                 compatible = "arm,pl022", "arm,primecell";
  91                                 reg = <0x20084000 0x1000>;
  92                                 interrupts = <0x14 0>;
  93                         };
  94
  95                         spi1: spi@20088000 {
  96                                 compatible = "nxp,lpc3220-spi";
  97                                 reg = <0x20088000 0x1000>;
  98                         };
  99
 100                         ssp1: ssp@2008c000 {
 101                                 compatible = "arm,pl022", "arm,primecell";
 102                                 reg = <0x2008c000 0x1000>;
 103                                 interrupts = <0x15 0>;
 104                         };
 105
 106                         spi2: spi@20090000 {
 107                                 compatible = "nxp,lpc3220-spi";
 108                                 reg = <0x20090000 0x1000>;
 109                         };
 110
 111                         i2s0: i2s@20094000 {
 112                                 compatible = "nxp,lpc3220-i2s";
 113                                 reg = <0x20094000 0x1000>;
 114                         };
 115
 116                         sd@20098000 {
 117                                 compatible = "arm,pl180", "arm,primecell";
 118                                 reg = <0x20098000 0x1000>;
 119                                 interrupts = <0x0f 0>, <0x0d 0>;
 120                         };
 121
 122                         i2s1: i2s@2009C000 {
 123                                 compatible = "nxp,lpc3220-i2s";
 124                                 reg = <0x2009C000 0x1000>;
 125                         };
 126
 127                         uart3: serial@40080000 {
 128                                 compatible = "nxp,serial";
 129                                 reg = <0x40080000 0x1000>;
 130                         };
 131
 132                         uart4: serial@40088000 {
 133                                 compatible = "nxp,serial";
 134                                 reg = <0x40088000 0x1000>;
 135                         };
 136
 137                         uart5: serial@40090000 {
 138                                 compatible = "nxp,serial";
 139                                 reg = <0x40090000 0x1000>;
 140                         };
 141
 142                         uart6: serial@40098000 {
 143                                 compatible = "nxp,serial";
 144                                 reg = <0x40098000 0x1000>;
 145                         };
 146
 147                         i2c1: i2c@400A0000 {
 148                                 compatible = "nxp,pnx-i2c";
 149                                 reg = <0x400A0000 0x100>;
 150                                 interrupts = <0x33 0>;
 151                                 #address-cells = <1>;
 152                                 #size-cells = <0>;
 153                                 pnx,timeout = <0x64>;
 154                         };
 155
 156                         i2c2: i2c@400A8000 {
 157                                 compatible = "nxp,pnx-i2c";
 158                                 reg = <0x400A8000 0x100>;
 159                                 interrupts = <0x32 0>;
 160                                 #address-cells = <1>;
 161                                 #size-cells = <0>;
 162                                 pnx,timeout = <0x64>;
 163                         };
 164
 165                         i2cusb: i2c@31020300 {
 166                                 compatible = "nxp,pnx-i2c";
 167                                 reg = <0x31020300 0x100>;
 168                                 interrupts = <0x3f 0>;
 169                                 #address-cells = <1>;
 170                                 #size-cells = <0>;
 171                                 pnx,timeout = <0x64>;
 172                         };
 173                 };
 174
 175                 fab {
 176                         #address-cells = <1>;
 177                         #size-cells = <1>;
 178                         compatible = "simple-bus";
 179                         ranges = <0x20000000 0x20000000 0x30000000>;
 180
 181                         /*
 182                          * MIC Interrupt controller includes:
 183                          *   MIC @40008000
 184                          *   SIC1 @4000C000
 185                          *   SIC2 @40010000
 186                          */
 187                         mic: interrupt-controller@40008000 {
 188                                 compatible = "nxp,lpc3220-mic";
 189                                 interrupt-controller;
 190                                 reg = <0x40008000 0xC000>;
 191                                 #interrupt-cells = <2>;
 192                         };
 193
 194                         uart1: serial@40014000 {
 195                                 compatible = "nxp,serial";
 196                                 reg = <0x40014000 0x1000>;
 197                         };
 198
 199                         uart2: serial@40018000 {
 200                                 compatible = "nxp,serial";
 201                                 reg = <0x40018000 0x1000>;
 202                         };
 203
 204                         uart7: serial@4001C000 {
 205                                 compatible = "nxp,serial";
 206                                 reg = <0x4001C000 0x1000>;
 207                         };
 208
 209                         rtc@40024000 {
 210                                 compatible = "nxp,lpc3220-rtc";
 211                                 reg = <0x40024000 0x1000>;
 212                                 interrupts = <0x34 0>;
 213                         };
 214
 215                         gpio: gpio@40028000 {
 216                                 compatible = "nxp,lpc3220-gpio";
 217                                 reg = <0x40028000 0x1000>;
 218                                 /* create a private address space for enumeration */
 219                                 #address-cells = <1>;
 220                                 #size-cells = <0>;
 221
 222                                 gpio_p0: gpio-bank@0 {
 223                                         gpio-controller;
 224                                         #gpio-cells = <2>;
 225                                         reg = <0>;
 226                                 };
 227
 228                                 gpio_p1: gpio-bank@1 {
 229                                         gpio-controller;
 230                                         #gpio-cells = <2>;
 231                                         reg = <1>;
 232                                 };
 233
 234                                 gpio_p2: gpio-bank@2 {
 235                                         gpio-controller;
 236                                         #gpio-cells = <2>;
 237                                         reg = <2>;
 238                                 };
 239
 240                                 gpio_p3: gpio-bank@3 {
 241                                         gpio-controller;
 242                                         #gpio-cells = <2>;
 243                                         reg = <3>;
 244                                 };
 245
 246                                 gpi_p3: gpio-bank@4 {
 247                                         gpio-controller;
 248                                         #gpio-cells = <2>;
 249                                         reg = <4>;
 250                                 };
 251
 252                                 gpo_p3: gpio-bank@5 {
 253                                         gpio-controller;
 254                                         #gpio-cells = <2>;
 255                                         reg = <5>;
 256                                 };
 257                         };
 258
 259                         watchdog@4003C000 {
 260                                 compatible = "nxp,pnx4008-wdt";
 261                                 reg = <0x4003C000 0x1000>;
 262                         };
 263
 264                         /*
 265                          * TSC vs. ADC: Since those two share the same
 266                          * hardware, you need to choose from one of the
 267                          * following two and do 'status = "okay";' for one of
 268                          * them
 269                          */
 270
 271                         adc@40048000 {
 272                                 compatible = "nxp,lpc3220-adc";
 273                                 reg = <0x40048000 0x1000>;
 274                                 interrupts = <0x27 0>;
 275                                 status = "disable";
 276                         };
 277
 278                         tsc@40048000 {
 279                                 compatible = "nxp,lpc3220-tsc";
 280                                 reg = <0x40048000 0x1000>;
 281                                 interrupts = <0x27 0>;
 282                                 status = "disable";
 283                         };
 284
 285                         key@40050000 {
 286                                 compatible = "nxp,lpc3220-key";
 287                                 reg = <0x40050000 0x1000>;
 288                         };
 289
 290                 };
 291         };
 292 };