arch/arm/boot/dts/imx6qdl-sabrelite.dtsi

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/input.h>
  14
  15 / {
  16         chosen {
  17                 stdout-path = &uart2;
  18         };
  19
  20         memory {
  21                 reg = <0x10000000 0x40000000>;
  22         };
  23
  24         regulators {
  25                 compatible = "simple-bus";
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 reg_2p5v: regulator@0 {
  30                         compatible = "regulator-fixed";
  31                         reg = <0>;
  32                         regulator-name = "2P5V";
  33                         regulator-min-microvolt = <2500000>;
  34                         regulator-max-microvolt = <2500000>;
  35                         regulator-always-on;
  36                 };
  37
  38                 reg_3p3v: regulator@1 {
  39                         compatible = "regulator-fixed";
  40                         reg = <1>;
  41                         regulator-name = "3P3V";
  42                         regulator-min-microvolt = <3300000>;
  43                         regulator-max-microvolt = <3300000>;
  44                         regulator-always-on;
  45                 };
  46
  47                 reg_usb_otg_vbus: regulator@2 {
  48                         compatible = "regulator-fixed";
  49                         reg = <2>;
  50                         regulator-name = "usb_otg_vbus";
  51                         regulator-min-microvolt = <5000000>;
  52                         regulator-max-microvolt = <5000000>;
  53                         gpio = <&gpio3 22 0>;
  54                         enable-active-high;
  55                 };
  56         };
  57
  58         gpio-keys {
  59                 compatible = "gpio-keys";
  60                 pinctrl-names = "default";
  61                 pinctrl-0 = <&pinctrl_gpio_keys>;
  62
  63                 power {
  64                         label = "Power Button";
  65                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  66                         linux,code = <KEY_POWER>;
  67                         gpio-key,wakeup;
  68                 };
  69
  70                 menu {
  71                         label = "Menu";
  72                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  73                         linux,code = <KEY_MENU>;
  74                 };
  75
  76                 home {
  77                         label = "Home";
  78                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  79                         linux,code = <KEY_HOME>;
  80                 };
  81
  82                 back {
  83                         label = "Back";
  84                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  85                         linux,code = <KEY_BACK>;
  86                 };
  87
  88                 volume-up {
  89                         label = "Volume Up";
  90                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
  91                         linux,code = <KEY_VOLUMEUP>;
  92                 };
  93
  94                 volume-down {
  95                         label = "Volume Down";
  96                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
  97                         linux,code = <KEY_VOLUMEDOWN>;
  98                 };
  99         };
 100
 101         sound {
 102                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
 103                              "fsl,imx-audio-sgtl5000";
 104                 model = "imx6q-sabrelite-sgtl5000";
 105                 ssi-controller = <&ssi1>;
 106                 audio-codec = <&codec>;
 107                 audio-routing =
 108                         "MIC_IN", "Mic Jack",
 109                         "Mic Jack", "Mic Bias",
 110                         "Headphone Jack", "HP_OUT";
 111                 mux-int-port = <1>;
 112                 mux-ext-port = <4>;
 113         };
 114
 115         backlight_lcd {
 116                 compatible = "pwm-backlight";
 117                 pwms = <&pwm1 0 5000000>;
 118                 brightness-levels = <0 4 8 16 32 64 128 255>;
 119                 default-brightness-level = <7>;
 120                 power-supply = <&reg_3p3v>;
 121                 status = "okay";
 122         };
 123
 124         backlight_lvds: backlight_lvds {
 125                 compatible = "pwm-backlight";
 126                 pwms = <&pwm4 0 5000000>;
 127                 brightness-levels = <0 4 8 16 32 64 128 255>;
 128                 default-brightness-level = <7>;
 129                 power-supply = <&reg_3p3v>;
 130                 status = "okay";
 131         };
 132
 133         panel {
 134                 compatible = "hannstar,hsd100pxn1";
 135                 backlight = <&backlight_lvds>;
 136
 137                 port {
 138                         panel_in: endpoint {
 139                                 remote-endpoint = <&lvds0_out>;
 140                         };
 141                 };
 142         };
 143 };
 144
 145 &audmux {
 146         pinctrl-names = "default";
 147         pinctrl-0 = <&pinctrl_audmux>;
 148         status = "okay";
 149 };
 150
 151 &ecspi1 {
 152         fsl,spi-num-chipselects = <1>;
 153         cs-gpios = <&gpio3 19 0>;
 154         pinctrl-names = "default";
 155         pinctrl-0 = <&pinctrl_ecspi1>;
 156         status = "okay";
 157
 158         flash: m25p80@0 {
 159                 compatible = "sst,sst25vf016b";
 160                 spi-max-frequency = <20000000>;
 161                 reg = <0>;
 162         };
 163 };
 164
 165 &fec {
 166         pinctrl-names = "default";
 167         pinctrl-0 = <&pinctrl_enet>;
 168         phy-mode = "rgmii";
 169         phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
 170         txen-skew-ps = <0>;
 171         txc-skew-ps = <3000>;
 172         rxdv-skew-ps = <0>;
 173         rxc-skew-ps = <3000>;
 174         rxd0-skew-ps = <0>;
 175         rxd1-skew-ps = <0>;
 176         rxd2-skew-ps = <0>;
 177         rxd3-skew-ps = <0>;
 178         txd0-skew-ps = <0>;
 179         txd1-skew-ps = <0>;
 180         txd2-skew-ps = <0>;
 181         txd3-skew-ps = <0>;
 182         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 183                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 184         status = "okay";
 185 };
 186
 187 &hdmi {
 188         ddc-i2c-bus = <&i2c2>;
 189         status = "okay";
 190 };
 191
 192 &i2c1 {
 193         clock-frequency = <100000>;
 194         pinctrl-names = "default";
 195         pinctrl-0 = <&pinctrl_i2c1>;
 196         status = "okay";
 197
 198         codec: sgtl5000@0a {
 199                 compatible = "fsl,sgtl5000";
 200                 reg = <0x0a>;
 201                 clocks = <&clks 201>;
 202                 VDDA-supply = <&reg_2p5v>;
 203                 VDDIO-supply = <&reg_3p3v>;
 204         };
 205 };
 206
 207 &i2c2 {
 208         clock-frequency = <100000>;
 209         pinctrl-names = "default";
 210         pinctrl-0 = <&pinctrl_i2c2>;
 211         status = "okay";
 212 };
 213
 214 &i2c3 {
 215         clock-frequency = <100000>;
 216         pinctrl-names = "default";
 217         pinctrl-0 = <&pinctrl_i2c3>;
 218         status = "okay";
 219 };
 220
 221 &iomuxc {
 222         pinctrl-names = "default";
 223         pinctrl-0 = <&pinctrl_hog>;
 224
 225         imx6q-sabrelite {
 226                 pinctrl_hog: hoggrp {
 227                         fsl,pins = <
 228                                 /* SGTL5000 sys_mclk */
 229                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
 230                         >;
 231                 };
 232
 233                 pinctrl_audmux: audmuxgrp {
 234                         fsl,pins = <
 235                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 236                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 237                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 238                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 239                         >;
 240                 };
 241
 242                 pinctrl_ecspi1: ecspi1grp {
 243                         fsl,pins = <
 244                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 245                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 246                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 247                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
 248                         >;
 249                 };
 250
 251                 pinctrl_enet: enetgrp {
 252                         fsl,pins = <
 253                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 254                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 255                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
 256                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
 257                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
 258                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
 259                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
 260                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
 261                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 262                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 263                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 264                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 265                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 266                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 267                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 268                                 /* Phy reset */
 269                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x000b0
 270                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 271                         >;
 272                 };
 273
 274                 pinctrl_gpio_keys: gpio_keysgrp {
 275                         fsl,pins = <
 276                                 /* Power Button */
 277                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 278                                 /* Menu Button */
 279                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 280                                 /* Home Button */
 281                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 282                                 /* Back Button */
 283                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
 284                                 /* Volume Up Button */
 285                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 286                                 /* Volume Down Button */
 287                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 288                         >;
 289                 };
 290
 291                 pinctrl_i2c1: i2c1grp {
 292                         fsl,pins = <
 293                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 294                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 295                         >;
 296                 };
 297
 298                 pinctrl_i2c2: i2c2grp {
 299                         fsl,pins = <
 300                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 301                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 302                         >;
 303                 };
 304
 305                 pinctrl_i2c3: i2c3grp {
 306                         fsl,pins = <
 307                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
 308                                 MX6QDL_PAD_GPIO_16__I2C3_SDA            0x4001b8b1
 309                         >;
 310                 };
 311
 312                 pinctrl_pwm1: pwm1grp {
 313                         fsl,pins = <
 314                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
 315                         >;
 316                 };
 317
 318                 pinctrl_pwm3: pwm3grp {
 319                         fsl,pins = <
 320                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
 321                         >;
 322                 };
 323
 324                 pinctrl_pwm4: pwm4grp {
 325                         fsl,pins = <
 326                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
 327                         >;
 328                 };
 329
 330                 pinctrl_uart1: uart1grp {
 331                         fsl,pins = <
 332                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 333                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 334                         >;
 335                 };
 336
 337                 pinctrl_uart2: uart2grp {
 338                         fsl,pins = <
 339                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 340                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 341                         >;
 342                 };
 343
 344                 pinctrl_usbotg: usbotggrp {
 345                         fsl,pins = <
 346                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 347                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
 348                                 /* power enable, high active */
 349                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
 350                         >;
 351                 };
 352
 353                 pinctrl_usdhc3: usdhc3grp {
 354                         fsl,pins = <
 355                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 356                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 357                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 358                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 359                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 360                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 361                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
 362                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
 363                         >;
 364                 };
 365
 366                 pinctrl_usdhc4: usdhc4grp {
 367                         fsl,pins = <
 368                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 369                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 370                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 371                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 372                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 373                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 374                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
 375                         >;
 376                 };
 377         };
 378 };
 379
 380 &ldb {
 381         status = "okay";
 382
 383         lvds-channel@0 {
 384                 fsl,data-mapping = "spwg";
 385                 fsl,data-width = <18>;
 386                 status = "okay";
 387
 388                 port@4 {
 389                         reg = <4>;
 390
 391                         lvds0_out: endpoint {
 392                                 remote-endpoint = <&panel_in>;
 393                         };
 394                 };
 395         };
 396 };
 397
 398 &pcie {
 399         status = "okay";
 400 };
 401
 402 &pwm1 {
 403         pinctrl-names = "default";
 404         pinctrl-0 = <&pinctrl_pwm1>;
 405         status = "okay";
 406 };
 407
 408 &pwm3 {
 409         pinctrl-names = "default";
 410         pinctrl-0 = <&pinctrl_pwm3>;
 411         status = "okay";
 412 };
 413
 414 &pwm4 {
 415         pinctrl-names = "default";
 416         pinctrl-0 = <&pinctrl_pwm4>;
 417         status = "okay";
 418 };
 419
 420 &ssi1 {
 421         status = "okay";
 422 };
 423
 424 &uart1 {
 425         pinctrl-names = "default";
 426         pinctrl-0 = <&pinctrl_uart1>;
 427         status = "okay";
 428 };
 429
 430 &uart2 {
 431         pinctrl-names = "default";
 432         pinctrl-0 = <&pinctrl_uart2>;
 433         status = "okay";
 434 };
 435
 436 &usbh1 {
 437         status = "okay";
 438 };
 439
 440 &usbotg {
 441         vbus-supply = <&reg_usb_otg_vbus>;
 442         pinctrl-names = "default";
 443         pinctrl-0 = <&pinctrl_usbotg>;
 444         disable-over-current;
 445         status = "okay";
 446 };
 447
 448 &usdhc3 {
 449         pinctrl-names = "default";
 450         pinctrl-0 = <&pinctrl_usdhc3>;
 451         cd-gpios = <&gpio7 0 0>;
 452         wp-gpios = <&gpio7 1 0>;
 453         vmmc-supply = <&reg_3p3v>;
 454         status = "okay";
 455 };
 456
 457 &usdhc4 {
 458         pinctrl-names = "default";
 459         pinctrl-0 = <&pinctrl_usdhc4>;
 460         cd-gpios = <&gpio2 6 0>;
 461         vmmc-supply = <&reg_3p3v>;
 462         status = "okay";
 463 };