MIPS: Read CPU IRQ line that FDC to routed to
[linux-drm-fsl-dcu.git] / arch / mips / kernel / traps.c
index 424567cfeb3d3609f0c1bf1ed732171c44793599..b0210b0651978ab6d6d5fd9bd23266a6058af50c 100644 (file)
@@ -1969,6 +1969,12 @@ int cp0_compare_irq_shift;
 int cp0_perfcount_irq;
 EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
 
+/*
+ * Fast debug channel IRQ or -1 if not present
+ */
+int cp0_fdc_irq;
+EXPORT_SYMBOL_GPL(cp0_fdc_irq);
+
 static int noulri;
 
 static int __init ulri_disable(char *s)
@@ -2050,15 +2056,21 @@ void per_cpu_trap_init(bool is_boot_cpu)
         *
         *  o read IntCtl.IPTI to determine the timer interrupt
         *  o read IntCtl.IPPCI to determine the performance counter interrupt
+        *  o read IntCtl.IPFDC to determine the fast debug channel interrupt
         */
        if (cpu_has_mips_r2_r6) {
                cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
                cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
                cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
+               cp0_fdc_irq = (read_c0_intctl() >> INTCTLB_IPFDC) & 7;
+               if (!cp0_fdc_irq)
+                       cp0_fdc_irq = -1;
+
        } else {
                cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
                cp0_compare_irq_shift = CP0_LEGACY_PERFCNT_IRQ;
                cp0_perfcount_irq = -1;
+               cp0_fdc_irq = -1;
        }
 
        if (!cpu_data[cpu].asid_cache)