* SPDX-License-Identifier: GPL-2.0+
*/
+#include <asm/errno.h>
#include <asm/io.h>
#include <common.h>
+#include <fdt_support.h>
#include <fsl_dcu_fb.h>
#include <linux/fb.h>
#include <malloc.h>
#define BPP_24_RGB888 5
#define BPP_32_ARGB8888 6
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* This setting is used for the TWR_LCD_RGB card
*/
struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR;
unsigned int div, mode;
- /* Memory allocation for framebuffer */
info.screen_size =
info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8);
- info.screen_base = (char *)memalign(ARCH_DMA_MINALIGN,
- roundup(info.screen_size, ARCH_DMA_MINALIGN));
+
+ if (info.screen_size > CONFIG_FSL_DCU_MAX_FB_SIZE)
+ return -ENOMEM;
+
+ /* Reserve framebuffer at the end of memory */
+ gd->fb_base = gd->bd->bi_dram[0].start +
+ gd->bd->bi_dram[0].size - info.screen_size;
+ info.screen_base = (char *)gd->fb_base;
memset(info.screen_base, 0, info.screen_size);
reset_total_layers();
return 0;
}
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ return gd->ram_top - CONFIG_FSL_DCU_MAX_FB_SIZE;
+}
+
void *video_hw_init(void)
{
static GraphicDevice ctfb;
return &ctfb;
}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+int fsl_dcu_fixedfb_setup(void *blob)
+{
+ u64 start, size;
+ int ret;
+
+ start = gd->bd->bi_dram[0].start;
+ size = gd->fb_base - gd->bd->bi_dram[0].start;
+ ret = fdt_fixup_memory_banks(blob, &start, &size, 1);
+ if (ret) {
+ eprintf("Cannot setup fb: Error reserving memory\n");
+ return ret;
+ }
+
+ return 0;
+}
+#endif
#include <asm/arch/imx-regs.h>
#include <config_cmd_default.h>
+#include <linux/sizes.h>
#define CONFIG_VF610
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_MXC_OCOTP
#endif
+#define CONFIG_OF_BOARD_SETUP
+
#define CONFIG_FSL_DCU_FB
#ifdef CONFIG_FSL_DCU_FB
#define CONFIG_SYS_FSL_DCU_LE
#define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
+#define CONFIG_FSL_DCU_MAX_FB_SIZE (4 * SZ_1M)
#define DCU_TOTAL_LAYER_NUM 64
#define DCU_LAYER_MAX_NUM 6
#endif
* Stack sizes
* The stack sizes are set up in start.S using the settings below
*/
-#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
+#define CONFIG_STACKSIZE SZ_256K
/* Physical memory map */
#define CONFIG_NR_DRAM_BANKS 1
int fsl_dcu_init(unsigned int xres, unsigned int yres,
unsigned int pixel_format);
+int fsl_dcu_fixedfb_setup(void *blob);
/* Prototypes for external board-specific functions */
int platform_dcu_init(unsigned int xres, unsigned int yres,