From 4afae47b93412d57028935a84030b6b5676e4284 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Sun, 11 May 2014 18:35:42 +0200 Subject: [PATCH] ARM: tegra: initial add of Apalis T30 2GB This patch adds the device tree to support Toradex Apalis T30, a computer on module which can be used on different carrier boards. The module consists of a Tegra 30 SoC, two PMIC, DDR3L RAM, eMMC and a Intel Ethernet Controller I210. The Ethernet Controller is connected through the PCI-E bus. If the IGB driver is enabled, the Ethernet Controller is detected by the PCI subsystem. Automatic detection has been tested and proved functional. Furthermore, there is a STMPE811, a SGTL5000 audio codec, and two MCP2515 SPI CAN interfaces which are not yet supported. Anything that is not self contained on the module is disabled by default. The device tree for the Evaluation Board includes the modules device tree and enables the supported pheripherials of the carrier board (the Evaluation Board supports almost all of them). PCI-E works for PCI-E x4 and is proved functional too. PCI-E x1 is connected through a Hub which is not yet tested. The wakeup key is defined by the Apalis standard as wakeup pin for resume. --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/tegra30-apalis-2048-on-eval.dts | 111 ++++++ arch/arm/boot/dts/tegra30-apalis-2048.dtsi | 361 ++++++++++++++++++ 3 files changed, 473 insertions(+) create mode 100644 arch/arm/boot/dts/tegra30-apalis-2048-on-eval.dts create mode 100644 arch/arm/boot/dts/tegra30-apalis-2048.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e5180762a08c..87d353a1944b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -368,6 +368,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra30-cardhu-a02.dtb \ tegra30-cardhu-a04.dtb \ tegra30-colibri-on-eval.dtb \ + tegra30-apalis-2048-on-eval.dtb \ tegra114-dalmore.dtb \ tegra124-venice2.dtb dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ diff --git a/arch/arm/boot/dts/tegra30-apalis-2048-on-eval.dts b/arch/arm/boot/dts/tegra30-apalis-2048-on-eval.dts new file mode 100644 index 000000000000..800432855cc0 --- /dev/null +++ b/arch/arm/boot/dts/tegra30-apalis-2048-on-eval.dts @@ -0,0 +1,111 @@ +/dts-v1/; + +#include +#include "tegra30-apalis-2048.dtsi" + +/ { + model = "Toradex Apalis T30 on Evaluation Board"; + compatible = "toradex,apalis-t30-eval", "nvidia,tegra30"; + + pcie-controller@00003000 { + status = "okay"; + + pci@1,0 { + status = "okay"; + }; + + pci@3,0 { + status = "okay"; + }; + }; + + host1x@50000000 { + hdmi@54280000 { + status = "okay"; + }; + }; + + serial@70006000 { + status = "okay"; + }; + + serial@70006040 { + compatible = "nvidia,tegra30-hsuart"; + status = "okay"; + }; + + serial@70006200 { + compatible = "nvidia,tegra30-hsuart"; + status = "okay"; + }; + + serial@70006300 { + compatible = "nvidia,tegra30-hsuart"; + status = "okay"; + }; + + hdmiddc: i2c@7000c700 { + status = "okay"; + }; + + /* EHCI instance 0: USB1_DP/N -> USB1_DP/N */ + usb@7d000000 { + status = "okay"; + }; + + usb-phy@7d000000 { + vbus-supply = <&usb1_vbus_reg>; + status = "okay"; + }; + + /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */ + usb@7d004000 { + status = "okay"; + }; + + usb-phy@7d004000 { + vbus-supply = <&usbh_vbus_reg>; + status = "okay"; + }; + + /* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */ + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + vbus-supply = <&usbh_vbus_reg>; + status = "okay"; + }; + + regulators { + sys_5v0_reg: regulator@1 { + compatible = "regulator-fixed"; + reg = <101>; + regulator-name = "5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + usb1_vbus_reg: regulator@2 { + compatible = "regulator-fixed"; + reg = <102>; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_LOW>; + vin-supply = <&sys_5v0_reg>; + }; + + usbh_vbus_reg: regulator@3 { + compatible = "regulator-fixed"; + reg = <103>; + regulator-name = "usbh_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_LOW>; + vin-supply = <&sys_5v0_reg>; + }; + }; +}; diff --git a/arch/arm/boot/dts/tegra30-apalis-2048.dtsi b/arch/arm/boot/dts/tegra30-apalis-2048.dtsi new file mode 100644 index 000000000000..ade6c8f9fe2d --- /dev/null +++ b/arch/arm/boot/dts/tegra30-apalis-2048.dtsi @@ -0,0 +1,361 @@ +#include "tegra30.dtsi" + +/** + * Toradex Apalis T30 2GB device tree + * Compatible for Revisions 1.0B/1.0C + */ +/ { + model = "Toradex Apalis T30 2GB"; + compatible = "toradex,apalis_t30-2048-v10b", + "toradex,apalis_t30-2048-v10c", + "toradex,apalis_t30-2048", "nvidia,tegra30"; + + alias { + serial0 = &uarta; + serial1 = &uartd; + serial2 = &uartb; + serial3 = &uartc; + }; + + memory { + reg = <0x80000000 0x7ff00000>; + }; + + pcie-controller@00003000 { + pex-clk-supply = <&sys_3v3_reg>; + vdd-supply = <&vdd2_reg>; + avdd-supply = <&ldo6_reg>; + + pci@1,0 { + nvidia,num-lanes = <4>; + }; + + pci@2,0 { + nvidia,num-lanes = <1>; + }; + + pci@3,0 { + nvidia,num-lanes = <1>; + }; + }; + + host1x@50000000 { + hdmi@54280000 { + vdd-supply = <&sys_3v3_reg>; + pll-supply = <&vio_reg>; + + nvidia,hpd-gpio = + <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; + nvidia,ddc-i2c-bus = <&hdmiddc>; + }; + }; + + pinmux@70000868 { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + /* SD-Card Slot */ + kb_row10_ps2 { + nvidia,pins = "kb_row10_ps2"; + nvidia,function = "sdmmc2"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + kb_row11_ps3 { + nvidia,pins = "kb_row11_ps3", + "kb_row12_ps4", + "kb_row13_ps5", + "kb_row14_ps6", + "kb_row15_ps7"; + nvidia,function = "sdmmc2"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + }; + + /* eMMC */ + sdmmc4_clk_pcc4 { + nvidia,pins = "sdmmc4_clk_pcc4", + "sdmmc4_rst_n_pcc3"; + nvidia,function = "sdmmc4"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + sdmmc4_dat0_paa0 { + nvidia,pins = "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + }; + + /* UART1 */ + ulpi_data0 { + nvidia,pins = "ulpi_data0_po1", + "ulpi_data1_po2", + "ulpi_data2_po3", + "ulpi_data3_po4", + "ulpi_data4_po5", + "ulpi_data5_po6", + "ulpi_data6_po7", + "ulpi_data7_po0"; + nvidia,function = "uarta"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + + /* UART2 */ + ulpi_clk_py0 { + nvidia,pins = "ulpi_clk_py0", + "ulpi_dir_py1", + "ulpi_nxt_py2", + "ulpi_stp_py3"; + nvidia,function = "uartd"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + + /* UART3 */ + uart2_rxd_pc3 { + nvidia,pins = "uart2_rxd_pc3", + "uart2_txd_pc2"; + nvidia,function = "uartb"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + + /* UART4 */ + uart3_rxd_pw7 { + nvidia,pins = "uart3_rxd_pw7", + "uart3_txd_pw6"; + nvidia,function = "uartc"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + }; + }; + + hdmiddc: i2c@7000c700 { + clock-frequency = <100000>; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + pmic: tps65911@2d { + compatible = "ti,tps65911"; + reg = <0x2d>; + + interrupts = ; + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + vcc1-supply = <&sys_3v3_reg>; + vcc2-supply = <&sys_3v3_reg>; + vcc3-supply = <&vio_reg>; + vcc4-supply = <&sys_3v3_reg>; + vcc5-supply = <&sys_3v3_reg>; + vcc6-supply = <&vio_reg>; + vcc7-supply = <&sys_5v0_reg>; + vccio-supply = <&sys_3v3_reg>; + + regulators { + /* SW1: +V1.35_VDDIO_DDR */ + vdd1_reg: vdd1 { + regulator-name = "vddio_ddr_1v35"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + /* SW2: +V1.05 */ + vdd2_reg: vdd2 { + regulator-name = "vdd_pexa,vdd_pexb,vdd_sata"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + /* SW CTRL: +V1.0_VDD_CPU */ + vddctrl_reg: vddctrl { + regulator-name = "vdd_cpu,vdd_sys"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + /* SWIO: +V1.8 */ + vio_reg: vio { + regulator-name = "vdd_1v8_gen"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + /* LDO1 unused */ + + /* + * EN_+V3.3 switching via FET: + * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN + * see also v3_3 fixed supply + */ + ldo2_reg: ldo2 { + regulator-name = "en_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + /* +V1.2_CSI */ + ldo3_reg: ldo3 { + regulator-name = "avdd_dsi_csi,pwrdet_mipi"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + /* +V1.2_VDD_RTC */ + ldo4_reg: ldo4 { + regulator-name = "vdd_rtc"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + /* + * +V2.8_AVDD_VDAC + * only required for analog RGB + */ + ldo5_reg: ldo5 { + regulator-name = "avdd_vdac"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + /* +V1.05_AVDD_PLLE */ + /* avdd_plle should be 1.05V but LDO6 can't set + * voltage in 50mV granularity + */ + ldo6_reg: ldo6 { + regulator-name = "avdd_plle"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + + /* +V1.2_AVDD_PLL */ + ldo7_reg: ldo7 { + regulator-name = "avdd_pll"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + /* +V1.0_VDD_DDR_HS */ + ldo8_reg: ldo8 { + regulator-name = "vdd_ddr_hs"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + }; + }; + + /* SW: +V1.2_VDD_CORE */ + tps62362@60 { + compatible = "ti,tps62362"; + reg = <0x60>; + + regulator-name = "tps62362-vout"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-boot-on; + regulator-always-on; + ti,vsel0-state-low; + ti,vsel1-state-high; + }; + }; + + pmc@7000e400 { + status = "okay"; + nvidia,invert-interrupt; + nvidia,suspend-mode = <1>; + nvidia,cpu-pwr-good-time = <5000>; + nvidia,cpu-pwr-off-time = <5000>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <0>; + nvidia,core-power-req-active-high; + nvidia,sys-clock-req-active-high; + }; + + sdhci@78000000 { + status = "okay"; + bus-width = <4>; + cd-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_LOW>; + no-1-8-v; + }; + + sdhci@78000400 { + status = "okay"; + bus-width = <8>; + cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>; + no-1-8-v; + }; + + /* eMMC */ + sdhci@78000600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; + linux,code = ; + debounce-interval = <10>; + gpio-key,wakeup; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + sys_3v3_reg: regulator@100 { + compatible = "regulator-fixed"; + reg = <100>; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; +}; -- 2.34.1