Merge branch 'async-scsi-resume' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux.git] / arch / arm / boot / dts / r8a7790-lager.dts

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 57569cba152856d634ccb68474b0647012624b52..6e99eb2df076d7f1c7cdfdac46733c968256c0dd 100644 (file)
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -1,7 +1,8 @@
 /*
  * Device Tree Source for the Lager board
  *
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Cogent Embedded, Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
@@ -56,6 +57,54 @@
                regulator-boot-on;
                regulator-always-on;
        };
+
+       vcc_sdhi0: regulator@1 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "SDHI0 Vcc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       vccq_sdhi0: regulator@2 {
+               compatible = "regulator-gpio";
+
+               regulator-name = "SDHI0 VccQ";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
+               gpios-states = <1>;
+               states = <3300000 1
+                         1800000 0>;
+       };
+
+       vcc_sdhi2: regulator@3 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "SDHI2 Vcc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       vccq_sdhi2: regulator@4 {
+               compatible = "regulator-gpio";
+
+               regulator-name = "SDHI2 VccQ";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
+               gpios-states = <1>;
+               states = <3300000 1
+                         1800000 0>;
+       };
 };
 
 &extal_clk {
@@ -63,23 +112,68 @@
 };
 
 &pfc {
-       pinctrl-0 = <&scif0_pins &scif1_pins>;
+       pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
        pinctrl-names = "default";
 
+       du_pins: du {
+               renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
+               renesas,function = "du";
+       };
+
        scif0_pins: serial0 {
                renesas,groups = "scif0_data";
                renesas,function = "scif0";
        };
 
+       ether_pins: ether {
+               renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
+               renesas,function = "eth";
+       };
+
+       phy1_pins: phy1 {
+               renesas,groups = "intc_irq0";
+               renesas,function = "intc";
+       };
+
        scif1_pins: serial1 {
                renesas,groups = "scif1_data";
                renesas,function = "scif1";
        };
 
+       sdhi0_pins: sd0 {
+               renesas,gpios = "sdhi0_data4", "sdhi0_ctrl";
+               renesas,function = "sdhi0";
+       };
+
+       sdhi2_pins: sd2 {
+               renesas,gpios = "sdhi2_data4", "sdhi2_ctrl";
+               renesas,function = "sdhi2";
+       };
+
        mmc1_pins: mmc1 {
                renesas,groups = "mmc1_data8", "mmc1_ctrl";
                renesas,function = "mmc1";
        };
+
+       qspi_pins: spi {
+               renesas,groups = "qspi_ctrl", "qspi_data4";
+               renesas,function = "qspi";
+       };
+};
+
+&ether {
+       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-names = "default";
+
+       phy-handle = <&phy1>;
+       renesas,ether-link-active-low;
+       status = "ok";
+
+       phy1: ethernet-phy@1 {
+               reg = <1>;
+               interrupt-parent = <&irqc0>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+       };
 };
 
 &mmcif1 {
@@ -91,3 +185,58 @@
        non-removable;
        status = "okay";
 };
+
+&sata1 {
+       status = "okay";
+};
+
+&spi {
+       pinctrl-0 = <&qspi_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       flash: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spansion,s25fl512s";
+               reg = <0>;
+               spi-max-frequency = <30000000>;
+               m25p,fast-read;
+
+               partition@0 {
+                       label = "loader";
+                       reg = <0x00000000 0x00040000>;
+                       read-only;
+               };
+               partition@40000 {
+                       label = "user";
+                       reg = <0x00040000 0x00400000>;
+                       read-only;
+               };
+               partition@440000 {
+                       label = "flash";
+                       reg = <0x00440000 0x03bc0000>;
+               };
+       };
+};
+
+&sdhi0 {
+       pinctrl-0 = <&sdhi0_pins>;
+       pinctrl-names = "default";
+
+       vmmc-supply = <&vcc_sdhi0>;
+       vqmmc-supply = <&vccq_sdhi0>;
+       cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&sdhi2 {
+       pinctrl-0 = <&sdhi2_pins>;
+       pinctrl-names = "default";
+
+       vmmc-supply = <&vcc_sdhi2>;
+       vqmmc-supply = <&vccq_sdhi2>;
+       cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};