Merge branch 'async-scsi-resume' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux.git] / arch / arm / boot / dts / qcom-msm8974.dtsi

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 1eff4130cde059c8291e6957533fcdeb62f26347..f68723918b3fe724fc671d1cd8045288221956c6 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -9,6 +9,49 @@
        compatible = "qcom,msm8974";
        interrupt-parent = <&intc>;
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               interrupts = <1 9 0xf04>;
+               compatible = "qcom,krait";
+               enable-method = "qcom,kpss-acc-v2";
+
+               cpu@0 {
+                       device_type = "cpu";
+                       reg = <0>;
+                       next-level-cache = <&L2>;
+                       qcom,acc = <&acc0>;
+               };
+
+               cpu@1 {
+                       device_type = "cpu";
+                       reg = <1>;
+                       next-level-cache = <&L2>;
+                       qcom,acc = <&acc1>;
+               };
+
+               cpu@2 {
+                       device_type = "cpu";
+                       reg = <2>;
+                       next-level-cache = <&L2>;
+                       qcom,acc = <&acc2>;
+               };
+
+               cpu@3 {
+                       device_type = "cpu";
+                       reg = <3>;
+                       next-level-cache = <&L2>;
+                       qcom,acc = <&acc3>;
+               };
+
+               L2: l2-cache {
+                       compatible = "cache";
+                       cache-level = <2>;
+                       interrupts = <0 2 0x4>;
+                       qcom,saw = <&saw_l2>;
+               };
+       };
+
        cpu-pmu {
                compatible = "qcom,krait-pmu";
                interrupts = <1 7 0xf04>;
@@ -96,6 +139,32 @@
                        };
                };
 
+               saw_l2: regulator@f9012000 {
+                       compatible = "qcom,saw2";
+                       reg = <0xf9012000 0x1000>;
+                       regulator;
+               };
+
+               acc0: clock-controller@f9088000 {
+                       compatible = "qcom,kpss-acc-v2";
+                       reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
+               };
+
+               acc1: clock-controller@f9098000 {
+                       compatible = "qcom,kpss-acc-v2";
+                       reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
+               };
+
+               acc2: clock-controller@f90a8000 {
+                       compatible = "qcom,kpss-acc-v2";
+                       reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
+               };
+
+               acc3: clock-controller@f90b8000 {
+                       compatible = "qcom,kpss-acc-v2";
+                       reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
+               };
+
                restart@fc4ab000 {
                        compatible = "qcom,pshold";
                        reg = <0xfc4ab000 0x4>;
@@ -122,5 +191,12 @@
                        clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
                };
+
+               rng@f9bff000 {
+                       compatible = "qcom,prng";
+                       reg = <0xf9bff000 0x200>;
+                       clocks = <&gcc GCC_PRNG_AHB_CLK>;
+                       clock-names = "core";
+               };
        };
 };