drivers/net/ethernet/intel/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2014 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, see <http://www.gnu.org/licenses/>.
  17
  18   The full GNU General Public License is included in this distribution in
  19   the file called "COPYING".
  20
  21   Contact Information:
  22   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24
  25 *******************************************************************************/
  26
  27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28
  29 #include <linux/module.h>
  30 #include <linux/types.h>
  31 #include <linux/init.h>
  32 #include <linux/bitops.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/pagemap.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/ipv6.h>
  37 #include <linux/slab.h>
  38 #include <net/checksum.h>
  39 #include <net/ip6_checksum.h>
  40 #include <linux/net_tstamp.h>
  41 #include <linux/mii.h>
  42 #include <linux/ethtool.h>
  43 #include <linux/if.h>
  44 #include <linux/if_vlan.h>
  45 #include <linux/pci.h>
  46 #include <linux/pci-aspm.h>
  47 #include <linux/delay.h>
  48 #include <linux/interrupt.h>
  49 #include <linux/ip.h>
  50 #include <linux/tcp.h>
  51 #include <linux/sctp.h>
  52 #include <linux/if_ether.h>
  53 #include <linux/aer.h>
  54 #include <linux/prefetch.h>
  55 #include <linux/pm_runtime.h>
  56 #ifdef CONFIG_IGB_DCA
  57 #include <linux/dca.h>
  58 #endif
  59 #include <linux/i2c.h>
  60 #include "igb.h"
  61
  62 #define MAJ 5
  63 #define MIN 0
  64 #define BUILD 5
  65 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  66 __stringify(BUILD) "-k"
  67 char igb_driver_name[] = "igb";
  68 char igb_driver_version[] = DRV_VERSION;
  69 static const char igb_driver_string[] =
  70                                 "Intel(R) Gigabit Ethernet Network Driver";
  71 static const char igb_copyright[] =
  72                                 "Copyright (c) 2007-2014 Intel Corporation.";
  73
  74 static const struct e1000_info *igb_info_tbl[] = {
  75         [board_82575] = &e1000_82575_info,
  76 };
  77
  78 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 114         /* required last entry */
 115         {0, }
 116 };
 117
 118 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 119
 120 void igb_reset(struct igb_adapter *);
 121 static int igb_setup_all_tx_resources(struct igb_adapter *);
 122 static int igb_setup_all_rx_resources(struct igb_adapter *);
 123 static void igb_free_all_tx_resources(struct igb_adapter *);
 124 static void igb_free_all_rx_resources(struct igb_adapter *);
 125 static void igb_setup_mrqc(struct igb_adapter *);
 126 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 127 static void igb_remove(struct pci_dev *pdev);
 128 static int igb_sw_init(struct igb_adapter *);
 129 static int igb_open(struct net_device *);
 130 static int igb_close(struct net_device *);
 131 static void igb_configure(struct igb_adapter *);
 132 static void igb_configure_tx(struct igb_adapter *);
 133 static void igb_configure_rx(struct igb_adapter *);
 134 static void igb_clean_all_tx_rings(struct igb_adapter *);
 135 static void igb_clean_all_rx_rings(struct igb_adapter *);
 136 static void igb_clean_tx_ring(struct igb_ring *);
 137 static void igb_clean_rx_ring(struct igb_ring *);
 138 static void igb_set_rx_mode(struct net_device *);
 139 static void igb_update_phy_info(unsigned long);
 140 static void igb_watchdog(unsigned long);
 141 static void igb_watchdog_task(struct work_struct *);
 142 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 143 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 144                                                  struct rtnl_link_stats64 *stats);
 145 static int igb_change_mtu(struct net_device *, int);
 146 static int igb_set_mac(struct net_device *, void *);
 147 static void igb_set_uta(struct igb_adapter *adapter);
 148 static irqreturn_t igb_intr(int irq, void *);
 149 static irqreturn_t igb_intr_msi(int irq, void *);
 150 static irqreturn_t igb_msix_other(int irq, void *);
 151 static irqreturn_t igb_msix_ring(int irq, void *);
 152 #ifdef CONFIG_IGB_DCA
 153 static void igb_update_dca(struct igb_q_vector *);
 154 static void igb_setup_dca(struct igb_adapter *);
 155 #endif /* CONFIG_IGB_DCA */
 156 static int igb_poll(struct napi_struct *, int);
 157 static bool igb_clean_tx_irq(struct igb_q_vector *);
 158 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 159 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 160 static void igb_tx_timeout(struct net_device *);
 161 static void igb_reset_task(struct work_struct *);
 162 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
 163 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 164 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 165 static void igb_restore_vlan(struct igb_adapter *);
 166 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 167 static void igb_ping_all_vfs(struct igb_adapter *);
 168 static void igb_msg_task(struct igb_adapter *);
 169 static void igb_vmm_control(struct igb_adapter *);
 170 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 171 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 172 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 173 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 174                                int vf, u16 vlan, u8 qos);
 175 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 176 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 177                                    bool setting);
 178 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 179                                  struct ifla_vf_info *ivi);
 180 static void igb_check_vf_rate_limit(struct igb_adapter *);
 181
 182 #ifdef CONFIG_PCI_IOV
 183 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 184 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 185 #endif
 186
 187 #ifdef CONFIG_PM
 188 #ifdef CONFIG_PM_SLEEP
 189 static int igb_suspend(struct device *);
 190 #endif
 191 static int igb_resume(struct device *);
 192 #ifdef CONFIG_PM_RUNTIME
 193 static int igb_runtime_suspend(struct device *dev);
 194 static int igb_runtime_resume(struct device *dev);
 195 static int igb_runtime_idle(struct device *dev);
 196 #endif
 197 static const struct dev_pm_ops igb_pm_ops = {
 198         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 199         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 200                         igb_runtime_idle)
 201 };
 202 #endif
 203 static void igb_shutdown(struct pci_dev *);
 204 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 205 #ifdef CONFIG_IGB_DCA
 206 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 207 static struct notifier_block dca_notifier = {
 208         .notifier_call  = igb_notify_dca,
 209         .next           = NULL,
 210         .priority       = 0
 211 };
 212 #endif
 213 #ifdef CONFIG_NET_POLL_CONTROLLER
 214 /* for netdump / net console */
 215 static void igb_netpoll(struct net_device *);
 216 #endif
 217 #ifdef CONFIG_PCI_IOV
 218 static unsigned int max_vfs = 0;
 219 module_param(max_vfs, uint, 0);
 220 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
 221                  "per physical function");
 222 #endif /* CONFIG_PCI_IOV */
 223
 224 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 225                      pci_channel_state_t);
 226 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 227 static void igb_io_resume(struct pci_dev *);
 228
 229 static const struct pci_error_handlers igb_err_handler = {
 230         .error_detected = igb_io_error_detected,
 231         .slot_reset = igb_io_slot_reset,
 232         .resume = igb_io_resume,
 233 };
 234
 235 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 236
 237 static struct pci_driver igb_driver = {
 238         .name     = igb_driver_name,
 239         .id_table = igb_pci_tbl,
 240         .probe    = igb_probe,
 241         .remove   = igb_remove,
 242 #ifdef CONFIG_PM
 243         .driver.pm = &igb_pm_ops,
 244 #endif
 245         .shutdown = igb_shutdown,
 246         .sriov_configure = igb_pci_sriov_configure,
 247         .err_handler = &igb_err_handler
 248 };
 249
 250 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 251 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 252 MODULE_LICENSE("GPL");
 253 MODULE_VERSION(DRV_VERSION);
 254
 255 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 256 static int debug = -1;
 257 module_param(debug, int, 0);
 258 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 259
 260 struct igb_reg_info {
 261         u32 ofs;
 262         char *name;
 263 };
 264
 265 static const struct igb_reg_info igb_reg_info_tbl[] = {
 266
 267         /* General Registers */
 268         {E1000_CTRL, "CTRL"},
 269         {E1000_STATUS, "STATUS"},
 270         {E1000_CTRL_EXT, "CTRL_EXT"},
 271
 272         /* Interrupt Registers */
 273         {E1000_ICR, "ICR"},
 274
 275         /* RX Registers */
 276         {E1000_RCTL, "RCTL"},
 277         {E1000_RDLEN(0), "RDLEN"},
 278         {E1000_RDH(0), "RDH"},
 279         {E1000_RDT(0), "RDT"},
 280         {E1000_RXDCTL(0), "RXDCTL"},
 281         {E1000_RDBAL(0), "RDBAL"},
 282         {E1000_RDBAH(0), "RDBAH"},
 283
 284         /* TX Registers */
 285         {E1000_TCTL, "TCTL"},
 286         {E1000_TDBAL(0), "TDBAL"},
 287         {E1000_TDBAH(0), "TDBAH"},
 288         {E1000_TDLEN(0), "TDLEN"},
 289         {E1000_TDH(0), "TDH"},
 290         {E1000_TDT(0), "TDT"},
 291         {E1000_TXDCTL(0), "TXDCTL"},
 292         {E1000_TDFH, "TDFH"},
 293         {E1000_TDFT, "TDFT"},
 294         {E1000_TDFHS, "TDFHS"},
 295         {E1000_TDFPC, "TDFPC"},
 296
 297         /* List Terminator */
 298         {}
 299 };
 300
 301 /* igb_regdump - register printout routine */
 302 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 303 {
 304         int n = 0;
 305         char rname[16];
 306         u32 regs[8];
 307
 308         switch (reginfo->ofs) {
 309         case E1000_RDLEN(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDLEN(n));
 312                 break;
 313         case E1000_RDH(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDH(n));
 316                 break;
 317         case E1000_RDT(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_RDT(n));
 320                 break;
 321         case E1000_RXDCTL(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_RXDCTL(n));
 324                 break;
 325         case E1000_RDBAL(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_RDBAL(n));
 328                 break;
 329         case E1000_RDBAH(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_RDBAH(n));
 332                 break;
 333         case E1000_TDBAL(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_RDBAL(n));
 336                 break;
 337         case E1000_TDBAH(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TDBAH(n));
 340                 break;
 341         case E1000_TDLEN(0):
 342                 for (n = 0; n < 4; n++)
 343                         regs[n] = rd32(E1000_TDLEN(n));
 344                 break;
 345         case E1000_TDH(0):
 346                 for (n = 0; n < 4; n++)
 347                         regs[n] = rd32(E1000_TDH(n));
 348                 break;
 349         case E1000_TDT(0):
 350                 for (n = 0; n < 4; n++)
 351                         regs[n] = rd32(E1000_TDT(n));
 352                 break;
 353         case E1000_TXDCTL(0):
 354                 for (n = 0; n < 4; n++)
 355                         regs[n] = rd32(E1000_TXDCTL(n));
 356                 break;
 357         default:
 358                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 359                 return;
 360         }
 361
 362         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 363         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 364                 regs[2], regs[3]);
 365 }
 366
 367 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 368 static void igb_dump(struct igb_adapter *adapter)
 369 {
 370         struct net_device *netdev = adapter->netdev;
 371         struct e1000_hw *hw = &adapter->hw;
 372         struct igb_reg_info *reginfo;
 373         struct igb_ring *tx_ring;
 374         union e1000_adv_tx_desc *tx_desc;
 375         struct my_u0 { u64 a; u64 b; } *u0;
 376         struct igb_ring *rx_ring;
 377         union e1000_adv_rx_desc *rx_desc;
 378         u32 staterr;
 379         u16 i, n;
 380
 381         if (!netif_msg_hw(adapter))
 382                 return;
 383
 384         /* Print netdevice Info */
 385         if (netdev) {
 386                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 387                 pr_info("Device Name     state            trans_start      "
 388                         "last_rx\n");
 389                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 390                         netdev->state, netdev->trans_start, netdev->last_rx);
 391         }
 392
 393         /* Print Registers */
 394         dev_info(&adapter->pdev->dev, "Register Dump\n");
 395         pr_info(" Register Name   Value\n");
 396         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 397              reginfo->name; reginfo++) {
 398                 igb_regdump(hw, reginfo);
 399         }
 400
 401         /* Print TX Ring Summary */
 402         if (!netdev || !netif_running(netdev))
 403                 goto exit;
 404
 405         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 406         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 407         for (n = 0; n < adapter->num_tx_queues; n++) {
 408                 struct igb_tx_buffer *buffer_info;
 409                 tx_ring = adapter->tx_ring[n];
 410                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 411                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 412                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 413                         (u64)dma_unmap_addr(buffer_info, dma),
 414                         dma_unmap_len(buffer_info, len),
 415                         buffer_info->next_to_watch,
 416                         (u64)buffer_info->time_stamp);
 417         }
 418
 419         /* Print TX Rings */
 420         if (!netif_msg_tx_done(adapter))
 421                 goto rx_ring_summary;
 422
 423         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 424
 425         /* Transmit Descriptor Formats
 426          *
 427          * Advanced Transmit Descriptor
 428          *   +--------------------------------------------------------------+
 429          * 0 |         Buffer Address [63:0]                                |
 430          *   +--------------------------------------------------------------+
 431          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 432          *   +--------------------------------------------------------------+
 433          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 434          */
 435
 436         for (n = 0; n < adapter->num_tx_queues; n++) {
 437                 tx_ring = adapter->tx_ring[n];
 438                 pr_info("------------------------------------\n");
 439                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 440                 pr_info("------------------------------------\n");
 441                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] "
 442                         "[bi->dma       ] leng  ntw timestamp        "
 443                         "bi->skb\n");
 444
 445                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 446                         const char *next_desc;
 447                         struct igb_tx_buffer *buffer_info;
 448                         tx_desc = IGB_TX_DESC(tx_ring, i);
 449                         buffer_info = &tx_ring->tx_buffer_info[i];
 450                         u0 = (struct my_u0 *)tx_desc;
 451                         if (i == tx_ring->next_to_use &&
 452                             i == tx_ring->next_to_clean)
 453                                 next_desc = " NTC/U";
 454                         else if (i == tx_ring->next_to_use)
 455                                 next_desc = " NTU";
 456                         else if (i == tx_ring->next_to_clean)
 457                                 next_desc = " NTC";
 458                         else
 459                                 next_desc = "";
 460
 461                         pr_info("T [0x%03X]    %016llX %016llX %016llX"
 462                                 " %04X  %p %016llX %p%s\n", i,
 463                                 le64_to_cpu(u0->a),
 464                                 le64_to_cpu(u0->b),
 465                                 (u64)dma_unmap_addr(buffer_info, dma),
 466                                 dma_unmap_len(buffer_info, len),
 467                                 buffer_info->next_to_watch,
 468                                 (u64)buffer_info->time_stamp,
 469                                 buffer_info->skb, next_desc);
 470
 471                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 472                                 print_hex_dump(KERN_INFO, "",
 473                                         DUMP_PREFIX_ADDRESS,
 474                                         16, 1, buffer_info->skb->data,
 475                                         dma_unmap_len(buffer_info, len),
 476                                         true);
 477                 }
 478         }
 479
 480         /* Print RX Rings Summary */
 481 rx_ring_summary:
 482         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 483         pr_info("Queue [NTU] [NTC]\n");
 484         for (n = 0; n < adapter->num_rx_queues; n++) {
 485                 rx_ring = adapter->rx_ring[n];
 486                 pr_info(" %5d %5X %5X\n",
 487                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 488         }
 489
 490         /* Print RX Rings */
 491         if (!netif_msg_rx_status(adapter))
 492                 goto exit;
 493
 494         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 495
 496         /* Advanced Receive Descriptor (Read) Format
 497          *    63                                           1        0
 498          *    +-----------------------------------------------------+
 499          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 500          *    +----------------------------------------------+------+
 501          *  8 |       Header Buffer Address [63:1]           |  DD  |
 502          *    +-----------------------------------------------------+
 503          *
 504          *
 505          * Advanced Receive Descriptor (Write-Back) Format
 506          *
 507          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 508          *   +------------------------------------------------------+
 509          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 510          *   | Checksum   Ident  |   |           |    | Type | Type |
 511          *   +------------------------------------------------------+
 512          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 513          *   +------------------------------------------------------+
 514          *   63       48 47    32 31            20 19               0
 515          */
 516
 517         for (n = 0; n < adapter->num_rx_queues; n++) {
 518                 rx_ring = adapter->rx_ring[n];
 519                 pr_info("------------------------------------\n");
 520                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 521                 pr_info("------------------------------------\n");
 522                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] "
 523                         "[bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 524                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] -----"
 525                         "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
 526
 527                 for (i = 0; i < rx_ring->count; i++) {
 528                         const char *next_desc;
 529                         struct igb_rx_buffer *buffer_info;
 530                         buffer_info = &rx_ring->rx_buffer_info[i];
 531                         rx_desc = IGB_RX_DESC(rx_ring, i);
 532                         u0 = (struct my_u0 *)rx_desc;
 533                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 534
 535                         if (i == rx_ring->next_to_use)
 536                                 next_desc = " NTU";
 537                         else if (i == rx_ring->next_to_clean)
 538                                 next_desc = " NTC";
 539                         else
 540                                 next_desc = "";
 541
 542                         if (staterr & E1000_RXD_STAT_DD) {
 543                                 /* Descriptor Done */
 544                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 545                                         "RWB", i,
 546                                         le64_to_cpu(u0->a),
 547                                         le64_to_cpu(u0->b),
 548                                         next_desc);
 549                         } else {
 550                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 551                                         "R  ", i,
 552                                         le64_to_cpu(u0->a),
 553                                         le64_to_cpu(u0->b),
 554                                         (u64)buffer_info->dma,
 555                                         next_desc);
 556
 557                                 if (netif_msg_pktdata(adapter) &&
 558                                     buffer_info->dma && buffer_info->page) {
 559                                         print_hex_dump(KERN_INFO, "",
 560                                           DUMP_PREFIX_ADDRESS,
 561                                           16, 1,
 562                                           page_address(buffer_info->page) +
 563                                                       buffer_info->page_offset,
 564                                           IGB_RX_BUFSZ, true);
 565                                 }
 566                         }
 567                 }
 568         }
 569
 570 exit:
 571         return;
 572 }
 573
 574 /**
 575  *  igb_get_i2c_data - Reads the I2C SDA data bit
 576  *  @hw: pointer to hardware structure
 577  *  @i2cctl: Current value of I2CCTL register
 578  *
 579  *  Returns the I2C data bit value
 580  **/
 581 static int igb_get_i2c_data(void *data)
 582 {
 583         struct igb_adapter *adapter = (struct igb_adapter *)data;
 584         struct e1000_hw *hw = &adapter->hw;
 585         s32 i2cctl = rd32(E1000_I2CPARAMS);
 586
 587         return ((i2cctl & E1000_I2C_DATA_IN) != 0);
 588 }
 589
 590 /**
 591  *  igb_set_i2c_data - Sets the I2C data bit
 592  *  @data: pointer to hardware structure
 593  *  @state: I2C data value (0 or 1) to set
 594  *
 595  *  Sets the I2C data bit
 596  **/
 597 static void igb_set_i2c_data(void *data, int state)
 598 {
 599         struct igb_adapter *adapter = (struct igb_adapter *)data;
 600         struct e1000_hw *hw = &adapter->hw;
 601         s32 i2cctl = rd32(E1000_I2CPARAMS);
 602
 603         if (state)
 604                 i2cctl |= E1000_I2C_DATA_OUT;
 605         else
 606                 i2cctl &= ~E1000_I2C_DATA_OUT;
 607
 608         i2cctl &= ~E1000_I2C_DATA_OE_N;
 609         i2cctl |= E1000_I2C_CLK_OE_N;
 610         wr32(E1000_I2CPARAMS, i2cctl);
 611         wrfl();
 612
 613 }
 614
 615 /**
 616  *  igb_set_i2c_clk - Sets the I2C SCL clock
 617  *  @data: pointer to hardware structure
 618  *  @state: state to set clock
 619  *
 620  *  Sets the I2C clock line to state
 621  **/
 622 static void igb_set_i2c_clk(void *data, int state)
 623 {
 624         struct igb_adapter *adapter = (struct igb_adapter *)data;
 625         struct e1000_hw *hw = &adapter->hw;
 626         s32 i2cctl = rd32(E1000_I2CPARAMS);
 627
 628         if (state) {
 629                 i2cctl |= E1000_I2C_CLK_OUT;
 630                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 631         } else {
 632                 i2cctl &= ~E1000_I2C_CLK_OUT;
 633                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 634         }
 635         wr32(E1000_I2CPARAMS, i2cctl);
 636         wrfl();
 637 }
 638
 639 /**
 640  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 641  *  @data: pointer to hardware structure
 642  *
 643  *  Gets the I2C clock state
 644  **/
 645 static int igb_get_i2c_clk(void *data)
 646 {
 647         struct igb_adapter *adapter = (struct igb_adapter *)data;
 648         struct e1000_hw *hw = &adapter->hw;
 649         s32 i2cctl = rd32(E1000_I2CPARAMS);
 650
 651         return ((i2cctl & E1000_I2C_CLK_IN) != 0);
 652 }
 653
 654 static const struct i2c_algo_bit_data igb_i2c_algo = {
 655         .setsda         = igb_set_i2c_data,
 656         .setscl         = igb_set_i2c_clk,
 657         .getsda         = igb_get_i2c_data,
 658         .getscl         = igb_get_i2c_clk,
 659         .udelay         = 5,
 660         .timeout        = 20,
 661 };
 662
 663 /**
 664  *  igb_get_hw_dev - return device
 665  *  @hw: pointer to hardware structure
 666  *
 667  *  used by hardware layer to print debugging information
 668  **/
 669 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 670 {
 671         struct igb_adapter *adapter = hw->back;
 672         return adapter->netdev;
 673 }
 674
 675 /**
 676  *  igb_init_module - Driver Registration Routine
 677  *
 678  *  igb_init_module is the first routine called when the driver is
 679  *  loaded. All it does is register with the PCI subsystem.
 680  **/
 681 static int __init igb_init_module(void)
 682 {
 683         int ret;
 684         pr_info("%s - version %s\n",
 685                igb_driver_string, igb_driver_version);
 686
 687         pr_info("%s\n", igb_copyright);
 688
 689 #ifdef CONFIG_IGB_DCA
 690         dca_register_notify(&dca_notifier);
 691 #endif
 692         ret = pci_register_driver(&igb_driver);
 693         return ret;
 694 }
 695
 696 module_init(igb_init_module);
 697
 698 /**
 699  *  igb_exit_module - Driver Exit Cleanup Routine
 700  *
 701  *  igb_exit_module is called just before the driver is removed
 702  *  from memory.
 703  **/
 704 static void __exit igb_exit_module(void)
 705 {
 706 #ifdef CONFIG_IGB_DCA
 707         dca_unregister_notify(&dca_notifier);
 708 #endif
 709         pci_unregister_driver(&igb_driver);
 710 }
 711
 712 module_exit(igb_exit_module);
 713
 714 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 715 /**
 716  *  igb_cache_ring_register - Descriptor ring to register mapping
 717  *  @adapter: board private structure to initialize
 718  *
 719  *  Once we know the feature-set enabled for the device, we'll cache
 720  *  the register offset the descriptor ring is assigned to.
 721  **/
 722 static void igb_cache_ring_register(struct igb_adapter *adapter)
 723 {
 724         int i = 0, j = 0;
 725         u32 rbase_offset = adapter->vfs_allocated_count;
 726
 727         switch (adapter->hw.mac.type) {
 728         case e1000_82576:
 729                 /* The queues are allocated for virtualization such that VF 0
 730                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 731                  * In order to avoid collision we start at the first free queue
 732                  * and continue consuming queues in the same sequence
 733                  */
 734                 if (adapter->vfs_allocated_count) {
 735                         for (; i < adapter->rss_queues; i++)
 736                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 737                                                                Q_IDX_82576(i);
 738                 }
 739         case e1000_82575:
 740         case e1000_82580:
 741         case e1000_i350:
 742         case e1000_i354:
 743         case e1000_i210:
 744         case e1000_i211:
 745         default:
 746                 for (; i < adapter->num_rx_queues; i++)
 747                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 748                 for (; j < adapter->num_tx_queues; j++)
 749                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 750                 break;
 751         }
 752 }
 753
 754 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 755 {
 756         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 757         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 758         u32 value = 0;
 759
 760         if (E1000_REMOVED(hw_addr))
 761                 return ~value;
 762
 763         value = readl(&hw_addr[reg]);
 764
 765         /* reads should not return all F's */
 766         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 767                 struct net_device *netdev = igb->netdev;
 768                 hw->hw_addr = NULL;
 769                 netif_device_detach(netdev);
 770                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 771         }
 772
 773         return value;
 774 }
 775
 776 /**
 777  *  igb_write_ivar - configure ivar for given MSI-X vector
 778  *  @hw: pointer to the HW structure
 779  *  @msix_vector: vector number we are allocating to a given ring
 780  *  @index: row index of IVAR register to write within IVAR table
 781  *  @offset: column offset of in IVAR, should be multiple of 8
 782  *
 783  *  This function is intended to handle the writing of the IVAR register
 784  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 785  *  each containing an cause allocation for an Rx and Tx ring, and a
 786  *  variable number of rows depending on the number of queues supported.
 787  **/
 788 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 789                            int index, int offset)
 790 {
 791         u32 ivar = array_rd32(E1000_IVAR0, index);
 792
 793         /* clear any bits that are currently set */
 794         ivar &= ~((u32)0xFF << offset);
 795
 796         /* write vector and valid bit */
 797         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 798
 799         array_wr32(E1000_IVAR0, index, ivar);
 800 }
 801
 802 #define IGB_N0_QUEUE -1
 803 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 804 {
 805         struct igb_adapter *adapter = q_vector->adapter;
 806         struct e1000_hw *hw = &adapter->hw;
 807         int rx_queue = IGB_N0_QUEUE;
 808         int tx_queue = IGB_N0_QUEUE;
 809         u32 msixbm = 0;
 810
 811         if (q_vector->rx.ring)
 812                 rx_queue = q_vector->rx.ring->reg_idx;
 813         if (q_vector->tx.ring)
 814                 tx_queue = q_vector->tx.ring->reg_idx;
 815
 816         switch (hw->mac.type) {
 817         case e1000_82575:
 818                 /* The 82575 assigns vectors using a bitmask, which matches the
 819                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 820                  * or more queues to a vector, we write the appropriate bits
 821                  * into the MSIXBM register for that vector.
 822                  */
 823                 if (rx_queue > IGB_N0_QUEUE)
 824                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 825                 if (tx_queue > IGB_N0_QUEUE)
 826                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 827                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 828                         msixbm |= E1000_EIMS_OTHER;
 829                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 830                 q_vector->eims_value = msixbm;
 831                 break;
 832         case e1000_82576:
 833                 /* 82576 uses a table that essentially consists of 2 columns
 834                  * with 8 rows.  The ordering is column-major so we use the
 835                  * lower 3 bits as the row index, and the 4th bit as the
 836                  * column offset.
 837                  */
 838                 if (rx_queue > IGB_N0_QUEUE)
 839                         igb_write_ivar(hw, msix_vector,
 840                                        rx_queue & 0x7,
 841                                        (rx_queue & 0x8) << 1);
 842                 if (tx_queue > IGB_N0_QUEUE)
 843                         igb_write_ivar(hw, msix_vector,
 844                                        tx_queue & 0x7,
 845                                        ((tx_queue & 0x8) << 1) + 8);
 846                 q_vector->eims_value = 1 << msix_vector;
 847                 break;
 848         case e1000_82580:
 849         case e1000_i350:
 850         case e1000_i354:
 851         case e1000_i210:
 852         case e1000_i211:
 853                 /* On 82580 and newer adapters the scheme is similar to 82576
 854                  * however instead of ordering column-major we have things
 855                  * ordered row-major.  So we traverse the table by using
 856                  * bit 0 as the column offset, and the remaining bits as the
 857                  * row index.
 858                  */
 859                 if (rx_queue > IGB_N0_QUEUE)
 860                         igb_write_ivar(hw, msix_vector,
 861                                        rx_queue >> 1,
 862                                        (rx_queue & 0x1) << 4);
 863                 if (tx_queue > IGB_N0_QUEUE)
 864                         igb_write_ivar(hw, msix_vector,
 865                                        tx_queue >> 1,
 866                                        ((tx_queue & 0x1) << 4) + 8);
 867                 q_vector->eims_value = 1 << msix_vector;
 868                 break;
 869         default:
 870                 BUG();
 871                 break;
 872         }
 873
 874         /* add q_vector eims value to global eims_enable_mask */
 875         adapter->eims_enable_mask |= q_vector->eims_value;
 876
 877         /* configure q_vector to set itr on first interrupt */
 878         q_vector->set_itr = 1;
 879 }
 880
 881 /**
 882  *  igb_configure_msix - Configure MSI-X hardware
 883  *  @adapter: board private structure to initialize
 884  *
 885  *  igb_configure_msix sets up the hardware to properly
 886  *  generate MSI-X interrupts.
 887  **/
 888 static void igb_configure_msix(struct igb_adapter *adapter)
 889 {
 890         u32 tmp;
 891         int i, vector = 0;
 892         struct e1000_hw *hw = &adapter->hw;
 893
 894         adapter->eims_enable_mask = 0;
 895
 896         /* set vector for other causes, i.e. link changes */
 897         switch (hw->mac.type) {
 898         case e1000_82575:
 899                 tmp = rd32(E1000_CTRL_EXT);
 900                 /* enable MSI-X PBA support*/
 901                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 902
 903                 /* Auto-Mask interrupts upon ICR read. */
 904                 tmp |= E1000_CTRL_EXT_EIAME;
 905                 tmp |= E1000_CTRL_EXT_IRCA;
 906
 907                 wr32(E1000_CTRL_EXT, tmp);
 908
 909                 /* enable msix_other interrupt */
 910                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 911                 adapter->eims_other = E1000_EIMS_OTHER;
 912
 913                 break;
 914
 915         case e1000_82576:
 916         case e1000_82580:
 917         case e1000_i350:
 918         case e1000_i354:
 919         case e1000_i210:
 920         case e1000_i211:
 921                 /* Turn on MSI-X capability first, or our settings
 922                  * won't stick.  And it will take days to debug.
 923                  */
 924                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 925                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 926                      E1000_GPIE_NSICR);
 927
 928                 /* enable msix_other interrupt */
 929                 adapter->eims_other = 1 << vector;
 930                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 931
 932                 wr32(E1000_IVAR_MISC, tmp);
 933                 break;
 934         default:
 935                 /* do nothing, since nothing else supports MSI-X */
 936                 break;
 937         } /* switch (hw->mac.type) */
 938
 939         adapter->eims_enable_mask |= adapter->eims_other;
 940
 941         for (i = 0; i < adapter->num_q_vectors; i++)
 942                 igb_assign_vector(adapter->q_vector[i], vector++);
 943
 944         wrfl();
 945 }
 946
 947 /**
 948  *  igb_request_msix - Initialize MSI-X interrupts
 949  *  @adapter: board private structure to initialize
 950  *
 951  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 952  *  kernel.
 953  **/
 954 static int igb_request_msix(struct igb_adapter *adapter)
 955 {
 956         struct net_device *netdev = adapter->netdev;
 957         struct e1000_hw *hw = &adapter->hw;
 958         int i, err = 0, vector = 0, free_vector = 0;
 959
 960         err = request_irq(adapter->msix_entries[vector].vector,
 961                           igb_msix_other, 0, netdev->name, adapter);
 962         if (err)
 963                 goto err_out;
 964
 965         for (i = 0; i < adapter->num_q_vectors; i++) {
 966                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 967
 968                 vector++;
 969
 970                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 971
 972                 if (q_vector->rx.ring && q_vector->tx.ring)
 973                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 974                                 q_vector->rx.ring->queue_index);
 975                 else if (q_vector->tx.ring)
 976                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 977                                 q_vector->tx.ring->queue_index);
 978                 else if (q_vector->rx.ring)
 979                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 980                                 q_vector->rx.ring->queue_index);
 981                 else
 982                         sprintf(q_vector->name, "%s-unused", netdev->name);
 983
 984                 err = request_irq(adapter->msix_entries[vector].vector,
 985                                   igb_msix_ring, 0, q_vector->name,
 986                                   q_vector);
 987                 if (err)
 988                         goto err_free;
 989         }
 990
 991         igb_configure_msix(adapter);
 992         return 0;
 993
 994 err_free:
 995         /* free already assigned IRQs */
 996         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 997
 998         vector--;
 999         for (i = 0; i < vector; i++) {
1000                 free_irq(adapter->msix_entries[free_vector++].vector,
1001                          adapter->q_vector[i]);
1002         }
1003 err_out:
1004         return err;
1005 }
1006
1007 /**
1008  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1009  *  @adapter: board private structure to initialize
1010  *  @v_idx: Index of vector to be freed
1011  *
1012  *  This function frees the memory allocated to the q_vector.
1013  **/
1014 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1015 {
1016         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1017
1018         adapter->q_vector[v_idx] = NULL;
1019
1020         /* igb_get_stats64() might access the rings on this vector,
1021          * we must wait a grace period before freeing it.
1022          */
1023         kfree_rcu(q_vector, rcu);
1024 }
1025
1026 /**
1027  *  igb_reset_q_vector - Reset config for interrupt vector
1028  *  @adapter: board private structure to initialize
1029  *  @v_idx: Index of vector to be reset
1030  *
1031  *  If NAPI is enabled it will delete any references to the
1032  *  NAPI struct. This is preparation for igb_free_q_vector.
1033  **/
1034 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1035 {
1036         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1037
1038         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1039          * allocated. So, q_vector is NULL so we should stop here.
1040          */
1041         if (!q_vector)
1042                 return;
1043
1044         if (q_vector->tx.ring)
1045                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1046
1047         if (q_vector->rx.ring)
1048                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1049
1050         netif_napi_del(&q_vector->napi);
1051
1052 }
1053
1054 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1055 {
1056         int v_idx = adapter->num_q_vectors;
1057
1058         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1059                 pci_disable_msix(adapter->pdev);
1060         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1061                 pci_disable_msi(adapter->pdev);
1062
1063         while (v_idx--)
1064                 igb_reset_q_vector(adapter, v_idx);
1065 }
1066
1067 /**
1068  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1069  *  @adapter: board private structure to initialize
1070  *
1071  *  This function frees the memory allocated to the q_vectors.  In addition if
1072  *  NAPI is enabled it will delete any references to the NAPI struct prior
1073  *  to freeing the q_vector.
1074  **/
1075 static void igb_free_q_vectors(struct igb_adapter *adapter)
1076 {
1077         int v_idx = adapter->num_q_vectors;
1078
1079         adapter->num_tx_queues = 0;
1080         adapter->num_rx_queues = 0;
1081         adapter->num_q_vectors = 0;
1082
1083         while (v_idx--) {
1084                 igb_reset_q_vector(adapter, v_idx);
1085                 igb_free_q_vector(adapter, v_idx);
1086         }
1087 }
1088
1089 /**
1090  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1091  *  @adapter: board private structure to initialize
1092  *
1093  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1094  *  MSI-X interrupts allocated.
1095  */
1096 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1097 {
1098         igb_free_q_vectors(adapter);
1099         igb_reset_interrupt_capability(adapter);
1100 }
1101
1102 /**
1103  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1104  *  @adapter: board private structure to initialize
1105  *  @msix: boolean value of MSIX capability
1106  *
1107  *  Attempt to configure interrupts using the best available
1108  *  capabilities of the hardware and kernel.
1109  **/
1110 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1111 {
1112         int err;
1113         int numvecs, i;
1114
1115         if (!msix)
1116                 goto msi_only;
1117         adapter->flags |= IGB_FLAG_HAS_MSIX;
1118
1119         /* Number of supported queues. */
1120         adapter->num_rx_queues = adapter->rss_queues;
1121         if (adapter->vfs_allocated_count)
1122                 adapter->num_tx_queues = 1;
1123         else
1124                 adapter->num_tx_queues = adapter->rss_queues;
1125
1126         /* start with one vector for every Rx queue */
1127         numvecs = adapter->num_rx_queues;
1128
1129         /* if Tx handler is separate add 1 for every Tx queue */
1130         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1131                 numvecs += adapter->num_tx_queues;
1132
1133         /* store the number of vectors reserved for queues */
1134         adapter->num_q_vectors = numvecs;
1135
1136         /* add 1 vector for link status interrupts */
1137         numvecs++;
1138         for (i = 0; i < numvecs; i++)
1139                 adapter->msix_entries[i].entry = i;
1140
1141         err = pci_enable_msix_range(adapter->pdev,
1142                                     adapter->msix_entries,
1143                                     numvecs,
1144                                     numvecs);
1145         if (err > 0)
1146                 return;
1147
1148         igb_reset_interrupt_capability(adapter);
1149
1150         /* If we can't do MSI-X, try MSI */
1151 msi_only:
1152         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1153 #ifdef CONFIG_PCI_IOV
1154         /* disable SR-IOV for non MSI-X configurations */
1155         if (adapter->vf_data) {
1156                 struct e1000_hw *hw = &adapter->hw;
1157                 /* disable iov and allow time for transactions to clear */
1158                 pci_disable_sriov(adapter->pdev);
1159                 msleep(500);
1160
1161                 kfree(adapter->vf_data);
1162                 adapter->vf_data = NULL;
1163                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1164                 wrfl();
1165                 msleep(100);
1166                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1167         }
1168 #endif
1169         adapter->vfs_allocated_count = 0;
1170         adapter->rss_queues = 1;
1171         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1172         adapter->num_rx_queues = 1;
1173         adapter->num_tx_queues = 1;
1174         adapter->num_q_vectors = 1;
1175         if (!pci_enable_msi(adapter->pdev))
1176                 adapter->flags |= IGB_FLAG_HAS_MSI;
1177 }
1178
1179 static void igb_add_ring(struct igb_ring *ring,
1180                          struct igb_ring_container *head)
1181 {
1182         head->ring = ring;
1183         head->count++;
1184 }
1185
1186 /**
1187  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1188  *  @adapter: board private structure to initialize
1189  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1190  *  @v_idx: index of vector in adapter struct
1191  *  @txr_count: total number of Tx rings to allocate
1192  *  @txr_idx: index of first Tx ring to allocate
1193  *  @rxr_count: total number of Rx rings to allocate
1194  *  @rxr_idx: index of first Rx ring to allocate
1195  *
1196  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1197  **/
1198 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1199                               int v_count, int v_idx,
1200                               int txr_count, int txr_idx,
1201                               int rxr_count, int rxr_idx)
1202 {
1203         struct igb_q_vector *q_vector;
1204         struct igb_ring *ring;
1205         int ring_count, size;
1206
1207         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1208         if (txr_count > 1 || rxr_count > 1)
1209                 return -ENOMEM;
1210
1211         ring_count = txr_count + rxr_count;
1212         size = sizeof(struct igb_q_vector) +
1213                (sizeof(struct igb_ring) * ring_count);
1214
1215         /* allocate q_vector and rings */
1216         q_vector = adapter->q_vector[v_idx];
1217         if (!q_vector)
1218                 q_vector = kzalloc(size, GFP_KERNEL);
1219         if (!q_vector)
1220                 return -ENOMEM;
1221
1222         /* initialize NAPI */
1223         netif_napi_add(adapter->netdev, &q_vector->napi,
1224                        igb_poll, 64);
1225
1226         /* tie q_vector and adapter together */
1227         adapter->q_vector[v_idx] = q_vector;
1228         q_vector->adapter = adapter;
1229
1230         /* initialize work limits */
1231         q_vector->tx.work_limit = adapter->tx_work_limit;
1232
1233         /* initialize ITR configuration */
1234         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1235         q_vector->itr_val = IGB_START_ITR;
1236
1237         /* initialize pointer to rings */
1238         ring = q_vector->ring;
1239
1240         /* intialize ITR */
1241         if (rxr_count) {
1242                 /* rx or rx/tx vector */
1243                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1244                         q_vector->itr_val = adapter->rx_itr_setting;
1245         } else {
1246                 /* tx only vector */
1247                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1248                         q_vector->itr_val = adapter->tx_itr_setting;
1249         }
1250
1251         if (txr_count) {
1252                 /* assign generic ring traits */
1253                 ring->dev = &adapter->pdev->dev;
1254                 ring->netdev = adapter->netdev;
1255
1256                 /* configure backlink on ring */
1257                 ring->q_vector = q_vector;
1258
1259                 /* update q_vector Tx values */
1260                 igb_add_ring(ring, &q_vector->tx);
1261
1262                 /* For 82575, context index must be unique per ring. */
1263                 if (adapter->hw.mac.type == e1000_82575)
1264                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1265
1266                 /* apply Tx specific ring traits */
1267                 ring->count = adapter->tx_ring_count;
1268                 ring->queue_index = txr_idx;
1269
1270                 u64_stats_init(&ring->tx_syncp);
1271                 u64_stats_init(&ring->tx_syncp2);
1272
1273                 /* assign ring to adapter */
1274                 adapter->tx_ring[txr_idx] = ring;
1275
1276                 /* push pointer to next ring */
1277                 ring++;
1278         }
1279
1280         if (rxr_count) {
1281                 /* assign generic ring traits */
1282                 ring->dev = &adapter->pdev->dev;
1283                 ring->netdev = adapter->netdev;
1284
1285                 /* configure backlink on ring */
1286                 ring->q_vector = q_vector;
1287
1288                 /* update q_vector Rx values */
1289                 igb_add_ring(ring, &q_vector->rx);
1290
1291                 /* set flag indicating ring supports SCTP checksum offload */
1292                 if (adapter->hw.mac.type >= e1000_82576)
1293                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1294
1295                 /*
1296                  * On i350, i354, i210, and i211, loopback VLAN packets
1297                  * have the tag byte-swapped.
1298                  */
1299                 if (adapter->hw.mac.type >= e1000_i350)
1300                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1301
1302                 /* apply Rx specific ring traits */
1303                 ring->count = adapter->rx_ring_count;
1304                 ring->queue_index = rxr_idx;
1305
1306                 u64_stats_init(&ring->rx_syncp);
1307
1308                 /* assign ring to adapter */
1309                 adapter->rx_ring[rxr_idx] = ring;
1310         }
1311
1312         return 0;
1313 }
1314
1315
1316 /**
1317  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1318  *  @adapter: board private structure to initialize
1319  *
1320  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1321  *  return -ENOMEM.
1322  **/
1323 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1324 {
1325         int q_vectors = adapter->num_q_vectors;
1326         int rxr_remaining = adapter->num_rx_queues;
1327         int txr_remaining = adapter->num_tx_queues;
1328         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1329         int err;
1330
1331         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1332                 for (; rxr_remaining; v_idx++) {
1333                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1334                                                  0, 0, 1, rxr_idx);
1335
1336                         if (err)
1337                                 goto err_out;
1338
1339                         /* update counts and index */
1340                         rxr_remaining--;
1341                         rxr_idx++;
1342                 }
1343         }
1344
1345         for (; v_idx < q_vectors; v_idx++) {
1346                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1347                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1348                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1349                                          tqpv, txr_idx, rqpv, rxr_idx);
1350
1351                 if (err)
1352                         goto err_out;
1353
1354                 /* update counts and index */
1355                 rxr_remaining -= rqpv;
1356                 txr_remaining -= tqpv;
1357                 rxr_idx++;
1358                 txr_idx++;
1359         }
1360
1361         return 0;
1362
1363 err_out:
1364         adapter->num_tx_queues = 0;
1365         adapter->num_rx_queues = 0;
1366         adapter->num_q_vectors = 0;
1367
1368         while (v_idx--)
1369                 igb_free_q_vector(adapter, v_idx);
1370
1371         return -ENOMEM;
1372 }
1373
1374 /**
1375  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1376  *  @adapter: board private structure to initialize
1377  *  @msix: boolean value of MSIX capability
1378  *
1379  *  This function initializes the interrupts and allocates all of the queues.
1380  **/
1381 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1382 {
1383         struct pci_dev *pdev = adapter->pdev;
1384         int err;
1385
1386         igb_set_interrupt_capability(adapter, msix);
1387
1388         err = igb_alloc_q_vectors(adapter);
1389         if (err) {
1390                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1391                 goto err_alloc_q_vectors;
1392         }
1393
1394         igb_cache_ring_register(adapter);
1395
1396         return 0;
1397
1398 err_alloc_q_vectors:
1399         igb_reset_interrupt_capability(adapter);
1400         return err;
1401 }
1402
1403 /**
1404  *  igb_request_irq - initialize interrupts
1405  *  @adapter: board private structure to initialize
1406  *
1407  *  Attempts to configure interrupts using the best available
1408  *  capabilities of the hardware and kernel.
1409  **/
1410 static int igb_request_irq(struct igb_adapter *adapter)
1411 {
1412         struct net_device *netdev = adapter->netdev;
1413         struct pci_dev *pdev = adapter->pdev;
1414         int err = 0;
1415
1416         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1417                 err = igb_request_msix(adapter);
1418                 if (!err)
1419                         goto request_done;
1420                 /* fall back to MSI */
1421                 igb_free_all_tx_resources(adapter);
1422                 igb_free_all_rx_resources(adapter);
1423
1424                 igb_clear_interrupt_scheme(adapter);
1425                 err = igb_init_interrupt_scheme(adapter, false);
1426                 if (err)
1427                         goto request_done;
1428
1429                 igb_setup_all_tx_resources(adapter);
1430                 igb_setup_all_rx_resources(adapter);
1431                 igb_configure(adapter);
1432         }
1433
1434         igb_assign_vector(adapter->q_vector[0], 0);
1435
1436         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1437                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1438                                   netdev->name, adapter);
1439                 if (!err)
1440                         goto request_done;
1441
1442                 /* fall back to legacy interrupts */
1443                 igb_reset_interrupt_capability(adapter);
1444                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1445         }
1446
1447         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1448                           netdev->name, adapter);
1449
1450         if (err)
1451                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1452                         err);
1453
1454 request_done:
1455         return err;
1456 }
1457
1458 static void igb_free_irq(struct igb_adapter *adapter)
1459 {
1460         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1461                 int vector = 0, i;
1462
1463                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1464
1465                 for (i = 0; i < adapter->num_q_vectors; i++)
1466                         free_irq(adapter->msix_entries[vector++].vector,
1467                                  adapter->q_vector[i]);
1468         } else {
1469                 free_irq(adapter->pdev->irq, adapter);
1470         }
1471 }
1472
1473 /**
1474  *  igb_irq_disable - Mask off interrupt generation on the NIC
1475  *  @adapter: board private structure
1476  **/
1477 static void igb_irq_disable(struct igb_adapter *adapter)
1478 {
1479         struct e1000_hw *hw = &adapter->hw;
1480
1481         /* we need to be careful when disabling interrupts.  The VFs are also
1482          * mapped into these registers and so clearing the bits can cause
1483          * issues on the VF drivers so we only need to clear what we set
1484          */
1485         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1486                 u32 regval = rd32(E1000_EIAM);
1487                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1488                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1489                 regval = rd32(E1000_EIAC);
1490                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1491         }
1492
1493         wr32(E1000_IAM, 0);
1494         wr32(E1000_IMC, ~0);
1495         wrfl();
1496         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1497                 int i;
1498                 for (i = 0; i < adapter->num_q_vectors; i++)
1499                         synchronize_irq(adapter->msix_entries[i].vector);
1500         } else {
1501                 synchronize_irq(adapter->pdev->irq);
1502         }
1503 }
1504
1505 /**
1506  *  igb_irq_enable - Enable default interrupt generation settings
1507  *  @adapter: board private structure
1508  **/
1509 static void igb_irq_enable(struct igb_adapter *adapter)
1510 {
1511         struct e1000_hw *hw = &adapter->hw;
1512
1513         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1514                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1515                 u32 regval = rd32(E1000_EIAC);
1516                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1517                 regval = rd32(E1000_EIAM);
1518                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1519                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1520                 if (adapter->vfs_allocated_count) {
1521                         wr32(E1000_MBVFIMR, 0xFF);
1522                         ims |= E1000_IMS_VMMB;
1523                 }
1524                 wr32(E1000_IMS, ims);
1525         } else {
1526                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1527                                 E1000_IMS_DRSTA);
1528                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1529                                 E1000_IMS_DRSTA);
1530         }
1531 }
1532
1533 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1534 {
1535         struct e1000_hw *hw = &adapter->hw;
1536         u16 vid = adapter->hw.mng_cookie.vlan_id;
1537         u16 old_vid = adapter->mng_vlan_id;
1538
1539         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1540                 /* add VID to filter table */
1541                 igb_vfta_set(hw, vid, true);
1542                 adapter->mng_vlan_id = vid;
1543         } else {
1544                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1545         }
1546
1547         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1548             (vid != old_vid) &&
1549             !test_bit(old_vid, adapter->active_vlans)) {
1550                 /* remove VID from filter table */
1551                 igb_vfta_set(hw, old_vid, false);
1552         }
1553 }
1554
1555 /**
1556  *  igb_release_hw_control - release control of the h/w to f/w
1557  *  @adapter: address of board private structure
1558  *
1559  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1560  *  For ASF and Pass Through versions of f/w this means that the
1561  *  driver is no longer loaded.
1562  **/
1563 static void igb_release_hw_control(struct igb_adapter *adapter)
1564 {
1565         struct e1000_hw *hw = &adapter->hw;
1566         u32 ctrl_ext;
1567
1568         /* Let firmware take over control of h/w */
1569         ctrl_ext = rd32(E1000_CTRL_EXT);
1570         wr32(E1000_CTRL_EXT,
1571                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1572 }
1573
1574 /**
1575  *  igb_get_hw_control - get control of the h/w from f/w
1576  *  @adapter: address of board private structure
1577  *
1578  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1579  *  For ASF and Pass Through versions of f/w this means that
1580  *  the driver is loaded.
1581  **/
1582 static void igb_get_hw_control(struct igb_adapter *adapter)
1583 {
1584         struct e1000_hw *hw = &adapter->hw;
1585         u32 ctrl_ext;
1586
1587         /* Let firmware know the driver has taken over */
1588         ctrl_ext = rd32(E1000_CTRL_EXT);
1589         wr32(E1000_CTRL_EXT,
1590                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1591 }
1592
1593 /**
1594  *  igb_configure - configure the hardware for RX and TX
1595  *  @adapter: private board structure
1596  **/
1597 static void igb_configure(struct igb_adapter *adapter)
1598 {
1599         struct net_device *netdev = adapter->netdev;
1600         int i;
1601
1602         igb_get_hw_control(adapter);
1603         igb_set_rx_mode(netdev);
1604
1605         igb_restore_vlan(adapter);
1606
1607         igb_setup_tctl(adapter);
1608         igb_setup_mrqc(adapter);
1609         igb_setup_rctl(adapter);
1610
1611         igb_configure_tx(adapter);
1612         igb_configure_rx(adapter);
1613
1614         igb_rx_fifo_flush_82575(&adapter->hw);
1615
1616         /* call igb_desc_unused which always leaves
1617          * at least 1 descriptor unused to make sure
1618          * next_to_use != next_to_clean
1619          */
1620         for (i = 0; i < adapter->num_rx_queues; i++) {
1621                 struct igb_ring *ring = adapter->rx_ring[i];
1622                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1623         }
1624 }
1625
1626 /**
1627  *  igb_power_up_link - Power up the phy/serdes link
1628  *  @adapter: address of board private structure
1629  **/
1630 void igb_power_up_link(struct igb_adapter *adapter)
1631 {
1632         igb_reset_phy(&adapter->hw);
1633
1634         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1635                 igb_power_up_phy_copper(&adapter->hw);
1636         else
1637                 igb_power_up_serdes_link_82575(&adapter->hw);
1638 }
1639
1640 /**
1641  *  igb_power_down_link - Power down the phy/serdes link
1642  *  @adapter: address of board private structure
1643  */
1644 static void igb_power_down_link(struct igb_adapter *adapter)
1645 {
1646         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1647                 igb_power_down_phy_copper_82575(&adapter->hw);
1648         else
1649                 igb_shutdown_serdes_link_82575(&adapter->hw);
1650 }
1651
1652 /**
1653  * Detect and switch function for Media Auto Sense
1654  * @adapter: address of the board private structure
1655  **/
1656 static void igb_check_swap_media(struct igb_adapter *adapter)
1657 {
1658         struct e1000_hw *hw = &adapter->hw;
1659         u32 ctrl_ext, connsw;
1660         bool swap_now = false;
1661
1662         ctrl_ext = rd32(E1000_CTRL_EXT);
1663         connsw = rd32(E1000_CONNSW);
1664
1665         /* need to live swap if current media is copper and we have fiber/serdes
1666          * to go to.
1667          */
1668
1669         if ((hw->phy.media_type == e1000_media_type_copper) &&
1670             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1671                 swap_now = true;
1672         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1673                 /* copper signal takes time to appear */
1674                 if (adapter->copper_tries < 4) {
1675                         adapter->copper_tries++;
1676                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1677                         wr32(E1000_CONNSW, connsw);
1678                         return;
1679                 } else {
1680                         adapter->copper_tries = 0;
1681                         if ((connsw & E1000_CONNSW_PHYSD) &&
1682                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1683                                 swap_now = true;
1684                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1685                                 wr32(E1000_CONNSW, connsw);
1686                         }
1687                 }
1688         }
1689
1690         if (!swap_now)
1691                 return;
1692
1693         switch (hw->phy.media_type) {
1694         case e1000_media_type_copper:
1695                 netdev_info(adapter->netdev,
1696                         "MAS: changing media to fiber/serdes\n");
1697                 ctrl_ext |=
1698                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1699                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1700                 adapter->copper_tries = 0;
1701                 break;
1702         case e1000_media_type_internal_serdes:
1703         case e1000_media_type_fiber:
1704                 netdev_info(adapter->netdev,
1705                         "MAS: changing media to copper\n");
1706                 ctrl_ext &=
1707                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1708                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1709                 break;
1710         default:
1711                 /* shouldn't get here during regular operation */
1712                 netdev_err(adapter->netdev,
1713                         "AMS: Invalid media type found, returning\n");
1714                 break;
1715         }
1716         wr32(E1000_CTRL_EXT, ctrl_ext);
1717 }
1718
1719 /**
1720  *  igb_up - Open the interface and prepare it to handle traffic
1721  *  @adapter: board private structure
1722  **/
1723 int igb_up(struct igb_adapter *adapter)
1724 {
1725         struct e1000_hw *hw = &adapter->hw;
1726         int i;
1727
1728         /* hardware has been reset, we need to reload some things */
1729         igb_configure(adapter);
1730
1731         clear_bit(__IGB_DOWN, &adapter->state);
1732
1733         for (i = 0; i < adapter->num_q_vectors; i++)
1734                 napi_enable(&(adapter->q_vector[i]->napi));
1735
1736         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1737                 igb_configure_msix(adapter);
1738         else
1739                 igb_assign_vector(adapter->q_vector[0], 0);
1740
1741         /* Clear any pending interrupts. */
1742         rd32(E1000_ICR);
1743         igb_irq_enable(adapter);
1744
1745         /* notify VFs that reset has been completed */
1746         if (adapter->vfs_allocated_count) {
1747                 u32 reg_data = rd32(E1000_CTRL_EXT);
1748                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1749                 wr32(E1000_CTRL_EXT, reg_data);
1750         }
1751
1752         netif_tx_start_all_queues(adapter->netdev);
1753
1754         /* start the watchdog. */
1755         hw->mac.get_link_status = 1;
1756         schedule_work(&adapter->watchdog_task);
1757
1758         if ((adapter->flags & IGB_FLAG_EEE) &&
1759             (!hw->dev_spec._82575.eee_disable))
1760                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1761
1762         return 0;
1763 }
1764
1765 void igb_down(struct igb_adapter *adapter)
1766 {
1767         struct net_device *netdev = adapter->netdev;
1768         struct e1000_hw *hw = &adapter->hw;
1769         u32 tctl, rctl;
1770         int i;
1771
1772         /* signal that we're down so the interrupt handler does not
1773          * reschedule our watchdog timer
1774          */
1775         set_bit(__IGB_DOWN, &adapter->state);
1776
1777         /* disable receives in the hardware */
1778         rctl = rd32(E1000_RCTL);
1779         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1780         /* flush and sleep below */
1781
1782         netif_tx_stop_all_queues(netdev);
1783
1784         /* disable transmits in the hardware */
1785         tctl = rd32(E1000_TCTL);
1786         tctl &= ~E1000_TCTL_EN;
1787         wr32(E1000_TCTL, tctl);
1788         /* flush both disables and wait for them to finish */
1789         wrfl();
1790         msleep(10);
1791
1792         igb_irq_disable(adapter);
1793
1794         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1795
1796         for (i = 0; i < adapter->num_q_vectors; i++) {
1797                 napi_synchronize(&(adapter->q_vector[i]->napi));
1798                 napi_disable(&(adapter->q_vector[i]->napi));
1799         }
1800
1801
1802         del_timer_sync(&adapter->watchdog_timer);
1803         del_timer_sync(&adapter->phy_info_timer);
1804
1805         netif_carrier_off(netdev);
1806
1807         /* record the stats before reset*/
1808         spin_lock(&adapter->stats64_lock);
1809         igb_update_stats(adapter, &adapter->stats64);
1810         spin_unlock(&adapter->stats64_lock);
1811
1812         adapter->link_speed = 0;
1813         adapter->link_duplex = 0;
1814
1815         if (!pci_channel_offline(adapter->pdev))
1816                 igb_reset(adapter);
1817         igb_clean_all_tx_rings(adapter);
1818         igb_clean_all_rx_rings(adapter);
1819 #ifdef CONFIG_IGB_DCA
1820
1821         /* since we reset the hardware DCA settings were cleared */
1822         igb_setup_dca(adapter);
1823 #endif
1824 }
1825
1826 void igb_reinit_locked(struct igb_adapter *adapter)
1827 {
1828         WARN_ON(in_interrupt());
1829         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1830                 msleep(1);
1831         igb_down(adapter);
1832         igb_up(adapter);
1833         clear_bit(__IGB_RESETTING, &adapter->state);
1834 }
1835
1836 /** igb_enable_mas - Media Autosense re-enable after swap
1837  *
1838  * @adapter: adapter struct
1839  **/
1840 static s32 igb_enable_mas(struct igb_adapter *adapter)
1841 {
1842         struct e1000_hw *hw = &adapter->hw;
1843         u32 connsw;
1844         s32 ret_val = 0;
1845
1846         connsw = rd32(E1000_CONNSW);
1847         if (!(hw->phy.media_type == e1000_media_type_copper))
1848                 return ret_val;
1849
1850         /* configure for SerDes media detect */
1851         if (!(connsw & E1000_CONNSW_SERDESD)) {
1852                 connsw |= E1000_CONNSW_ENRGSRC;
1853                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1854                 wr32(E1000_CONNSW, connsw);
1855                 wrfl();
1856         } else if (connsw & E1000_CONNSW_SERDESD) {
1857                 /* already SerDes, no need to enable anything */
1858                 return ret_val;
1859         } else {
1860                 netdev_info(adapter->netdev,
1861                         "MAS: Unable to configure feature, disabling..\n");
1862                 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1863         }
1864         return ret_val;
1865 }
1866
1867 void igb_reset(struct igb_adapter *adapter)
1868 {
1869         struct pci_dev *pdev = adapter->pdev;
1870         struct e1000_hw *hw = &adapter->hw;
1871         struct e1000_mac_info *mac = &hw->mac;
1872         struct e1000_fc_info *fc = &hw->fc;
1873         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1874
1875         /* Repartition Pba for greater than 9k mtu
1876          * To take effect CTRL.RST is required.
1877          */
1878         switch (mac->type) {
1879         case e1000_i350:
1880         case e1000_i354:
1881         case e1000_82580:
1882                 pba = rd32(E1000_RXPBS);
1883                 pba = igb_rxpbs_adjust_82580(pba);
1884                 break;
1885         case e1000_82576:
1886                 pba = rd32(E1000_RXPBS);
1887                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1888                 break;
1889         case e1000_82575:
1890         case e1000_i210:
1891         case e1000_i211:
1892         default:
1893                 pba = E1000_PBA_34K;
1894                 break;
1895         }
1896
1897         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1898             (mac->type < e1000_82576)) {
1899                 /* adjust PBA for jumbo frames */
1900                 wr32(E1000_PBA, pba);
1901
1902                 /* To maintain wire speed transmits, the Tx FIFO should be
1903                  * large enough to accommodate two full transmit packets,
1904                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1905                  * the Rx FIFO should be large enough to accommodate at least
1906                  * one full receive packet and is similarly rounded up and
1907                  * expressed in KB.
1908                  */
1909                 pba = rd32(E1000_PBA);
1910                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1911                 tx_space = pba >> 16;
1912                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1913                 pba &= 0xffff;
1914                 /* the Tx fifo also stores 16 bytes of information about the Tx
1915                  * but don't include ethernet FCS because hardware appends it
1916                  */
1917                 min_tx_space = (adapter->max_frame_size +
1918                                 sizeof(union e1000_adv_tx_desc) -
1919                                 ETH_FCS_LEN) * 2;
1920                 min_tx_space = ALIGN(min_tx_space, 1024);
1921                 min_tx_space >>= 10;
1922                 /* software strips receive CRC, so leave room for it */
1923                 min_rx_space = adapter->max_frame_size;
1924                 min_rx_space = ALIGN(min_rx_space, 1024);
1925                 min_rx_space >>= 10;
1926
1927                 /* If current Tx allocation is less than the min Tx FIFO size,
1928                  * and the min Tx FIFO size is less than the current Rx FIFO
1929                  * allocation, take space away from current Rx allocation
1930                  */
1931                 if (tx_space < min_tx_space &&
1932                     ((min_tx_space - tx_space) < pba)) {
1933                         pba = pba - (min_tx_space - tx_space);
1934
1935                         /* if short on Rx space, Rx wins and must trump Tx
1936                          * adjustment
1937                          */
1938                         if (pba < min_rx_space)
1939                                 pba = min_rx_space;
1940                 }
1941                 wr32(E1000_PBA, pba);
1942         }
1943
1944         /* flow control settings */
1945         /* The high water mark must be low enough to fit one full frame
1946          * (or the size used for early receive) above it in the Rx FIFO.
1947          * Set it to the lower of:
1948          * - 90% of the Rx FIFO size, or
1949          * - the full Rx FIFO size minus one full frame
1950          */
1951         hwm = min(((pba << 10) * 9 / 10),
1952                         ((pba << 10) - 2 * adapter->max_frame_size));
1953
1954         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1955         fc->low_water = fc->high_water - 16;
1956         fc->pause_time = 0xFFFF;
1957         fc->send_xon = 1;
1958         fc->current_mode = fc->requested_mode;
1959
1960         /* disable receive for all VFs and wait one second */
1961         if (adapter->vfs_allocated_count) {
1962                 int i;
1963                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1964                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1965
1966                 /* ping all the active vfs to let them know we are going down */
1967                 igb_ping_all_vfs(adapter);
1968
1969                 /* disable transmits and receives */
1970                 wr32(E1000_VFRE, 0);
1971                 wr32(E1000_VFTE, 0);
1972         }
1973
1974         /* Allow time for pending master requests to run */
1975         hw->mac.ops.reset_hw(hw);
1976         wr32(E1000_WUC, 0);
1977
1978         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1979                 /* need to resetup here after media swap */
1980                 adapter->ei.get_invariants(hw);
1981                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1982         }
1983         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
1984                 if (igb_enable_mas(adapter))
1985                         dev_err(&pdev->dev,
1986                                 "Error enabling Media Auto Sense\n");
1987         }
1988         if (hw->mac.ops.init_hw(hw))
1989                 dev_err(&pdev->dev, "Hardware Error\n");
1990
1991         /* Flow control settings reset on hardware reset, so guarantee flow
1992          * control is off when forcing speed.
1993          */
1994         if (!hw->mac.autoneg)
1995                 igb_force_mac_fc(hw);
1996
1997         igb_init_dmac(adapter, pba);
1998 #ifdef CONFIG_IGB_HWMON
1999         /* Re-initialize the thermal sensor on i350 devices. */
2000         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2001                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2002                         /* If present, re-initialize the external thermal sensor
2003                          * interface.
2004                          */
2005                         if (adapter->ets)
2006                                 mac->ops.init_thermal_sensor_thresh(hw);
2007                 }
2008         }
2009 #endif
2010         /* Re-establish EEE setting */
2011         if (hw->phy.media_type == e1000_media_type_copper) {
2012                 switch (mac->type) {
2013                 case e1000_i350:
2014                 case e1000_i210:
2015                 case e1000_i211:
2016                         igb_set_eee_i350(hw);
2017                         break;
2018                 case e1000_i354:
2019                         igb_set_eee_i354(hw);
2020                         break;
2021                 default:
2022                         break;
2023                 }
2024         }
2025         if (!netif_running(adapter->netdev))
2026                 igb_power_down_link(adapter);
2027
2028         igb_update_mng_vlan(adapter);
2029
2030         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2031         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2032
2033         /* Re-enable PTP, where applicable. */
2034         igb_ptp_reset(adapter);
2035
2036         igb_get_phy_info(hw);
2037 }
2038
2039 static netdev_features_t igb_fix_features(struct net_device *netdev,
2040         netdev_features_t features)
2041 {
2042         /* Since there is no support for separate Rx/Tx vlan accel
2043          * enable/disable make sure Tx flag is always in same state as Rx.
2044          */
2045         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2046                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2047         else
2048                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2049
2050         return features;
2051 }
2052
2053 static int igb_set_features(struct net_device *netdev,
2054         netdev_features_t features)
2055 {
2056         netdev_features_t changed = netdev->features ^ features;
2057         struct igb_adapter *adapter = netdev_priv(netdev);
2058
2059         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2060                 igb_vlan_mode(netdev, features);
2061
2062         if (!(changed & NETIF_F_RXALL))
2063                 return 0;
2064
2065         netdev->features = features;
2066
2067         if (netif_running(netdev))
2068                 igb_reinit_locked(adapter);
2069         else
2070                 igb_reset(adapter);
2071
2072         return 0;
2073 }
2074
2075 static const struct net_device_ops igb_netdev_ops = {
2076         .ndo_open               = igb_open,
2077         .ndo_stop               = igb_close,
2078         .ndo_start_xmit         = igb_xmit_frame,
2079         .ndo_get_stats64        = igb_get_stats64,
2080         .ndo_set_rx_mode        = igb_set_rx_mode,
2081         .ndo_set_mac_address    = igb_set_mac,
2082         .ndo_change_mtu         = igb_change_mtu,
2083         .ndo_do_ioctl           = igb_ioctl,
2084         .ndo_tx_timeout         = igb_tx_timeout,
2085         .ndo_validate_addr      = eth_validate_addr,
2086         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2087         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2088         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2089         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2090         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2091         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2092         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2093 #ifdef CONFIG_NET_POLL_CONTROLLER
2094         .ndo_poll_controller    = igb_netpoll,
2095 #endif
2096         .ndo_fix_features       = igb_fix_features,
2097         .ndo_set_features       = igb_set_features,
2098 };
2099
2100 /**
2101  * igb_set_fw_version - Configure version string for ethtool
2102  * @adapter: adapter struct
2103  **/
2104 void igb_set_fw_version(struct igb_adapter *adapter)
2105 {
2106         struct e1000_hw *hw = &adapter->hw;
2107         struct e1000_fw_version fw;
2108
2109         igb_get_fw_version(hw, &fw);
2110
2111         switch (hw->mac.type) {
2112         case e1000_i210:
2113         case e1000_i211:
2114                 if (!(igb_get_flash_presence_i210(hw))) {
2115                         snprintf(adapter->fw_version,
2116                                  sizeof(adapter->fw_version),
2117                                  "%2d.%2d-%d",
2118                                  fw.invm_major, fw.invm_minor,
2119                                  fw.invm_img_type);
2120                         break;
2121                 }
2122                 /* fall through */
2123         default:
2124                 /* if option is rom valid, display its version too */
2125                 if (fw.or_valid) {
2126                         snprintf(adapter->fw_version,
2127                                  sizeof(adapter->fw_version),
2128                                  "%d.%d, 0x%08x, %d.%d.%d",
2129                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2130                                  fw.or_major, fw.or_build, fw.or_patch);
2131                 /* no option rom */
2132                 } else if (fw.etrack_id != 0X0000) {
2133                         snprintf(adapter->fw_version,
2134                             sizeof(adapter->fw_version),
2135                             "%d.%d, 0x%08x",
2136                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2137                 } else {
2138                 snprintf(adapter->fw_version,
2139                     sizeof(adapter->fw_version),
2140                     "%d.%d.%d",
2141                     fw.eep_major, fw.eep_minor, fw.eep_build);
2142                 }
2143                 break;
2144         }
2145         return;
2146 }
2147
2148 /**
2149  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2150  *
2151  * @adapter: adapter struct
2152  **/
2153 static void igb_init_mas(struct igb_adapter *adapter)
2154 {
2155         struct e1000_hw *hw = &adapter->hw;
2156         u16 eeprom_data;
2157
2158         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2159         switch (hw->bus.func) {
2160         case E1000_FUNC_0:
2161                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2162                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2163                         netdev_info(adapter->netdev,
2164                                 "MAS: Enabling Media Autosense for port %d\n",
2165                                 hw->bus.func);
2166                 }
2167                 break;
2168         case E1000_FUNC_1:
2169                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2170                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2171                         netdev_info(adapter->netdev,
2172                                 "MAS: Enabling Media Autosense for port %d\n",
2173                                 hw->bus.func);
2174                 }
2175                 break;
2176         case E1000_FUNC_2:
2177                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2178                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2179                         netdev_info(adapter->netdev,
2180                                 "MAS: Enabling Media Autosense for port %d\n",
2181                                 hw->bus.func);
2182                 }
2183                 break;
2184         case E1000_FUNC_3:
2185                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2186                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2187                         netdev_info(adapter->netdev,
2188                                 "MAS: Enabling Media Autosense for port %d\n",
2189                                 hw->bus.func);
2190                 }
2191                 break;
2192         default:
2193                 /* Shouldn't get here */
2194                 netdev_err(adapter->netdev,
2195                         "MAS: Invalid port configuration, returning\n");
2196                 break;
2197         }
2198 }
2199
2200 /**
2201  *  igb_init_i2c - Init I2C interface
2202  *  @adapter: pointer to adapter structure
2203  **/
2204 static s32 igb_init_i2c(struct igb_adapter *adapter)
2205 {
2206         s32 status = E1000_SUCCESS;
2207
2208         /* I2C interface supported on i350 devices */
2209         if (adapter->hw.mac.type != e1000_i350)
2210                 return E1000_SUCCESS;
2211
2212         /* Initialize the i2c bus which is controlled by the registers.
2213          * This bus will use the i2c_algo_bit structue that implements
2214          * the protocol through toggling of the 4 bits in the register.
2215          */
2216         adapter->i2c_adap.owner = THIS_MODULE;
2217         adapter->i2c_algo = igb_i2c_algo;
2218         adapter->i2c_algo.data = adapter;
2219         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2220         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2221         strlcpy(adapter->i2c_adap.name, "igb BB",
2222                 sizeof(adapter->i2c_adap.name));
2223         status = i2c_bit_add_bus(&adapter->i2c_adap);
2224         return status;
2225 }
2226
2227 /**
2228  *  igb_probe - Device Initialization Routine
2229  *  @pdev: PCI device information struct
2230  *  @ent: entry in igb_pci_tbl
2231  *
2232  *  Returns 0 on success, negative on failure
2233  *
2234  *  igb_probe initializes an adapter identified by a pci_dev structure.
2235  *  The OS initialization, configuring of the adapter private structure,
2236  *  and a hardware reset occur.
2237  **/
2238 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2239 {
2240         struct net_device *netdev;
2241         struct igb_adapter *adapter;
2242         struct e1000_hw *hw;
2243         u16 eeprom_data = 0;
2244         s32 ret_val;
2245         static int global_quad_port_a; /* global quad port a indication */
2246         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2247         int err, pci_using_dac;
2248         u8 part_str[E1000_PBANUM_LENGTH];
2249
2250         /* Catch broken hardware that put the wrong VF device ID in
2251          * the PCIe SR-IOV capability.
2252          */
2253         if (pdev->is_virtfn) {
2254                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2255                         pci_name(pdev), pdev->vendor, pdev->device);
2256                 return -EINVAL;
2257         }
2258
2259         err = pci_enable_device_mem(pdev);
2260         if (err)
2261                 return err;
2262
2263         pci_using_dac = 0;
2264         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2265         if (!err) {
2266                 pci_using_dac = 1;
2267         } else {
2268                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2269                 if (err) {
2270                         dev_err(&pdev->dev,
2271                                 "No usable DMA configuration, aborting\n");
2272                         goto err_dma;
2273                 }
2274         }
2275
2276         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2277                                            IORESOURCE_MEM),
2278                                            igb_driver_name);
2279         if (err)
2280                 goto err_pci_reg;
2281
2282         pci_enable_pcie_error_reporting(pdev);
2283
2284         pci_set_master(pdev);
2285         pci_save_state(pdev);
2286
2287         err = -ENOMEM;
2288         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2289                                    IGB_MAX_TX_QUEUES);
2290         if (!netdev)
2291                 goto err_alloc_etherdev;
2292
2293         SET_NETDEV_DEV(netdev, &pdev->dev);
2294
2295         pci_set_drvdata(pdev, netdev);
2296         adapter = netdev_priv(netdev);
2297         adapter->netdev = netdev;
2298         adapter->pdev = pdev;
2299         hw = &adapter->hw;
2300         hw->back = adapter;
2301         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2302
2303         err = -EIO;
2304         hw->hw_addr = pci_iomap(pdev, 0, 0);
2305         if (!hw->hw_addr)
2306                 goto err_ioremap;
2307
2308         netdev->netdev_ops = &igb_netdev_ops;
2309         igb_set_ethtool_ops(netdev);
2310         netdev->watchdog_timeo = 5 * HZ;
2311
2312         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2313
2314         netdev->mem_start = pci_resource_start(pdev, 0);
2315         netdev->mem_end = pci_resource_end(pdev, 0);
2316
2317         /* PCI config space info */
2318         hw->vendor_id = pdev->vendor;
2319         hw->device_id = pdev->device;
2320         hw->revision_id = pdev->revision;
2321         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2322         hw->subsystem_device_id = pdev->subsystem_device;
2323
2324         /* Copy the default MAC, PHY and NVM function pointers */
2325         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2326         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2327         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2328         /* Initialize skew-specific constants */
2329         err = ei->get_invariants(hw);
2330         if (err)
2331                 goto err_sw_init;
2332
2333         /* setup the private structure */
2334         err = igb_sw_init(adapter);
2335         if (err)
2336                 goto err_sw_init;
2337
2338         igb_get_bus_info_pcie(hw);
2339
2340         hw->phy.autoneg_wait_to_complete = false;
2341
2342         /* Copper options */
2343         if (hw->phy.media_type == e1000_media_type_copper) {
2344                 hw->phy.mdix = AUTO_ALL_MODES;
2345                 hw->phy.disable_polarity_correction = false;
2346                 hw->phy.ms_type = e1000_ms_hw_default;
2347         }
2348
2349         if (igb_check_reset_block(hw))
2350                 dev_info(&pdev->dev,
2351                         "PHY reset is blocked due to SOL/IDER session.\n");
2352
2353         /* features is initialized to 0 in allocation, it might have bits
2354          * set by igb_sw_init so we should use an or instead of an
2355          * assignment.
2356          */
2357         netdev->features |= NETIF_F_SG |
2358                             NETIF_F_IP_CSUM |
2359                             NETIF_F_IPV6_CSUM |
2360                             NETIF_F_TSO |
2361                             NETIF_F_TSO6 |
2362                             NETIF_F_RXHASH |
2363                             NETIF_F_RXCSUM |
2364                             NETIF_F_HW_VLAN_CTAG_RX |
2365                             NETIF_F_HW_VLAN_CTAG_TX;
2366
2367         /* copy netdev features into list of user selectable features */
2368         netdev->hw_features |= netdev->features;
2369         netdev->hw_features |= NETIF_F_RXALL;
2370
2371         /* set this bit last since it cannot be part of hw_features */
2372         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2373
2374         netdev->vlan_features |= NETIF_F_TSO |
2375                                  NETIF_F_TSO6 |
2376                                  NETIF_F_IP_CSUM |
2377                                  NETIF_F_IPV6_CSUM |
2378                                  NETIF_F_SG;
2379
2380         netdev->priv_flags |= IFF_SUPP_NOFCS;
2381
2382         if (pci_using_dac) {
2383                 netdev->features |= NETIF_F_HIGHDMA;
2384                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2385         }
2386
2387         if (hw->mac.type >= e1000_82576) {
2388                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2389                 netdev->features |= NETIF_F_SCTP_CSUM;
2390         }
2391
2392         netdev->priv_flags |= IFF_UNICAST_FLT;
2393
2394         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2395
2396         /* before reading the NVM, reset the controller to put the device in a
2397          * known good starting state
2398          */
2399         hw->mac.ops.reset_hw(hw);
2400
2401         /* make sure the NVM is good , i211/i210 parts can have special NVM
2402          * that doesn't contain a checksum
2403          */
2404         switch (hw->mac.type) {
2405         case e1000_i210:
2406         case e1000_i211:
2407                 if (igb_get_flash_presence_i210(hw)) {
2408                         if (hw->nvm.ops.validate(hw) < 0) {
2409                                 dev_err(&pdev->dev,
2410                                         "The NVM Checksum Is Not Valid\n");
2411                                 err = -EIO;
2412                                 goto err_eeprom;
2413                         }
2414                 }
2415                 break;
2416         default:
2417                 if (hw->nvm.ops.validate(hw) < 0) {
2418                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2419                         err = -EIO;
2420                         goto err_eeprom;
2421                 }
2422                 break;
2423         }
2424
2425         /* copy the MAC address out of the NVM */
2426         if (hw->mac.ops.read_mac_addr(hw))
2427                 dev_err(&pdev->dev, "NVM Read Error\n");
2428
2429         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2430
2431         if (!is_valid_ether_addr(netdev->dev_addr)) {
2432                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2433                 err = -EIO;
2434                 goto err_eeprom;
2435         }
2436
2437         /* get firmware version for ethtool -i */
2438         igb_set_fw_version(adapter);
2439
2440         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2441                     (unsigned long) adapter);
2442         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2443                     (unsigned long) adapter);
2444
2445         INIT_WORK(&adapter->reset_task, igb_reset_task);
2446         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2447
2448         /* Initialize link properties that are user-changeable */
2449         adapter->fc_autoneg = true;
2450         hw->mac.autoneg = true;
2451         hw->phy.autoneg_advertised = 0x2f;
2452
2453         hw->fc.requested_mode = e1000_fc_default;
2454         hw->fc.current_mode = e1000_fc_default;
2455
2456         igb_validate_mdi_setting(hw);
2457
2458         /* By default, support wake on port A */
2459         if (hw->bus.func == 0)
2460                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2461
2462         /* Check the NVM for wake support on non-port A ports */
2463         if (hw->mac.type >= e1000_82580)
2464                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2465                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2466                                  &eeprom_data);
2467         else if (hw->bus.func == 1)
2468                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2469
2470         if (eeprom_data & IGB_EEPROM_APME)
2471                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2472
2473         /* now that we have the eeprom settings, apply the special cases where
2474          * the eeprom may be wrong or the board simply won't support wake on
2475          * lan on a particular port
2476          */
2477         switch (pdev->device) {
2478         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2479                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2480                 break;
2481         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2482         case E1000_DEV_ID_82576_FIBER:
2483         case E1000_DEV_ID_82576_SERDES:
2484                 /* Wake events only supported on port A for dual fiber
2485                  * regardless of eeprom setting
2486                  */
2487                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2488                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2489                 break;
2490         case E1000_DEV_ID_82576_QUAD_COPPER:
2491         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2492                 /* if quad port adapter, disable WoL on all but port A */
2493                 if (global_quad_port_a != 0)
2494                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2495                 else
2496                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2497                 /* Reset for multiple quad port adapters */
2498                 if (++global_quad_port_a == 4)
2499                         global_quad_port_a = 0;
2500                 break;
2501         default:
2502                 /* If the device can't wake, don't set software support */
2503                 if (!device_can_wakeup(&adapter->pdev->dev))
2504                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2505         }
2506
2507         /* initialize the wol settings based on the eeprom settings */
2508         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2509                 adapter->wol |= E1000_WUFC_MAG;
2510
2511         /* Some vendors want WoL disabled by default, but still supported */
2512         if ((hw->mac.type == e1000_i350) &&
2513             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2514                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2515                 adapter->wol = 0;
2516         }
2517
2518         device_set_wakeup_enable(&adapter->pdev->dev,
2519                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2520
2521         /* reset the hardware with the new settings */
2522         igb_reset(adapter);
2523
2524         /* Init the I2C interface */
2525         err = igb_init_i2c(adapter);
2526         if (err) {
2527                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2528                 goto err_eeprom;
2529         }
2530
2531         /* let the f/w know that the h/w is now under the control of the
2532          * driver. */
2533         igb_get_hw_control(adapter);
2534
2535         strcpy(netdev->name, "eth%d");
2536         err = register_netdev(netdev);
2537         if (err)
2538                 goto err_register;
2539
2540         /* carrier off reporting is important to ethtool even BEFORE open */
2541         netif_carrier_off(netdev);
2542
2543 #ifdef CONFIG_IGB_DCA
2544         if (dca_add_requester(&pdev->dev) == 0) {
2545                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2546                 dev_info(&pdev->dev, "DCA enabled\n");
2547                 igb_setup_dca(adapter);
2548         }
2549
2550 #endif
2551 #ifdef CONFIG_IGB_HWMON
2552         /* Initialize the thermal sensor on i350 devices. */
2553         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2554                 u16 ets_word;
2555
2556                 /* Read the NVM to determine if this i350 device supports an
2557                  * external thermal sensor.
2558                  */
2559                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2560                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2561                         adapter->ets = true;
2562                 else
2563                         adapter->ets = false;
2564                 if (igb_sysfs_init(adapter))
2565                         dev_err(&pdev->dev,
2566                                 "failed to allocate sysfs resources\n");
2567         } else {
2568                 adapter->ets = false;
2569         }
2570 #endif
2571         /* Check if Media Autosense is enabled */
2572         adapter->ei = *ei;
2573         if (hw->dev_spec._82575.mas_capable)
2574                 igb_init_mas(adapter);
2575
2576         /* do hw tstamp init after resetting */
2577         igb_ptp_init(adapter);
2578
2579         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2580         /* print bus type/speed/width info, not applicable to i354 */
2581         if (hw->mac.type != e1000_i354) {
2582                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2583                          netdev->name,
2584                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2585                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2586                            "unknown"),
2587                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2588                           "Width x4" :
2589                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2590                           "Width x2" :
2591                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2592                           "Width x1" : "unknown"), netdev->dev_addr);
2593         }
2594
2595         if ((hw->mac.type >= e1000_i210 ||
2596              igb_get_flash_presence_i210(hw))) {
2597                 ret_val = igb_read_part_string(hw, part_str,
2598                                                E1000_PBANUM_LENGTH);
2599         } else {
2600                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2601         }
2602
2603         if (ret_val)
2604                 strcpy(part_str, "Unknown");
2605         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2606         dev_info(&pdev->dev,
2607                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2608                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2609                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2610                 adapter->num_rx_queues, adapter->num_tx_queues);
2611         if (hw->phy.media_type == e1000_media_type_copper) {
2612                 switch (hw->mac.type) {
2613                 case e1000_i350:
2614                 case e1000_i210:
2615                 case e1000_i211:
2616                         /* Enable EEE for internal copper PHY devices */
2617                         err = igb_set_eee_i350(hw);
2618                         if ((!err) &&
2619                             (!hw->dev_spec._82575.eee_disable)) {
2620                                 adapter->eee_advert =
2621                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2622                                 adapter->flags |= IGB_FLAG_EEE;
2623                         }
2624                         break;
2625                 case e1000_i354:
2626                         if ((rd32(E1000_CTRL_EXT) &
2627                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2628                                 err = igb_set_eee_i354(hw);
2629                                 if ((!err) &&
2630                                         (!hw->dev_spec._82575.eee_disable)) {
2631                                         adapter->eee_advert =
2632                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2633                                         adapter->flags |= IGB_FLAG_EEE;
2634                                 }
2635                         }
2636                         break;
2637                 default:
2638                         break;
2639                 }
2640         }
2641         pm_runtime_put_noidle(&pdev->dev);
2642         return 0;
2643
2644 err_register:
2645         igb_release_hw_control(adapter);
2646         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2647 err_eeprom:
2648         if (!igb_check_reset_block(hw))
2649                 igb_reset_phy(hw);
2650
2651         if (hw->flash_address)
2652                 iounmap(hw->flash_address);
2653 err_sw_init:
2654         igb_clear_interrupt_scheme(adapter);
2655         pci_iounmap(pdev, hw->hw_addr);
2656 err_ioremap:
2657         free_netdev(netdev);
2658 err_alloc_etherdev:
2659         pci_release_selected_regions(pdev,
2660                                      pci_select_bars(pdev, IORESOURCE_MEM));
2661 err_pci_reg:
2662 err_dma:
2663         pci_disable_device(pdev);
2664         return err;
2665 }
2666
2667 #ifdef CONFIG_PCI_IOV
2668 static int igb_disable_sriov(struct pci_dev *pdev)
2669 {
2670         struct net_device *netdev = pci_get_drvdata(pdev);
2671         struct igb_adapter *adapter = netdev_priv(netdev);
2672         struct e1000_hw *hw = &adapter->hw;
2673
2674         /* reclaim resources allocated to VFs */
2675         if (adapter->vf_data) {
2676                 /* disable iov and allow time for transactions to clear */
2677                 if (pci_vfs_assigned(pdev)) {
2678                         dev_warn(&pdev->dev,
2679                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2680                         return -EPERM;
2681                 } else {
2682                         pci_disable_sriov(pdev);
2683                         msleep(500);
2684                 }
2685
2686                 kfree(adapter->vf_data);
2687                 adapter->vf_data = NULL;
2688                 adapter->vfs_allocated_count = 0;
2689                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2690                 wrfl();
2691                 msleep(100);
2692                 dev_info(&pdev->dev, "IOV Disabled\n");
2693
2694                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2695                 adapter->flags |= IGB_FLAG_DMAC;
2696         }
2697
2698         return 0;
2699 }
2700
2701 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2702 {
2703         struct net_device *netdev = pci_get_drvdata(pdev);
2704         struct igb_adapter *adapter = netdev_priv(netdev);
2705         int old_vfs = pci_num_vf(pdev);
2706         int err = 0;
2707         int i;
2708
2709         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2710                 err = -EPERM;
2711                 goto out;
2712         }
2713         if (!num_vfs)
2714                 goto out;
2715
2716         if (old_vfs) {
2717                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2718                          old_vfs, max_vfs);
2719                 adapter->vfs_allocated_count = old_vfs;
2720         } else
2721                 adapter->vfs_allocated_count = num_vfs;
2722
2723         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2724                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2725
2726         /* if allocation failed then we do not support SR-IOV */
2727         if (!adapter->vf_data) {
2728                 adapter->vfs_allocated_count = 0;
2729                 dev_err(&pdev->dev,
2730                         "Unable to allocate memory for VF Data Storage\n");
2731                 err = -ENOMEM;
2732                 goto out;
2733         }
2734
2735         /* only call pci_enable_sriov() if no VFs are allocated already */
2736         if (!old_vfs) {
2737                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2738                 if (err)
2739                         goto err_out;
2740         }
2741         dev_info(&pdev->dev, "%d VFs allocated\n",
2742                  adapter->vfs_allocated_count);
2743         for (i = 0; i < adapter->vfs_allocated_count; i++)
2744                 igb_vf_configure(adapter, i);
2745
2746         /* DMA Coalescing is not supported in IOV mode. */
2747         adapter->flags &= ~IGB_FLAG_DMAC;
2748         goto out;
2749
2750 err_out:
2751         kfree(adapter->vf_data);
2752         adapter->vf_data = NULL;
2753         adapter->vfs_allocated_count = 0;
2754 out:
2755         return err;
2756 }
2757
2758 #endif
2759 /**
2760  *  igb_remove_i2c - Cleanup  I2C interface
2761  *  @adapter: pointer to adapter structure
2762  **/
2763 static void igb_remove_i2c(struct igb_adapter *adapter)
2764 {
2765         /* free the adapter bus structure */
2766         i2c_del_adapter(&adapter->i2c_adap);
2767 }
2768
2769 /**
2770  *  igb_remove - Device Removal Routine
2771  *  @pdev: PCI device information struct
2772  *
2773  *  igb_remove is called by the PCI subsystem to alert the driver
2774  *  that it should release a PCI device.  The could be caused by a
2775  *  Hot-Plug event, or because the driver is going to be removed from
2776  *  memory.
2777  **/
2778 static void igb_remove(struct pci_dev *pdev)
2779 {
2780         struct net_device *netdev = pci_get_drvdata(pdev);
2781         struct igb_adapter *adapter = netdev_priv(netdev);
2782         struct e1000_hw *hw = &adapter->hw;
2783
2784         pm_runtime_get_noresume(&pdev->dev);
2785 #ifdef CONFIG_IGB_HWMON
2786         igb_sysfs_exit(adapter);
2787 #endif
2788         igb_remove_i2c(adapter);
2789         igb_ptp_stop(adapter);
2790         /* The watchdog timer may be rescheduled, so explicitly
2791          * disable watchdog from being rescheduled.
2792          */
2793         set_bit(__IGB_DOWN, &adapter->state);
2794         del_timer_sync(&adapter->watchdog_timer);
2795         del_timer_sync(&adapter->phy_info_timer);
2796
2797         cancel_work_sync(&adapter->reset_task);
2798         cancel_work_sync(&adapter->watchdog_task);
2799
2800 #ifdef CONFIG_IGB_DCA
2801         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2802                 dev_info(&pdev->dev, "DCA disabled\n");
2803                 dca_remove_requester(&pdev->dev);
2804                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2805                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2806         }
2807 #endif
2808
2809         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2810          * would have already happened in close and is redundant.
2811          */
2812         igb_release_hw_control(adapter);
2813
2814         unregister_netdev(netdev);
2815
2816         igb_clear_interrupt_scheme(adapter);
2817
2818 #ifdef CONFIG_PCI_IOV
2819         igb_disable_sriov(pdev);
2820 #endif
2821
2822         pci_iounmap(pdev, hw->hw_addr);
2823         if (hw->flash_address)
2824                 iounmap(hw->flash_address);
2825         pci_release_selected_regions(pdev,
2826                                      pci_select_bars(pdev, IORESOURCE_MEM));
2827
2828         kfree(adapter->shadow_vfta);
2829         free_netdev(netdev);
2830
2831         pci_disable_pcie_error_reporting(pdev);
2832
2833         pci_disable_device(pdev);
2834 }
2835
2836 /**
2837  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2838  *  @adapter: board private structure to initialize
2839  *
2840  *  This function initializes the vf specific data storage and then attempts to
2841  *  allocate the VFs.  The reason for ordering it this way is because it is much
2842  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2843  *  the memory for the VFs.
2844  **/
2845 static void igb_probe_vfs(struct igb_adapter *adapter)
2846 {
2847 #ifdef CONFIG_PCI_IOV
2848         struct pci_dev *pdev = adapter->pdev;
2849         struct e1000_hw *hw = &adapter->hw;
2850
2851         /* Virtualization features not supported on i210 family. */
2852         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2853                 return;
2854
2855         pci_sriov_set_totalvfs(pdev, 7);
2856         igb_pci_enable_sriov(pdev, max_vfs);
2857
2858 #endif /* CONFIG_PCI_IOV */
2859 }
2860
2861 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2862 {
2863         struct e1000_hw *hw = &adapter->hw;
2864         u32 max_rss_queues;
2865
2866         /* Determine the maximum number of RSS queues supported. */
2867         switch (hw->mac.type) {
2868         case e1000_i211:
2869                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2870                 break;
2871         case e1000_82575:
2872         case e1000_i210:
2873                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2874                 break;
2875         case e1000_i350:
2876                 /* I350 cannot do RSS and SR-IOV at the same time */
2877                 if (!!adapter->vfs_allocated_count) {
2878                         max_rss_queues = 1;
2879                         break;
2880                 }
2881                 /* fall through */
2882         case e1000_82576:
2883                 if (!!adapter->vfs_allocated_count) {
2884                         max_rss_queues = 2;
2885                         break;
2886                 }
2887                 /* fall through */
2888         case e1000_82580:
2889         case e1000_i354:
2890         default:
2891                 max_rss_queues = IGB_MAX_RX_QUEUES;
2892                 break;
2893         }
2894
2895         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2896
2897         /* Determine if we need to pair queues. */
2898         switch (hw->mac.type) {
2899         case e1000_82575:
2900         case e1000_i211:
2901                 /* Device supports enough interrupts without queue pairing. */
2902                 break;
2903         case e1000_82576:
2904                 /* If VFs are going to be allocated with RSS queues then we
2905                  * should pair the queues in order to conserve interrupts due
2906                  * to limited supply.
2907                  */
2908                 if ((adapter->rss_queues > 1) &&
2909                     (adapter->vfs_allocated_count > 6))
2910                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2911                 /* fall through */
2912         case e1000_82580:
2913         case e1000_i350:
2914         case e1000_i354:
2915         case e1000_i210:
2916         default:
2917                 /* If rss_queues > half of max_rss_queues, pair the queues in
2918                  * order to conserve interrupts due to limited supply.
2919                  */
2920                 if (adapter->rss_queues > (max_rss_queues / 2))
2921                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2922                 break;
2923         }
2924 }
2925
2926 /**
2927  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
2928  *  @adapter: board private structure to initialize
2929  *
2930  *  igb_sw_init initializes the Adapter private data structure.
2931  *  Fields are initialized based on PCI device information and
2932  *  OS network device settings (MTU size).
2933  **/
2934 static int igb_sw_init(struct igb_adapter *adapter)
2935 {
2936         struct e1000_hw *hw = &adapter->hw;
2937         struct net_device *netdev = adapter->netdev;
2938         struct pci_dev *pdev = adapter->pdev;
2939
2940         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2941
2942         /* set default ring sizes */
2943         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2944         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2945
2946         /* set default ITR values */
2947         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2948         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2949
2950         /* set default work limits */
2951         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2952
2953         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2954                                   VLAN_HLEN;
2955         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2956
2957         spin_lock_init(&adapter->stats64_lock);
2958 #ifdef CONFIG_PCI_IOV
2959         switch (hw->mac.type) {
2960         case e1000_82576:
2961         case e1000_i350:
2962                 if (max_vfs > 7) {
2963                         dev_warn(&pdev->dev,
2964                                  "Maximum of 7 VFs per PF, using max\n");
2965                         max_vfs = adapter->vfs_allocated_count = 7;
2966                 } else
2967                         adapter->vfs_allocated_count = max_vfs;
2968                 if (adapter->vfs_allocated_count)
2969                         dev_warn(&pdev->dev,
2970                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2971                 break;
2972         default:
2973                 break;
2974         }
2975 #endif /* CONFIG_PCI_IOV */
2976
2977         igb_init_queue_configuration(adapter);
2978
2979         /* Setup and initialize a copy of the hw vlan table array */
2980         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2981                                        GFP_ATOMIC);
2982
2983         /* This call may decrease the number of queues */
2984         if (igb_init_interrupt_scheme(adapter, true)) {
2985                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2986                 return -ENOMEM;
2987         }
2988
2989         igb_probe_vfs(adapter);
2990
2991         /* Explicitly disable IRQ since the NIC can be in any state. */
2992         igb_irq_disable(adapter);
2993
2994         if (hw->mac.type >= e1000_i350)
2995                 adapter->flags &= ~IGB_FLAG_DMAC;
2996
2997         set_bit(__IGB_DOWN, &adapter->state);
2998         return 0;
2999 }
3000
3001 /**
3002  *  igb_open - Called when a network interface is made active
3003  *  @netdev: network interface device structure
3004  *
3005  *  Returns 0 on success, negative value on failure
3006  *
3007  *  The open entry point is called when a network interface is made
3008  *  active by the system (IFF_UP).  At this point all resources needed
3009  *  for transmit and receive operations are allocated, the interrupt
3010  *  handler is registered with the OS, the watchdog timer is started,
3011  *  and the stack is notified that the interface is ready.
3012  **/
3013 static int __igb_open(struct net_device *netdev, bool resuming)
3014 {
3015         struct igb_adapter *adapter = netdev_priv(netdev);
3016         struct e1000_hw *hw = &adapter->hw;
3017         struct pci_dev *pdev = adapter->pdev;
3018         int err;
3019         int i;
3020
3021         /* disallow open during test */
3022         if (test_bit(__IGB_TESTING, &adapter->state)) {
3023                 WARN_ON(resuming);
3024                 return -EBUSY;
3025         }
3026
3027         if (!resuming)
3028                 pm_runtime_get_sync(&pdev->dev);
3029
3030         netif_carrier_off(netdev);
3031
3032         /* allocate transmit descriptors */
3033         err = igb_setup_all_tx_resources(adapter);
3034         if (err)
3035                 goto err_setup_tx;
3036
3037         /* allocate receive descriptors */
3038         err = igb_setup_all_rx_resources(adapter);
3039         if (err)
3040                 goto err_setup_rx;
3041
3042         igb_power_up_link(adapter);
3043
3044         /* before we allocate an interrupt, we must be ready to handle it.
3045          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3046          * as soon as we call pci_request_irq, so we have to setup our
3047          * clean_rx handler before we do so.
3048          */
3049         igb_configure(adapter);
3050
3051         err = igb_request_irq(adapter);
3052         if (err)
3053                 goto err_req_irq;
3054
3055         /* Notify the stack of the actual queue counts. */
3056         err = netif_set_real_num_tx_queues(adapter->netdev,
3057                                            adapter->num_tx_queues);
3058         if (err)
3059                 goto err_set_queues;
3060
3061         err = netif_set_real_num_rx_queues(adapter->netdev,
3062                                            adapter->num_rx_queues);
3063         if (err)
3064                 goto err_set_queues;
3065
3066         /* From here on the code is the same as igb_up() */
3067         clear_bit(__IGB_DOWN, &adapter->state);
3068
3069         for (i = 0; i < adapter->num_q_vectors; i++)
3070                 napi_enable(&(adapter->q_vector[i]->napi));
3071
3072         /* Clear any pending interrupts. */
3073         rd32(E1000_ICR);
3074
3075         igb_irq_enable(adapter);
3076
3077         /* notify VFs that reset has been completed */
3078         if (adapter->vfs_allocated_count) {
3079                 u32 reg_data = rd32(E1000_CTRL_EXT);
3080                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3081                 wr32(E1000_CTRL_EXT, reg_data);
3082         }
3083
3084         netif_tx_start_all_queues(netdev);
3085
3086         if (!resuming)
3087                 pm_runtime_put(&pdev->dev);
3088
3089         /* start the watchdog. */
3090         hw->mac.get_link_status = 1;
3091         schedule_work(&adapter->watchdog_task);
3092
3093         return 0;
3094
3095 err_set_queues:
3096         igb_free_irq(adapter);
3097 err_req_irq:
3098         igb_release_hw_control(adapter);
3099         igb_power_down_link(adapter);
3100         igb_free_all_rx_resources(adapter);
3101 err_setup_rx:
3102         igb_free_all_tx_resources(adapter);
3103 err_setup_tx:
3104         igb_reset(adapter);
3105         if (!resuming)
3106                 pm_runtime_put(&pdev->dev);
3107
3108         return err;
3109 }
3110
3111 static int igb_open(struct net_device *netdev)
3112 {
3113         return __igb_open(netdev, false);
3114 }
3115
3116 /**
3117  *  igb_close - Disables a network interface
3118  *  @netdev: network interface device structure
3119  *
3120  *  Returns 0, this is not allowed to fail
3121  *
3122  *  The close entry point is called when an interface is de-activated
3123  *  by the OS.  The hardware is still under the driver's control, but
3124  *  needs to be disabled.  A global MAC reset is issued to stop the
3125  *  hardware, and all transmit and receive resources are freed.
3126  **/
3127 static int __igb_close(struct net_device *netdev, bool suspending)
3128 {
3129         struct igb_adapter *adapter = netdev_priv(netdev);
3130         struct pci_dev *pdev = adapter->pdev;
3131
3132         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3133
3134         if (!suspending)
3135                 pm_runtime_get_sync(&pdev->dev);
3136
3137         igb_down(adapter);
3138         igb_free_irq(adapter);
3139
3140         igb_free_all_tx_resources(adapter);
3141         igb_free_all_rx_resources(adapter);
3142
3143         if (!suspending)
3144                 pm_runtime_put_sync(&pdev->dev);
3145         return 0;
3146 }
3147
3148 static int igb_close(struct net_device *netdev)
3149 {
3150         return __igb_close(netdev, false);
3151 }
3152
3153 /**
3154  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3155  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3156  *
3157  *  Return 0 on success, negative on failure
3158  **/
3159 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3160 {
3161         struct device *dev = tx_ring->dev;
3162         int size;
3163
3164         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3165
3166         tx_ring->tx_buffer_info = vzalloc(size);
3167         if (!tx_ring->tx_buffer_info)
3168                 goto err;
3169
3170         /* round up to nearest 4K */
3171         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3172         tx_ring->size = ALIGN(tx_ring->size, 4096);
3173
3174         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3175                                            &tx_ring->dma, GFP_KERNEL);
3176         if (!tx_ring->desc)
3177                 goto err;
3178
3179         tx_ring->next_to_use = 0;
3180         tx_ring->next_to_clean = 0;
3181
3182         return 0;
3183
3184 err:
3185         vfree(tx_ring->tx_buffer_info);
3186         tx_ring->tx_buffer_info = NULL;
3187         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3188         return -ENOMEM;
3189 }
3190
3191 /**
3192  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3193  *                               (Descriptors) for all queues
3194  *  @adapter: board private structure
3195  *
3196  *  Return 0 on success, negative on failure
3197  **/
3198 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3199 {
3200         struct pci_dev *pdev = adapter->pdev;
3201         int i, err = 0;
3202
3203         for (i = 0; i < adapter->num_tx_queues; i++) {
3204                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3205                 if (err) {
3206                         dev_err(&pdev->dev,
3207                                 "Allocation for Tx Queue %u failed\n", i);
3208                         for (i--; i >= 0; i--)
3209                                 igb_free_tx_resources(adapter->tx_ring[i]);
3210                         break;
3211                 }
3212         }
3213
3214         return err;
3215 }
3216
3217 /**
3218  *  igb_setup_tctl - configure the transmit control registers
3219  *  @adapter: Board private structure
3220  **/
3221 void igb_setup_tctl(struct igb_adapter *adapter)
3222 {
3223         struct e1000_hw *hw = &adapter->hw;
3224         u32 tctl;
3225
3226         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3227         wr32(E1000_TXDCTL(0), 0);
3228
3229         /* Program the Transmit Control Register */
3230         tctl = rd32(E1000_TCTL);
3231         tctl &= ~E1000_TCTL_CT;
3232         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3233                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3234
3235         igb_config_collision_dist(hw);
3236
3237         /* Enable transmits */
3238         tctl |= E1000_TCTL_EN;
3239
3240         wr32(E1000_TCTL, tctl);
3241 }
3242
3243 /**
3244  *  igb_configure_tx_ring - Configure transmit ring after Reset
3245  *  @adapter: board private structure
3246  *  @ring: tx ring to configure
3247  *
3248  *  Configure a transmit ring after a reset.
3249  **/
3250 void igb_configure_tx_ring(struct igb_adapter *adapter,
3251                            struct igb_ring *ring)
3252 {
3253         struct e1000_hw *hw = &adapter->hw;
3254         u32 txdctl = 0;
3255         u64 tdba = ring->dma;
3256         int reg_idx = ring->reg_idx;
3257
3258         /* disable the queue */
3259         wr32(E1000_TXDCTL(reg_idx), 0);
3260         wrfl();
3261         mdelay(10);
3262
3263         wr32(E1000_TDLEN(reg_idx),
3264              ring->count * sizeof(union e1000_adv_tx_desc));
3265         wr32(E1000_TDBAL(reg_idx),
3266              tdba & 0x00000000ffffffffULL);
3267         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3268
3269         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3270         wr32(E1000_TDH(reg_idx), 0);
3271         writel(0, ring->tail);
3272
3273         txdctl |= IGB_TX_PTHRESH;
3274         txdctl |= IGB_TX_HTHRESH << 8;
3275         txdctl |= IGB_TX_WTHRESH << 16;
3276
3277         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3278         wr32(E1000_TXDCTL(reg_idx), txdctl);
3279 }
3280
3281 /**
3282  *  igb_configure_tx - Configure transmit Unit after Reset
3283  *  @adapter: board private structure
3284  *
3285  *  Configure the Tx unit of the MAC after a reset.
3286  **/
3287 static void igb_configure_tx(struct igb_adapter *adapter)
3288 {
3289         int i;
3290
3291         for (i = 0; i < adapter->num_tx_queues; i++)
3292                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3293 }
3294
3295 /**
3296  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3297  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3298  *
3299  *  Returns 0 on success, negative on failure
3300  **/
3301 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3302 {
3303         struct device *dev = rx_ring->dev;
3304         int size;
3305
3306         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3307
3308         rx_ring->rx_buffer_info = vzalloc(size);
3309         if (!rx_ring->rx_buffer_info)
3310                 goto err;
3311
3312         /* Round up to nearest 4K */
3313         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3314         rx_ring->size = ALIGN(rx_ring->size, 4096);
3315
3316         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3317                                            &rx_ring->dma, GFP_KERNEL);
3318         if (!rx_ring->desc)
3319                 goto err;
3320
3321         rx_ring->next_to_alloc = 0;
3322         rx_ring->next_to_clean = 0;
3323         rx_ring->next_to_use = 0;
3324
3325         return 0;
3326
3327 err:
3328         vfree(rx_ring->rx_buffer_info);
3329         rx_ring->rx_buffer_info = NULL;
3330         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3331         return -ENOMEM;
3332 }
3333
3334 /**
3335  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3336  *                               (Descriptors) for all queues
3337  *  @adapter: board private structure
3338  *
3339  *  Return 0 on success, negative on failure
3340  **/
3341 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3342 {
3343         struct pci_dev *pdev = adapter->pdev;
3344         int i, err = 0;
3345
3346         for (i = 0; i < adapter->num_rx_queues; i++) {
3347                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3348                 if (err) {
3349                         dev_err(&pdev->dev,
3350                                 "Allocation for Rx Queue %u failed\n", i);
3351                         for (i--; i >= 0; i--)
3352                                 igb_free_rx_resources(adapter->rx_ring[i]);
3353                         break;
3354                 }
3355         }
3356
3357         return err;
3358 }
3359
3360 /**
3361  *  igb_setup_mrqc - configure the multiple receive queue control registers
3362  *  @adapter: Board private structure
3363  **/
3364 static void igb_setup_mrqc(struct igb_adapter *adapter)
3365 {
3366         struct e1000_hw *hw = &adapter->hw;
3367         u32 mrqc, rxcsum;
3368         u32 j, num_rx_queues;
3369         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3370                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3371                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3372                                         0xFA01ACBE };
3373
3374         /* Fill out hash function seeds */
3375         for (j = 0; j < 10; j++)
3376                 wr32(E1000_RSSRK(j), rsskey[j]);
3377
3378         num_rx_queues = adapter->rss_queues;
3379
3380         switch (hw->mac.type) {
3381         case e1000_82576:
3382                 /* 82576 supports 2 RSS queues for SR-IOV */
3383                 if (adapter->vfs_allocated_count)
3384                         num_rx_queues = 2;
3385                 break;
3386         default:
3387                 break;
3388         }
3389
3390         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3391                 for (j = 0; j < IGB_RETA_SIZE; j++)
3392                         adapter->rss_indir_tbl[j] = (j * num_rx_queues) / IGB_RETA_SIZE;
3393                 adapter->rss_indir_tbl_init = num_rx_queues;
3394         }
3395         igb_write_rss_indir_tbl(adapter);
3396
3397         /* Disable raw packet checksumming so that RSS hash is placed in
3398          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3399          * offloads as they are enabled by default
3400          */
3401         rxcsum = rd32(E1000_RXCSUM);
3402         rxcsum |= E1000_RXCSUM_PCSD;
3403
3404         if (adapter->hw.mac.type >= e1000_82576)
3405                 /* Enable Receive Checksum Offload for SCTP */
3406                 rxcsum |= E1000_RXCSUM_CRCOFL;
3407
3408         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3409         wr32(E1000_RXCSUM, rxcsum);
3410
3411         /* Generate RSS hash based on packet types, TCP/UDP
3412          * port numbers and/or IPv4/v6 src and dst addresses
3413          */
3414         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3415                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3416                E1000_MRQC_RSS_FIELD_IPV6 |
3417                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3418                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3419
3420         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3421                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3422         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3423                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3424
3425         /* If VMDq is enabled then we set the appropriate mode for that, else
3426          * we default to RSS so that an RSS hash is calculated per packet even
3427          * if we are only using one queue
3428          */
3429         if (adapter->vfs_allocated_count) {
3430                 if (hw->mac.type > e1000_82575) {
3431                         /* Set the default pool for the PF's first queue */
3432                         u32 vtctl = rd32(E1000_VT_CTL);
3433                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3434                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3435                         vtctl |= adapter->vfs_allocated_count <<
3436                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3437                         wr32(E1000_VT_CTL, vtctl);
3438                 }
3439                 if (adapter->rss_queues > 1)
3440                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3441                 else
3442                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3443         } else {
3444                 if (hw->mac.type != e1000_i211)
3445                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3446         }
3447         igb_vmm_control(adapter);
3448
3449         wr32(E1000_MRQC, mrqc);
3450 }
3451
3452 /**
3453  *  igb_setup_rctl - configure the receive control registers
3454  *  @adapter: Board private structure
3455  **/
3456 void igb_setup_rctl(struct igb_adapter *adapter)
3457 {
3458         struct e1000_hw *hw = &adapter->hw;
3459         u32 rctl;
3460
3461         rctl = rd32(E1000_RCTL);
3462
3463         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3464         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3465
3466         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3467                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3468
3469         /* enable stripping of CRC. It's unlikely this will break BMC
3470          * redirection as it did with e1000. Newer features require
3471          * that the HW strips the CRC.
3472          */
3473         rctl |= E1000_RCTL_SECRC;
3474
3475         /* disable store bad packets and clear size bits. */
3476         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3477
3478         /* enable LPE to prevent packets larger than max_frame_size */
3479         rctl |= E1000_RCTL_LPE;
3480
3481         /* disable queue 0 to prevent tail write w/o re-config */
3482         wr32(E1000_RXDCTL(0), 0);
3483
3484         /* Attention!!!  For SR-IOV PF driver operations you must enable
3485          * queue drop for all VF and PF queues to prevent head of line blocking
3486          * if an un-trusted VF does not provide descriptors to hardware.
3487          */
3488         if (adapter->vfs_allocated_count) {
3489                 /* set all queue drop enable bits */
3490                 wr32(E1000_QDE, ALL_QUEUES);
3491         }
3492
3493         /* This is useful for sniffing bad packets. */
3494         if (adapter->netdev->features & NETIF_F_RXALL) {
3495                 /* UPE and MPE will be handled by normal PROMISC logic
3496                  * in e1000e_set_rx_mode
3497                  */
3498                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3499                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3500                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3501
3502                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3503                           E1000_RCTL_DPF | /* Allow filtered pause */
3504                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3505                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3506                  * and that breaks VLANs.
3507                  */
3508         }
3509
3510         wr32(E1000_RCTL, rctl);
3511 }
3512
3513 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3514                                    int vfn)
3515 {
3516         struct e1000_hw *hw = &adapter->hw;
3517         u32 vmolr;
3518
3519         /* if it isn't the PF check to see if VFs are enabled and
3520          * increase the size to support vlan tags
3521          */
3522         if (vfn < adapter->vfs_allocated_count &&
3523             adapter->vf_data[vfn].vlans_enabled)
3524                 size += VLAN_TAG_SIZE;
3525
3526         vmolr = rd32(E1000_VMOLR(vfn));
3527         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3528         vmolr |= size | E1000_VMOLR_LPE;
3529         wr32(E1000_VMOLR(vfn), vmolr);
3530
3531         return 0;
3532 }
3533
3534 /**
3535  *  igb_rlpml_set - set maximum receive packet size
3536  *  @adapter: board private structure
3537  *
3538  *  Configure maximum receivable packet size.
3539  **/
3540 static void igb_rlpml_set(struct igb_adapter *adapter)
3541 {
3542         u32 max_frame_size = adapter->max_frame_size;
3543         struct e1000_hw *hw = &adapter->hw;
3544         u16 pf_id = adapter->vfs_allocated_count;
3545
3546         if (pf_id) {
3547                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3548                 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3549                  * to our max jumbo frame size, in case we need to enable
3550                  * jumbo frames on one of the rings later.
3551                  * This will not pass over-length frames into the default
3552                  * queue because it's gated by the VMOLR.RLPML.
3553                  */
3554                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3555         }
3556
3557         wr32(E1000_RLPML, max_frame_size);
3558 }
3559
3560 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3561                                  int vfn, bool aupe)
3562 {
3563         struct e1000_hw *hw = &adapter->hw;
3564         u32 vmolr;
3565
3566         /* This register exists only on 82576 and newer so if we are older then
3567          * we should exit and do nothing
3568          */
3569         if (hw->mac.type < e1000_82576)
3570                 return;
3571
3572         vmolr = rd32(E1000_VMOLR(vfn));
3573         vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3574         if (hw->mac.type == e1000_i350) {
3575                 u32 dvmolr;
3576
3577                 dvmolr = rd32(E1000_DVMOLR(vfn));
3578                 dvmolr |= E1000_DVMOLR_STRVLAN;
3579                 wr32(E1000_DVMOLR(vfn), dvmolr);
3580         }
3581         if (aupe)
3582                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3583         else
3584                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3585
3586         /* clear all bits that might not be set */
3587         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3588
3589         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3590                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3591         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3592          * multicast packets
3593          */
3594         if (vfn <= adapter->vfs_allocated_count)
3595                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3596
3597         wr32(E1000_VMOLR(vfn), vmolr);
3598 }
3599
3600 /**
3601  *  igb_configure_rx_ring - Configure a receive ring after Reset
3602  *  @adapter: board private structure
3603  *  @ring: receive ring to be configured
3604  *
3605  *  Configure the Rx unit of the MAC after a reset.
3606  **/
3607 void igb_configure_rx_ring(struct igb_adapter *adapter,
3608                            struct igb_ring *ring)
3609 {
3610         struct e1000_hw *hw = &adapter->hw;
3611         u64 rdba = ring->dma;
3612         int reg_idx = ring->reg_idx;
3613         u32 srrctl = 0, rxdctl = 0;
3614
3615         /* disable the queue */
3616         wr32(E1000_RXDCTL(reg_idx), 0);
3617
3618         /* Set DMA base address registers */
3619         wr32(E1000_RDBAL(reg_idx),
3620              rdba & 0x00000000ffffffffULL);
3621         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3622         wr32(E1000_RDLEN(reg_idx),
3623              ring->count * sizeof(union e1000_adv_rx_desc));
3624
3625         /* initialize head and tail */
3626         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3627         wr32(E1000_RDH(reg_idx), 0);
3628         writel(0, ring->tail);
3629
3630         /* set descriptor configuration */
3631         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3632         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3633         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3634         if (hw->mac.type >= e1000_82580)
3635                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3636         /* Only set Drop Enable if we are supporting multiple queues */
3637         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3638                 srrctl |= E1000_SRRCTL_DROP_EN;
3639
3640         wr32(E1000_SRRCTL(reg_idx), srrctl);
3641
3642         /* set filtering for VMDQ pools */
3643         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3644
3645         rxdctl |= IGB_RX_PTHRESH;
3646         rxdctl |= IGB_RX_HTHRESH << 8;
3647         rxdctl |= IGB_RX_WTHRESH << 16;
3648
3649         /* enable receive descriptor fetching */
3650         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3651         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3652 }
3653
3654 /**
3655  *  igb_configure_rx - Configure receive Unit after Reset
3656  *  @adapter: board private structure
3657  *
3658  *  Configure the Rx unit of the MAC after a reset.
3659  **/
3660 static void igb_configure_rx(struct igb_adapter *adapter)
3661 {
3662         int i;
3663
3664         /* set UTA to appropriate mode */
3665         igb_set_uta(adapter);
3666
3667         /* set the correct pool for the PF default MAC address in entry 0 */
3668         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3669                          adapter->vfs_allocated_count);
3670
3671         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3672          * the Base and Length of the Rx Descriptor Ring
3673          */
3674         for (i = 0; i < adapter->num_rx_queues; i++)
3675                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3676 }
3677
3678 /**
3679  *  igb_free_tx_resources - Free Tx Resources per Queue
3680  *  @tx_ring: Tx descriptor ring for a specific queue
3681  *
3682  *  Free all transmit software resources
3683  **/
3684 void igb_free_tx_resources(struct igb_ring *tx_ring)
3685 {
3686         igb_clean_tx_ring(tx_ring);
3687
3688         vfree(tx_ring->tx_buffer_info);
3689         tx_ring->tx_buffer_info = NULL;
3690
3691         /* if not set, then don't free */
3692         if (!tx_ring->desc)
3693                 return;
3694
3695         dma_free_coherent(tx_ring->dev, tx_ring->size,
3696                           tx_ring->desc, tx_ring->dma);
3697
3698         tx_ring->desc = NULL;
3699 }
3700
3701 /**
3702  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3703  *  @adapter: board private structure
3704  *
3705  *  Free all transmit software resources
3706  **/
3707 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3708 {
3709         int i;
3710
3711         for (i = 0; i < adapter->num_tx_queues; i++)
3712                 igb_free_tx_resources(adapter->tx_ring[i]);
3713 }
3714
3715 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3716                                     struct igb_tx_buffer *tx_buffer)
3717 {
3718         if (tx_buffer->skb) {
3719                 dev_kfree_skb_any(tx_buffer->skb);
3720                 if (dma_unmap_len(tx_buffer, len))
3721                         dma_unmap_single(ring->dev,
3722                                          dma_unmap_addr(tx_buffer, dma),
3723                                          dma_unmap_len(tx_buffer, len),
3724                                          DMA_TO_DEVICE);
3725         } else if (dma_unmap_len(tx_buffer, len)) {
3726                 dma_unmap_page(ring->dev,
3727                                dma_unmap_addr(tx_buffer, dma),
3728                                dma_unmap_len(tx_buffer, len),
3729                                DMA_TO_DEVICE);
3730         }
3731         tx_buffer->next_to_watch = NULL;
3732         tx_buffer->skb = NULL;
3733         dma_unmap_len_set(tx_buffer, len, 0);
3734         /* buffer_info must be completely set up in the transmit path */
3735 }
3736
3737 /**
3738  *  igb_clean_tx_ring - Free Tx Buffers
3739  *  @tx_ring: ring to be cleaned
3740  **/
3741 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3742 {
3743         struct igb_tx_buffer *buffer_info;
3744         unsigned long size;
3745         u16 i;
3746
3747         if (!tx_ring->tx_buffer_info)
3748                 return;
3749         /* Free all the Tx ring sk_buffs */
3750
3751         for (i = 0; i < tx_ring->count; i++) {
3752                 buffer_info = &tx_ring->tx_buffer_info[i];
3753                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3754         }
3755
3756         netdev_tx_reset_queue(txring_txq(tx_ring));
3757
3758         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3759         memset(tx_ring->tx_buffer_info, 0, size);
3760
3761         /* Zero out the descriptor ring */
3762         memset(tx_ring->desc, 0, tx_ring->size);
3763
3764         tx_ring->next_to_use = 0;
3765         tx_ring->next_to_clean = 0;
3766 }
3767
3768 /**
3769  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3770  *  @adapter: board private structure
3771  **/
3772 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3773 {
3774         int i;
3775
3776         for (i = 0; i < adapter->num_tx_queues; i++)
3777                 igb_clean_tx_ring(adapter->tx_ring[i]);
3778 }
3779
3780 /**
3781  *  igb_free_rx_resources - Free Rx Resources
3782  *  @rx_ring: ring to clean the resources from
3783  *
3784  *  Free all receive software resources
3785  **/
3786 void igb_free_rx_resources(struct igb_ring *rx_ring)
3787 {
3788         igb_clean_rx_ring(rx_ring);
3789
3790         vfree(rx_ring->rx_buffer_info);
3791         rx_ring->rx_buffer_info = NULL;
3792
3793         /* if not set, then don't free */
3794         if (!rx_ring->desc)
3795                 return;
3796
3797         dma_free_coherent(rx_ring->dev, rx_ring->size,
3798                           rx_ring->desc, rx_ring->dma);
3799
3800         rx_ring->desc = NULL;
3801 }
3802
3803 /**
3804  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3805  *  @adapter: board private structure
3806  *
3807  *  Free all receive software resources
3808  **/
3809 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3810 {
3811         int i;
3812
3813         for (i = 0; i < adapter->num_rx_queues; i++)
3814                 igb_free_rx_resources(adapter->rx_ring[i]);
3815 }
3816
3817 /**
3818  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3819  *  @rx_ring: ring to free buffers from
3820  **/
3821 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3822 {
3823         unsigned long size;
3824         u16 i;
3825
3826         if (rx_ring->skb)
3827                 dev_kfree_skb(rx_ring->skb);
3828         rx_ring->skb = NULL;
3829
3830         if (!rx_ring->rx_buffer_info)
3831                 return;
3832
3833         /* Free all the Rx ring sk_buffs */
3834         for (i = 0; i < rx_ring->count; i++) {
3835                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3836
3837                 if (!buffer_info->page)
3838                         continue;
3839
3840                 dma_unmap_page(rx_ring->dev,
3841                                buffer_info->dma,
3842                                PAGE_SIZE,
3843                                DMA_FROM_DEVICE);
3844                 __free_page(buffer_info->page);
3845
3846                 buffer_info->page = NULL;
3847         }
3848
3849         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3850         memset(rx_ring->rx_buffer_info, 0, size);
3851
3852         /* Zero out the descriptor ring */
3853         memset(rx_ring->desc, 0, rx_ring->size);
3854
3855         rx_ring->next_to_alloc = 0;
3856         rx_ring->next_to_clean = 0;
3857         rx_ring->next_to_use = 0;
3858 }
3859
3860 /**
3861  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3862  *  @adapter: board private structure
3863  **/
3864 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3865 {
3866         int i;
3867
3868         for (i = 0; i < adapter->num_rx_queues; i++)
3869                 igb_clean_rx_ring(adapter->rx_ring[i]);
3870 }
3871
3872 /**
3873  *  igb_set_mac - Change the Ethernet Address of the NIC
3874  *  @netdev: network interface device structure
3875  *  @p: pointer to an address structure
3876  *
3877  *  Returns 0 on success, negative on failure
3878  **/
3879 static int igb_set_mac(struct net_device *netdev, void *p)
3880 {
3881         struct igb_adapter *adapter = netdev_priv(netdev);
3882         struct e1000_hw *hw = &adapter->hw;
3883         struct sockaddr *addr = p;
3884
3885         if (!is_valid_ether_addr(addr->sa_data))
3886                 return -EADDRNOTAVAIL;
3887
3888         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3889         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3890
3891         /* set the correct pool for the new PF MAC address in entry 0 */
3892         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3893                          adapter->vfs_allocated_count);
3894
3895         return 0;
3896 }
3897
3898 /**
3899  *  igb_write_mc_addr_list - write multicast addresses to MTA
3900  *  @netdev: network interface device structure
3901  *
3902  *  Writes multicast address list to the MTA hash table.
3903  *  Returns: -ENOMEM on failure
3904  *           0 on no addresses written
3905  *           X on writing X addresses to MTA
3906  **/
3907 static int igb_write_mc_addr_list(struct net_device *netdev)
3908 {
3909         struct igb_adapter *adapter = netdev_priv(netdev);
3910         struct e1000_hw *hw = &adapter->hw;
3911         struct netdev_hw_addr *ha;
3912         u8  *mta_list;
3913         int i;
3914
3915         if (netdev_mc_empty(netdev)) {
3916                 /* nothing to program, so clear mc list */
3917                 igb_update_mc_addr_list(hw, NULL, 0);
3918                 igb_restore_vf_multicasts(adapter);
3919                 return 0;
3920         }
3921
3922         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3923         if (!mta_list)
3924                 return -ENOMEM;
3925
3926         /* The shared function expects a packed array of only addresses. */
3927         i = 0;
3928         netdev_for_each_mc_addr(ha, netdev)
3929                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3930
3931         igb_update_mc_addr_list(hw, mta_list, i);
3932         kfree(mta_list);
3933
3934         return netdev_mc_count(netdev);
3935 }
3936
3937 /**
3938  *  igb_write_uc_addr_list - write unicast addresses to RAR table
3939  *  @netdev: network interface device structure
3940  *
3941  *  Writes unicast address list to the RAR table.
3942  *  Returns: -ENOMEM on failure/insufficient address space
3943  *           0 on no addresses written
3944  *           X on writing X addresses to the RAR table
3945  **/
3946 static int igb_write_uc_addr_list(struct net_device *netdev)
3947 {
3948         struct igb_adapter *adapter = netdev_priv(netdev);
3949         struct e1000_hw *hw = &adapter->hw;
3950         unsigned int vfn = adapter->vfs_allocated_count;
3951         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3952         int count = 0;
3953
3954         /* return ENOMEM indicating insufficient memory for addresses */
3955         if (netdev_uc_count(netdev) > rar_entries)
3956                 return -ENOMEM;
3957
3958         if (!netdev_uc_empty(netdev) && rar_entries) {
3959                 struct netdev_hw_addr *ha;
3960
3961                 netdev_for_each_uc_addr(ha, netdev) {
3962                         if (!rar_entries)
3963                                 break;
3964                         igb_rar_set_qsel(adapter, ha->addr,
3965                                          rar_entries--,
3966                                          vfn);
3967                         count++;
3968                 }
3969         }
3970         /* write the addresses in reverse order to avoid write combining */
3971         for (; rar_entries > 0 ; rar_entries--) {
3972                 wr32(E1000_RAH(rar_entries), 0);
3973                 wr32(E1000_RAL(rar_entries), 0);
3974         }
3975         wrfl();
3976
3977         return count;
3978 }
3979
3980 /**
3981  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3982  *  @netdev: network interface device structure
3983  *
3984  *  The set_rx_mode entry point is called whenever the unicast or multicast
3985  *  address lists or the network interface flags are updated.  This routine is
3986  *  responsible for configuring the hardware for proper unicast, multicast,
3987  *  promiscuous mode, and all-multi behavior.
3988  **/
3989 static void igb_set_rx_mode(struct net_device *netdev)
3990 {
3991         struct igb_adapter *adapter = netdev_priv(netdev);
3992         struct e1000_hw *hw = &adapter->hw;
3993         unsigned int vfn = adapter->vfs_allocated_count;
3994         u32 rctl, vmolr = 0;
3995         int count;
3996
3997         /* Check for Promiscuous and All Multicast modes */
3998         rctl = rd32(E1000_RCTL);
3999
4000         /* clear the effected bits */
4001         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4002
4003         if (netdev->flags & IFF_PROMISC) {
4004                 /* retain VLAN HW filtering if in VT mode */
4005                 if (adapter->vfs_allocated_count)
4006                         rctl |= E1000_RCTL_VFE;
4007                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4008                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4009         } else {
4010                 if (netdev->flags & IFF_ALLMULTI) {
4011                         rctl |= E1000_RCTL_MPE;
4012                         vmolr |= E1000_VMOLR_MPME;
4013                 } else {
4014                         /* Write addresses to the MTA, if the attempt fails
4015                          * then we should just turn on promiscuous mode so
4016                          * that we can at least receive multicast traffic
4017                          */
4018                         count = igb_write_mc_addr_list(netdev);
4019                         if (count < 0) {
4020                                 rctl |= E1000_RCTL_MPE;
4021                                 vmolr |= E1000_VMOLR_MPME;
4022                         } else if (count) {
4023                                 vmolr |= E1000_VMOLR_ROMPE;
4024                         }
4025                 }
4026                 /* Write addresses to available RAR registers, if there is not
4027                  * sufficient space to store all the addresses then enable
4028                  * unicast promiscuous mode
4029                  */
4030                 count = igb_write_uc_addr_list(netdev);
4031                 if (count < 0) {
4032                         rctl |= E1000_RCTL_UPE;
4033                         vmolr |= E1000_VMOLR_ROPE;
4034                 }
4035                 rctl |= E1000_RCTL_VFE;
4036         }
4037         wr32(E1000_RCTL, rctl);
4038
4039         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4040          * the VMOLR to enable the appropriate modes.  Without this workaround
4041          * we will have issues with VLAN tag stripping not being done for frames
4042          * that are only arriving because we are the default pool
4043          */
4044         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4045                 return;
4046
4047         vmolr |= rd32(E1000_VMOLR(vfn)) &
4048                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4049         wr32(E1000_VMOLR(vfn), vmolr);
4050         igb_restore_vf_multicasts(adapter);
4051 }
4052
4053 static void igb_check_wvbr(struct igb_adapter *adapter)
4054 {
4055         struct e1000_hw *hw = &adapter->hw;
4056         u32 wvbr = 0;
4057
4058         switch (hw->mac.type) {
4059         case e1000_82576:
4060         case e1000_i350:
4061                 if (!(wvbr = rd32(E1000_WVBR)))
4062                         return;
4063                 break;
4064         default:
4065                 break;
4066         }
4067
4068         adapter->wvbr |= wvbr;
4069 }
4070
4071 #define IGB_STAGGERED_QUEUE_OFFSET 8
4072
4073 static void igb_spoof_check(struct igb_adapter *adapter)
4074 {
4075         int j;
4076
4077         if (!adapter->wvbr)
4078                 return;
4079
4080         for(j = 0; j < adapter->vfs_allocated_count; j++) {
4081                 if (adapter->wvbr & (1 << j) ||
4082                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4083                         dev_warn(&adapter->pdev->dev,
4084                                 "Spoof event(s) detected on VF %d\n", j);
4085                         adapter->wvbr &=
4086                                 ~((1 << j) |
4087                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4088                 }
4089         }
4090 }
4091
4092 /* Need to wait a few seconds after link up to get diagnostic information from
4093  * the phy
4094  */
4095 static void igb_update_phy_info(unsigned long data)
4096 {
4097         struct igb_adapter *adapter = (struct igb_adapter *) data;
4098         igb_get_phy_info(&adapter->hw);
4099 }
4100
4101 /**
4102  *  igb_has_link - check shared code for link and determine up/down
4103  *  @adapter: pointer to driver private info
4104  **/
4105 bool igb_has_link(struct igb_adapter *adapter)
4106 {
4107         struct e1000_hw *hw = &adapter->hw;
4108         bool link_active = false;
4109
4110         /* get_link_status is set on LSC (link status) interrupt or
4111          * rx sequence error interrupt.  get_link_status will stay
4112          * false until the e1000_check_for_link establishes link
4113          * for copper adapters ONLY
4114          */
4115         switch (hw->phy.media_type) {
4116         case e1000_media_type_copper:
4117                 if (!hw->mac.get_link_status)
4118                         return true;
4119         case e1000_media_type_internal_serdes:
4120                 hw->mac.ops.check_for_link(hw);
4121                 link_active = !hw->mac.get_link_status;
4122                 break;
4123         default:
4124         case e1000_media_type_unknown:
4125                 break;
4126         }
4127
4128         if (((hw->mac.type == e1000_i210) ||
4129              (hw->mac.type == e1000_i211)) &&
4130              (hw->phy.id == I210_I_PHY_ID)) {
4131                 if (!netif_carrier_ok(adapter->netdev)) {
4132                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4133                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4134                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4135                         adapter->link_check_timeout = jiffies;
4136                 }
4137         }
4138
4139         return link_active;
4140 }
4141
4142 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4143 {
4144         bool ret = false;
4145         u32 ctrl_ext, thstat;
4146
4147         /* check for thermal sensor event on i350 copper only */
4148         if (hw->mac.type == e1000_i350) {
4149                 thstat = rd32(E1000_THSTAT);
4150                 ctrl_ext = rd32(E1000_CTRL_EXT);
4151
4152                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4153                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4154                         ret = !!(thstat & event);
4155         }
4156
4157         return ret;
4158 }
4159
4160 /**
4161  *  igb_watchdog - Timer Call-back
4162  *  @data: pointer to adapter cast into an unsigned long
4163  **/
4164 static void igb_watchdog(unsigned long data)
4165 {
4166         struct igb_adapter *adapter = (struct igb_adapter *)data;
4167         /* Do the rest outside of interrupt context */
4168         schedule_work(&adapter->watchdog_task);
4169 }
4170
4171 static void igb_watchdog_task(struct work_struct *work)
4172 {
4173         struct igb_adapter *adapter = container_of(work,
4174                                                    struct igb_adapter,
4175                                                    watchdog_task);
4176         struct e1000_hw *hw = &adapter->hw;
4177         struct e1000_phy_info *phy = &hw->phy;
4178         struct net_device *netdev = adapter->netdev;
4179         u32 link;
4180         int i;
4181         u32 connsw;
4182
4183         link = igb_has_link(adapter);
4184
4185         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4186                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4187                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4188                 else
4189                         link = false;
4190         }
4191
4192         /* Force link down if we have fiber to swap to */
4193         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4194                 if (hw->phy.media_type == e1000_media_type_copper) {
4195                         connsw = rd32(E1000_CONNSW);
4196                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4197                                 link = 0;
4198                 }
4199         }
4200         if (link) {
4201                 /* Perform a reset if the media type changed. */
4202                 if (hw->dev_spec._82575.media_changed) {
4203                         hw->dev_spec._82575.media_changed = false;
4204                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4205                         igb_reset(adapter);
4206                 }
4207                 /* Cancel scheduled suspend requests. */
4208                 pm_runtime_resume(netdev->dev.parent);
4209
4210                 if (!netif_carrier_ok(netdev)) {
4211                         u32 ctrl;
4212                         hw->mac.ops.get_speed_and_duplex(hw,
4213                                                          &adapter->link_speed,
4214                                                          &adapter->link_duplex);
4215
4216                         ctrl = rd32(E1000_CTRL);
4217                         /* Links status message must follow this format */
4218                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
4219                                "Duplex, Flow Control: %s\n",
4220                                netdev->name,
4221                                adapter->link_speed,
4222                                adapter->link_duplex == FULL_DUPLEX ?
4223                                "Full" : "Half",
4224                                (ctrl & E1000_CTRL_TFCE) &&
4225                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4226                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4227                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4228
4229                         /* disable EEE if enabled */
4230                         if ((adapter->flags & IGB_FLAG_EEE) &&
4231                                 (adapter->link_duplex == HALF_DUPLEX)) {
4232                                 dev_info(&adapter->pdev->dev,
4233                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4234                                 adapter->hw.dev_spec._82575.eee_disable = true;
4235                                 adapter->flags &= ~IGB_FLAG_EEE;
4236                         }
4237
4238                         /* check if SmartSpeed worked */
4239                         igb_check_downshift(hw);
4240                         if (phy->speed_downgraded)
4241                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4242
4243                         /* check for thermal sensor event */
4244                         if (igb_thermal_sensor_event(hw,
4245                             E1000_THSTAT_LINK_THROTTLE)) {
4246                                 netdev_info(netdev, "The network adapter link "
4247                                             "speed was downshifted because it "
4248                                             "overheated\n");
4249                         }
4250
4251                         /* adjust timeout factor according to speed/duplex */
4252                         adapter->tx_timeout_factor = 1;
4253                         switch (adapter->link_speed) {
4254                         case SPEED_10:
4255                                 adapter->tx_timeout_factor = 14;
4256                                 break;
4257                         case SPEED_100:
4258                                 /* maybe add some timeout factor ? */
4259                                 break;
4260                         }
4261
4262                         netif_carrier_on(netdev);
4263
4264                         igb_ping_all_vfs(adapter);
4265                         igb_check_vf_rate_limit(adapter);
4266
4267                         /* link state has changed, schedule phy info update */
4268                         if (!test_bit(__IGB_DOWN, &adapter->state))
4269                                 mod_timer(&adapter->phy_info_timer,
4270                                           round_jiffies(jiffies + 2 * HZ));
4271                 }
4272         } else {
4273                 if (netif_carrier_ok(netdev)) {
4274                         adapter->link_speed = 0;
4275                         adapter->link_duplex = 0;
4276
4277                         /* check for thermal sensor event */
4278                         if (igb_thermal_sensor_event(hw,
4279                             E1000_THSTAT_PWR_DOWN)) {
4280                                 netdev_err(netdev, "The network adapter was "
4281                                            "stopped because it overheated\n");
4282                         }
4283
4284                         /* Links status message must follow this format */
4285                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4286                                netdev->name);
4287                         netif_carrier_off(netdev);
4288
4289                         igb_ping_all_vfs(adapter);
4290
4291                         /* link state has changed, schedule phy info update */
4292                         if (!test_bit(__IGB_DOWN, &adapter->state))
4293                                 mod_timer(&adapter->phy_info_timer,
4294                                           round_jiffies(jiffies + 2 * HZ));
4295
4296                         /* link is down, time to check for alternate media */
4297                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4298                                 igb_check_swap_media(adapter);
4299                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4300                                         schedule_work(&adapter->reset_task);
4301                                         /* return immediately */
4302                                         return;
4303                                 }
4304                         }
4305                         pm_schedule_suspend(netdev->dev.parent,
4306                                             MSEC_PER_SEC * 5);
4307
4308                 /* also check for alternate media here */
4309                 } else if (!netif_carrier_ok(netdev) &&
4310                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4311                         igb_check_swap_media(adapter);
4312                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4313                                 schedule_work(&adapter->reset_task);
4314                                 /* return immediately */
4315                                 return;
4316                         }
4317                 }
4318         }
4319
4320         spin_lock(&adapter->stats64_lock);
4321         igb_update_stats(adapter, &adapter->stats64);
4322         spin_unlock(&adapter->stats64_lock);
4323
4324         for (i = 0; i < adapter->num_tx_queues; i++) {
4325                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4326                 if (!netif_carrier_ok(netdev)) {
4327                         /* We've lost link, so the controller stops DMA,
4328                          * but we've got queued Tx work that's never going
4329                          * to get done, so reset controller to flush Tx.
4330                          * (Do the reset outside of interrupt context).
4331                          */
4332                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4333                                 adapter->tx_timeout_count++;
4334                                 schedule_work(&adapter->reset_task);
4335                                 /* return immediately since reset is imminent */
4336                                 return;
4337                         }
4338                 }
4339
4340                 /* Force detection of hung controller every watchdog period */
4341                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4342         }
4343
4344         /* Cause software interrupt to ensure Rx ring is cleaned */
4345         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4346                 u32 eics = 0;
4347                 for (i = 0; i < adapter->num_q_vectors; i++)
4348                         eics |= adapter->q_vector[i]->eims_value;
4349                 wr32(E1000_EICS, eics);
4350         } else {
4351                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4352         }
4353
4354         igb_spoof_check(adapter);
4355         igb_ptp_rx_hang(adapter);
4356
4357         /* Reset the timer */
4358         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4359                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4360                         mod_timer(&adapter->watchdog_timer,
4361                                   round_jiffies(jiffies +  HZ));
4362                 else
4363                         mod_timer(&adapter->watchdog_timer,
4364                                   round_jiffies(jiffies + 2 * HZ));
4365         }
4366 }
4367
4368 enum latency_range {
4369         lowest_latency = 0,
4370         low_latency = 1,
4371         bulk_latency = 2,
4372         latency_invalid = 255
4373 };
4374
4375 /**
4376  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4377  *  @q_vector: pointer to q_vector
4378  *
4379  *  Stores a new ITR value based on strictly on packet size.  This
4380  *  algorithm is less sophisticated than that used in igb_update_itr,
4381  *  due to the difficulty of synchronizing statistics across multiple
4382  *  receive rings.  The divisors and thresholds used by this function
4383  *  were determined based on theoretical maximum wire speed and testing
4384  *  data, in order to minimize response time while increasing bulk
4385  *  throughput.
4386  *  This functionality is controlled by ethtool's coalescing settings.
4387  *  NOTE:  This function is called only when operating in a multiqueue
4388  *         receive environment.
4389  **/
4390 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4391 {
4392         int new_val = q_vector->itr_val;
4393         int avg_wire_size = 0;
4394         struct igb_adapter *adapter = q_vector->adapter;
4395         unsigned int packets;
4396
4397         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4398          * ints/sec - ITR timer value of 120 ticks.
4399          */
4400         if (adapter->link_speed != SPEED_1000) {
4401                 new_val = IGB_4K_ITR;
4402                 goto set_itr_val;
4403         }
4404
4405         packets = q_vector->rx.total_packets;
4406         if (packets)
4407                 avg_wire_size = q_vector->rx.total_bytes / packets;
4408
4409         packets = q_vector->tx.total_packets;
4410         if (packets)
4411                 avg_wire_size = max_t(u32, avg_wire_size,
4412                                       q_vector->tx.total_bytes / packets);
4413
4414         /* if avg_wire_size isn't set no work was done */
4415         if (!avg_wire_size)
4416                 goto clear_counts;
4417
4418         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4419         avg_wire_size += 24;
4420
4421         /* Don't starve jumbo frames */
4422         avg_wire_size = min(avg_wire_size, 3000);
4423
4424         /* Give a little boost to mid-size frames */
4425         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4426                 new_val = avg_wire_size / 3;
4427         else
4428                 new_val = avg_wire_size / 2;
4429
4430         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4431         if (new_val < IGB_20K_ITR &&
4432             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4433              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4434                 new_val = IGB_20K_ITR;
4435
4436 set_itr_val:
4437         if (new_val != q_vector->itr_val) {
4438                 q_vector->itr_val = new_val;
4439                 q_vector->set_itr = 1;
4440         }
4441 clear_counts:
4442         q_vector->rx.total_bytes = 0;
4443         q_vector->rx.total_packets = 0;
4444         q_vector->tx.total_bytes = 0;
4445         q_vector->tx.total_packets = 0;
4446 }
4447
4448 /**
4449  *  igb_update_itr - update the dynamic ITR value based on statistics
4450  *  @q_vector: pointer to q_vector
4451  *  @ring_container: ring info to update the itr for
4452  *
4453  *  Stores a new ITR value based on packets and byte
4454  *  counts during the last interrupt.  The advantage of per interrupt
4455  *  computation is faster updates and more accurate ITR for the current
4456  *  traffic pattern.  Constants in this function were computed
4457  *  based on theoretical maximum wire speed and thresholds were set based
4458  *  on testing data as well as attempting to minimize response time
4459  *  while increasing bulk throughput.
4460  *  This functionality is controlled by ethtool's coalescing settings.
4461  *  NOTE:  These calculations are only valid when operating in a single-
4462  *         queue environment.
4463  **/
4464 static void igb_update_itr(struct igb_q_vector *q_vector,
4465                            struct igb_ring_container *ring_container)
4466 {
4467         unsigned int packets = ring_container->total_packets;
4468         unsigned int bytes = ring_container->total_bytes;
4469         u8 itrval = ring_container->itr;
4470
4471         /* no packets, exit with status unchanged */
4472         if (packets == 0)
4473                 return;
4474
4475         switch (itrval) {
4476         case lowest_latency:
4477                 /* handle TSO and jumbo frames */
4478                 if (bytes/packets > 8000)
4479                         itrval = bulk_latency;
4480                 else if ((packets < 5) && (bytes > 512))
4481                         itrval = low_latency;
4482                 break;
4483         case low_latency:  /* 50 usec aka 20000 ints/s */
4484                 if (bytes > 10000) {
4485                         /* this if handles the TSO accounting */
4486                         if (bytes/packets > 8000) {
4487                                 itrval = bulk_latency;
4488                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4489                                 itrval = bulk_latency;
4490                         } else if ((packets > 35)) {
4491                                 itrval = lowest_latency;
4492                         }
4493                 } else if (bytes/packets > 2000) {
4494                         itrval = bulk_latency;
4495                 } else if (packets <= 2 && bytes < 512) {
4496                         itrval = lowest_latency;
4497                 }
4498                 break;
4499         case bulk_latency: /* 250 usec aka 4000 ints/s */
4500                 if (bytes > 25000) {
4501                         if (packets > 35)
4502                                 itrval = low_latency;
4503                 } else if (bytes < 1500) {
4504                         itrval = low_latency;
4505                 }
4506                 break;
4507         }
4508
4509         /* clear work counters since we have the values we need */
4510         ring_container->total_bytes = 0;
4511         ring_container->total_packets = 0;
4512
4513         /* write updated itr to ring container */
4514         ring_container->itr = itrval;
4515 }
4516
4517 static void igb_set_itr(struct igb_q_vector *q_vector)
4518 {
4519         struct igb_adapter *adapter = q_vector->adapter;
4520         u32 new_itr = q_vector->itr_val;
4521         u8 current_itr = 0;
4522
4523         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4524         if (adapter->link_speed != SPEED_1000) {
4525                 current_itr = 0;
4526                 new_itr = IGB_4K_ITR;
4527                 goto set_itr_now;
4528         }
4529
4530         igb_update_itr(q_vector, &q_vector->tx);
4531         igb_update_itr(q_vector, &q_vector->rx);
4532
4533         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4534
4535         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4536         if (current_itr == lowest_latency &&
4537             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4538              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4539                 current_itr = low_latency;
4540
4541         switch (current_itr) {
4542         /* counts and packets in update_itr are dependent on these numbers */
4543         case lowest_latency:
4544                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4545                 break;
4546         case low_latency:
4547                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4548                 break;
4549         case bulk_latency:
4550                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4551                 break;
4552         default:
4553                 break;
4554         }
4555
4556 set_itr_now:
4557         if (new_itr != q_vector->itr_val) {
4558                 /* this attempts to bias the interrupt rate towards Bulk
4559                  * by adding intermediate steps when interrupt rate is
4560                  * increasing
4561                  */
4562                 new_itr = new_itr > q_vector->itr_val ?
4563                           max((new_itr * q_vector->itr_val) /
4564                           (new_itr + (q_vector->itr_val >> 2)),
4565                           new_itr) : new_itr;
4566                 /* Don't write the value here; it resets the adapter's
4567                  * internal timer, and causes us to delay far longer than
4568                  * we should between interrupts.  Instead, we write the ITR
4569                  * value at the beginning of the next interrupt so the timing
4570                  * ends up being correct.
4571                  */
4572                 q_vector->itr_val = new_itr;
4573                 q_vector->set_itr = 1;
4574         }
4575 }
4576
4577 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4578                             u32 type_tucmd, u32 mss_l4len_idx)
4579 {
4580         struct e1000_adv_tx_context_desc *context_desc;
4581         u16 i = tx_ring->next_to_use;
4582
4583         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4584
4585         i++;
4586         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4587
4588         /* set bits to identify this as an advanced context descriptor */
4589         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4590
4591         /* For 82575, context index must be unique per ring. */
4592         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4593                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4594
4595         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4596         context_desc->seqnum_seed       = 0;
4597         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4598         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4599 }
4600
4601 static int igb_tso(struct igb_ring *tx_ring,
4602                    struct igb_tx_buffer *first,
4603                    u8 *hdr_len)
4604 {
4605         struct sk_buff *skb = first->skb;
4606         u32 vlan_macip_lens, type_tucmd;
4607         u32 mss_l4len_idx, l4len;
4608         int err;
4609
4610         if (skb->ip_summed != CHECKSUM_PARTIAL)
4611                 return 0;
4612
4613         if (!skb_is_gso(skb))
4614                 return 0;
4615
4616         err = skb_cow_head(skb, 0);
4617         if (err < 0)
4618                 return err;
4619
4620         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4621         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4622
4623         if (first->protocol == htons(ETH_P_IP)) {
4624                 struct iphdr *iph = ip_hdr(skb);
4625                 iph->tot_len = 0;
4626                 iph->check = 0;
4627                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4628                                                          iph->daddr, 0,
4629                                                          IPPROTO_TCP,
4630                                                          0);
4631                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4632                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4633                                    IGB_TX_FLAGS_CSUM |
4634                                    IGB_TX_FLAGS_IPV4;
4635         } else if (skb_is_gso_v6(skb)) {
4636                 ipv6_hdr(skb)->payload_len = 0;
4637                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4638                                                        &ipv6_hdr(skb)->daddr,
4639                                                        0, IPPROTO_TCP, 0);
4640                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4641                                    IGB_TX_FLAGS_CSUM;
4642         }
4643
4644         /* compute header lengths */
4645         l4len = tcp_hdrlen(skb);
4646         *hdr_len = skb_transport_offset(skb) + l4len;
4647
4648         /* update gso size and bytecount with header size */
4649         first->gso_segs = skb_shinfo(skb)->gso_segs;
4650         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4651
4652         /* MSS L4LEN IDX */
4653         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4654         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4655
4656         /* VLAN MACLEN IPLEN */
4657         vlan_macip_lens = skb_network_header_len(skb);
4658         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4659         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4660
4661         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4662
4663         return 1;
4664 }
4665
4666 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4667 {
4668         struct sk_buff *skb = first->skb;
4669         u32 vlan_macip_lens = 0;
4670         u32 mss_l4len_idx = 0;
4671         u32 type_tucmd = 0;
4672
4673         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4674                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4675                         return;
4676         } else {
4677                 u8 l4_hdr = 0;
4678                 switch (first->protocol) {
4679                 case htons(ETH_P_IP):
4680                         vlan_macip_lens |= skb_network_header_len(skb);
4681                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4682                         l4_hdr = ip_hdr(skb)->protocol;
4683                         break;
4684                 case htons(ETH_P_IPV6):
4685                         vlan_macip_lens |= skb_network_header_len(skb);
4686                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4687                         break;
4688                 default:
4689                         if (unlikely(net_ratelimit())) {
4690                                 dev_warn(tx_ring->dev,
4691                                          "partial checksum but proto=%x!\n",
4692                                          first->protocol);
4693                         }
4694                         break;
4695                 }
4696
4697                 switch (l4_hdr) {
4698                 case IPPROTO_TCP:
4699                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4700                         mss_l4len_idx = tcp_hdrlen(skb) <<
4701                                         E1000_ADVTXD_L4LEN_SHIFT;
4702                         break;
4703                 case IPPROTO_SCTP:
4704                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4705                         mss_l4len_idx = sizeof(struct sctphdr) <<
4706                                         E1000_ADVTXD_L4LEN_SHIFT;
4707                         break;
4708                 case IPPROTO_UDP:
4709                         mss_l4len_idx = sizeof(struct udphdr) <<
4710                                         E1000_ADVTXD_L4LEN_SHIFT;
4711                         break;
4712                 default:
4713                         if (unlikely(net_ratelimit())) {
4714                                 dev_warn(tx_ring->dev,
4715                                          "partial checksum but l4 proto=%x!\n",
4716                                          l4_hdr);
4717                         }
4718                         break;
4719                 }
4720
4721                 /* update TX checksum flag */
4722                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4723         }
4724
4725         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4726         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4727
4728         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4729 }
4730
4731 #define IGB_SET_FLAG(_input, _flag, _result) \
4732         ((_flag <= _result) ? \
4733          ((u32)(_input & _flag) * (_result / _flag)) : \
4734          ((u32)(_input & _flag) / (_flag / _result)))
4735
4736 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4737 {
4738         /* set type for advanced descriptor with frame checksum insertion */
4739         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4740                        E1000_ADVTXD_DCMD_DEXT |
4741                        E1000_ADVTXD_DCMD_IFCS;
4742
4743         /* set HW vlan bit if vlan is present */
4744         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4745                                  (E1000_ADVTXD_DCMD_VLE));
4746
4747         /* set segmentation bits for TSO */
4748         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4749                                  (E1000_ADVTXD_DCMD_TSE));
4750
4751         /* set timestamp bit if present */
4752         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4753                                  (E1000_ADVTXD_MAC_TSTAMP));
4754
4755         /* insert frame checksum */
4756         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4757
4758         return cmd_type;
4759 }
4760
4761 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4762                                  union e1000_adv_tx_desc *tx_desc,
4763                                  u32 tx_flags, unsigned int paylen)
4764 {
4765         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4766
4767         /* 82575 requires a unique index per ring */
4768         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4769                 olinfo_status |= tx_ring->reg_idx << 4;
4770
4771         /* insert L4 checksum */
4772         olinfo_status |= IGB_SET_FLAG(tx_flags,
4773                                       IGB_TX_FLAGS_CSUM,
4774                                       (E1000_TXD_POPTS_TXSM << 8));
4775
4776         /* insert IPv4 checksum */
4777         olinfo_status |= IGB_SET_FLAG(tx_flags,
4778                                       IGB_TX_FLAGS_IPV4,
4779                                       (E1000_TXD_POPTS_IXSM << 8));
4780
4781         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4782 }
4783
4784 static void igb_tx_map(struct igb_ring *tx_ring,
4785                        struct igb_tx_buffer *first,
4786                        const u8 hdr_len)
4787 {
4788         struct sk_buff *skb = first->skb;
4789         struct igb_tx_buffer *tx_buffer;
4790         union e1000_adv_tx_desc *tx_desc;
4791         struct skb_frag_struct *frag;
4792         dma_addr_t dma;
4793         unsigned int data_len, size;
4794         u32 tx_flags = first->tx_flags;
4795         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4796         u16 i = tx_ring->next_to_use;
4797
4798         tx_desc = IGB_TX_DESC(tx_ring, i);
4799
4800         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4801
4802         size = skb_headlen(skb);
4803         data_len = skb->data_len;
4804
4805         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4806
4807         tx_buffer = first;
4808
4809         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4810                 if (dma_mapping_error(tx_ring->dev, dma))
4811                         goto dma_error;
4812
4813                 /* record length, and DMA address */
4814                 dma_unmap_len_set(tx_buffer, len, size);
4815                 dma_unmap_addr_set(tx_buffer, dma, dma);
4816
4817                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4818
4819                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4820                         tx_desc->read.cmd_type_len =
4821                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4822
4823                         i++;
4824                         tx_desc++;
4825                         if (i == tx_ring->count) {
4826                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4827                                 i = 0;
4828                         }
4829                         tx_desc->read.olinfo_status = 0;
4830
4831                         dma += IGB_MAX_DATA_PER_TXD;
4832                         size -= IGB_MAX_DATA_PER_TXD;
4833
4834                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4835                 }
4836
4837                 if (likely(!data_len))
4838                         break;
4839
4840                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4841
4842                 i++;
4843                 tx_desc++;
4844                 if (i == tx_ring->count) {
4845                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4846                         i = 0;
4847                 }
4848                 tx_desc->read.olinfo_status = 0;
4849
4850                 size = skb_frag_size(frag);
4851                 data_len -= size;
4852
4853                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4854                                        size, DMA_TO_DEVICE);
4855
4856                 tx_buffer = &tx_ring->tx_buffer_info[i];
4857         }
4858
4859         /* write last descriptor with RS and EOP bits */
4860         cmd_type |= size | IGB_TXD_DCMD;
4861         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4862
4863         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4864
4865         /* set the timestamp */
4866         first->time_stamp = jiffies;
4867
4868         /* Force memory writes to complete before letting h/w know there
4869          * are new descriptors to fetch.  (Only applicable for weak-ordered
4870          * memory model archs, such as IA-64).
4871          *
4872          * We also need this memory barrier to make certain all of the
4873          * status bits have been updated before next_to_watch is written.
4874          */
4875         wmb();
4876
4877         /* set next_to_watch value indicating a packet is present */
4878         first->next_to_watch = tx_desc;
4879
4880         i++;
4881         if (i == tx_ring->count)
4882                 i = 0;
4883
4884         tx_ring->next_to_use = i;
4885
4886         writel(i, tx_ring->tail);
4887
4888         /* we need this if more than one processor can write to our tail
4889          * at a time, it synchronizes IO on IA64/Altix systems
4890          */
4891         mmiowb();
4892
4893         return;
4894
4895 dma_error:
4896         dev_err(tx_ring->dev, "TX DMA map failed\n");
4897
4898         /* clear dma mappings for failed tx_buffer_info map */
4899         for (;;) {
4900                 tx_buffer = &tx_ring->tx_buffer_info[i];
4901                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4902                 if (tx_buffer == first)
4903                         break;
4904                 if (i == 0)
4905                         i = tx_ring->count;
4906                 i--;
4907         }
4908
4909         tx_ring->next_to_use = i;
4910 }
4911
4912 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4913 {
4914         struct net_device *netdev = tx_ring->netdev;
4915
4916         netif_stop_subqueue(netdev, tx_ring->queue_index);
4917
4918         /* Herbert's original patch had:
4919          *  smp_mb__after_netif_stop_queue();
4920          * but since that doesn't exist yet, just open code it.
4921          */
4922         smp_mb();
4923
4924         /* We need to check again in a case another CPU has just
4925          * made room available.
4926          */
4927         if (igb_desc_unused(tx_ring) < size)
4928                 return -EBUSY;
4929
4930         /* A reprieve! */
4931         netif_wake_subqueue(netdev, tx_ring->queue_index);
4932
4933         u64_stats_update_begin(&tx_ring->tx_syncp2);
4934         tx_ring->tx_stats.restart_queue2++;
4935         u64_stats_update_end(&tx_ring->tx_syncp2);
4936
4937         return 0;
4938 }
4939
4940 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4941 {
4942         if (igb_desc_unused(tx_ring) >= size)
4943                 return 0;
4944         return __igb_maybe_stop_tx(tx_ring, size);
4945 }
4946
4947 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4948                                 struct igb_ring *tx_ring)
4949 {
4950         struct igb_tx_buffer *first;
4951         int tso;
4952         u32 tx_flags = 0;
4953         u16 count = TXD_USE_COUNT(skb_headlen(skb));
4954         __be16 protocol = vlan_get_protocol(skb);
4955         u8 hdr_len = 0;
4956
4957         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4958          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4959          *       + 2 desc gap to keep tail from touching head,
4960          *       + 1 desc for context descriptor,
4961          * otherwise try next time
4962          */
4963         if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4964                 unsigned short f;
4965                 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4966                         count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4967         } else {
4968                 count += skb_shinfo(skb)->nr_frags;
4969         }
4970
4971         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
4972                 /* this is a hard error */
4973                 return NETDEV_TX_BUSY;
4974         }
4975
4976         /* record the location of the first descriptor for this packet */
4977         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4978         first->skb = skb;
4979         first->bytecount = skb->len;
4980         first->gso_segs = 1;
4981
4982         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4983                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4984
4985                 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
4986                                            &adapter->state)) {
4987                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4988                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
4989
4990                         adapter->ptp_tx_skb = skb_get(skb);
4991                         adapter->ptp_tx_start = jiffies;
4992                         if (adapter->hw.mac.type == e1000_82576)
4993                                 schedule_work(&adapter->ptp_tx_work);
4994                 }
4995         }
4996
4997         skb_tx_timestamp(skb);
4998
4999         if (vlan_tx_tag_present(skb)) {
5000                 tx_flags |= IGB_TX_FLAGS_VLAN;
5001                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5002         }
5003
5004         /* record initial flags and protocol */
5005         first->tx_flags = tx_flags;
5006         first->protocol = protocol;
5007
5008         tso = igb_tso(tx_ring, first, &hdr_len);
5009         if (tso < 0)
5010                 goto out_drop;
5011         else if (!tso)
5012                 igb_tx_csum(tx_ring, first);
5013
5014         igb_tx_map(tx_ring, first, hdr_len);
5015
5016         /* Make sure there is space in the ring for the next send. */
5017         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5018
5019         return NETDEV_TX_OK;
5020
5021 out_drop:
5022         igb_unmap_and_free_tx_resource(tx_ring, first);
5023
5024         return NETDEV_TX_OK;
5025 }
5026
5027 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5028                                                     struct sk_buff *skb)
5029 {
5030         unsigned int r_idx = skb->queue_mapping;
5031
5032         if (r_idx >= adapter->num_tx_queues)
5033                 r_idx = r_idx % adapter->num_tx_queues;
5034
5035         return adapter->tx_ring[r_idx];
5036 }
5037
5038 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5039                                   struct net_device *netdev)
5040 {
5041         struct igb_adapter *adapter = netdev_priv(netdev);
5042
5043         if (test_bit(__IGB_DOWN, &adapter->state)) {
5044                 dev_kfree_skb_any(skb);
5045                 return NETDEV_TX_OK;
5046         }
5047
5048         if (skb->len <= 0) {
5049                 dev_kfree_skb_any(skb);
5050                 return NETDEV_TX_OK;
5051         }
5052
5053         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5054          * in order to meet this minimum size requirement.
5055          */
5056         if (unlikely(skb->len < 17)) {
5057                 if (skb_pad(skb, 17 - skb->len))
5058                         return NETDEV_TX_OK;
5059                 skb->len = 17;
5060                 skb_set_tail_pointer(skb, 17);
5061         }
5062
5063         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5064 }
5065
5066 /**
5067  *  igb_tx_timeout - Respond to a Tx Hang
5068  *  @netdev: network interface device structure
5069  **/
5070 static void igb_tx_timeout(struct net_device *netdev)
5071 {
5072         struct igb_adapter *adapter = netdev_priv(netdev);
5073         struct e1000_hw *hw = &adapter->hw;
5074
5075         /* Do the reset outside of interrupt context */
5076         adapter->tx_timeout_count++;
5077
5078         if (hw->mac.type >= e1000_82580)
5079                 hw->dev_spec._82575.global_device_reset = true;
5080
5081         schedule_work(&adapter->reset_task);
5082         wr32(E1000_EICS,
5083              (adapter->eims_enable_mask & ~adapter->eims_other));
5084 }
5085
5086 static void igb_reset_task(struct work_struct *work)
5087 {
5088         struct igb_adapter *adapter;
5089         adapter = container_of(work, struct igb_adapter, reset_task);
5090
5091         igb_dump(adapter);
5092         netdev_err(adapter->netdev, "Reset adapter\n");
5093         igb_reinit_locked(adapter);
5094 }
5095
5096 /**
5097  *  igb_get_stats64 - Get System Network Statistics
5098  *  @netdev: network interface device structure
5099  *  @stats: rtnl_link_stats64 pointer
5100  **/
5101 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5102                                                 struct rtnl_link_stats64 *stats)
5103 {
5104         struct igb_adapter *adapter = netdev_priv(netdev);
5105
5106         spin_lock(&adapter->stats64_lock);
5107         igb_update_stats(adapter, &adapter->stats64);
5108         memcpy(stats, &adapter->stats64, sizeof(*stats));
5109         spin_unlock(&adapter->stats64_lock);
5110
5111         return stats;
5112 }
5113
5114 /**
5115  *  igb_change_mtu - Change the Maximum Transfer Unit
5116  *  @netdev: network interface device structure
5117  *  @new_mtu: new value for maximum frame size
5118  *
5119  *  Returns 0 on success, negative on failure
5120  **/
5121 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5122 {
5123         struct igb_adapter *adapter = netdev_priv(netdev);
5124         struct pci_dev *pdev = adapter->pdev;
5125         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5126
5127         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5128                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5129                 return -EINVAL;
5130         }
5131
5132 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5133         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5134                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5135                 return -EINVAL;
5136         }
5137
5138         /* adjust max frame to be at least the size of a standard frame */
5139         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5140                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5141
5142         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5143                 msleep(1);
5144
5145         /* igb_down has a dependency on max_frame_size */
5146         adapter->max_frame_size = max_frame;
5147
5148         if (netif_running(netdev))
5149                 igb_down(adapter);
5150
5151         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5152                  netdev->mtu, new_mtu);
5153         netdev->mtu = new_mtu;
5154
5155         if (netif_running(netdev))
5156                 igb_up(adapter);
5157         else
5158                 igb_reset(adapter);
5159
5160         clear_bit(__IGB_RESETTING, &adapter->state);
5161
5162         return 0;
5163 }
5164
5165 /**
5166  *  igb_update_stats - Update the board statistics counters
5167  *  @adapter: board private structure
5168  **/
5169 void igb_update_stats(struct igb_adapter *adapter,
5170                       struct rtnl_link_stats64 *net_stats)
5171 {
5172         struct e1000_hw *hw = &adapter->hw;
5173         struct pci_dev *pdev = adapter->pdev;
5174         u32 reg, mpc;
5175         u16 phy_tmp;
5176         int i;
5177         u64 bytes, packets;
5178         unsigned int start;
5179         u64 _bytes, _packets;
5180
5181 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5182
5183         /* Prevent stats update while adapter is being reset, or if the pci
5184          * connection is down.
5185          */
5186         if (adapter->link_speed == 0)
5187                 return;
5188         if (pci_channel_offline(pdev))
5189                 return;
5190
5191         bytes = 0;
5192         packets = 0;
5193
5194         rcu_read_lock();
5195         for (i = 0; i < adapter->num_rx_queues; i++) {
5196                 u32 rqdpc = rd32(E1000_RQDPC(i));
5197                 struct igb_ring *ring = adapter->rx_ring[i];
5198
5199                 if (rqdpc) {
5200                         ring->rx_stats.drops += rqdpc;
5201                         net_stats->rx_fifo_errors += rqdpc;
5202                 }
5203
5204                 do {
5205                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5206                         _bytes = ring->rx_stats.bytes;
5207                         _packets = ring->rx_stats.packets;
5208                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5209                 bytes += _bytes;
5210                 packets += _packets;
5211         }
5212
5213         net_stats->rx_bytes = bytes;
5214         net_stats->rx_packets = packets;
5215
5216         bytes = 0;
5217         packets = 0;
5218         for (i = 0; i < adapter->num_tx_queues; i++) {
5219                 struct igb_ring *ring = adapter->tx_ring[i];
5220                 do {
5221                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5222                         _bytes = ring->tx_stats.bytes;
5223                         _packets = ring->tx_stats.packets;
5224                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5225                 bytes += _bytes;
5226                 packets += _packets;
5227         }
5228         net_stats->tx_bytes = bytes;
5229         net_stats->tx_packets = packets;
5230         rcu_read_unlock();
5231
5232         /* read stats registers */
5233         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5234         adapter->stats.gprc += rd32(E1000_GPRC);
5235         adapter->stats.gorc += rd32(E1000_GORCL);
5236         rd32(E1000_GORCH); /* clear GORCL */
5237         adapter->stats.bprc += rd32(E1000_BPRC);
5238         adapter->stats.mprc += rd32(E1000_MPRC);
5239         adapter->stats.roc += rd32(E1000_ROC);
5240
5241         adapter->stats.prc64 += rd32(E1000_PRC64);
5242         adapter->stats.prc127 += rd32(E1000_PRC127);
5243         adapter->stats.prc255 += rd32(E1000_PRC255);
5244         adapter->stats.prc511 += rd32(E1000_PRC511);
5245         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5246         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5247         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5248         adapter->stats.sec += rd32(E1000_SEC);
5249
5250         mpc = rd32(E1000_MPC);
5251         adapter->stats.mpc += mpc;
5252         net_stats->rx_fifo_errors += mpc;
5253         adapter->stats.scc += rd32(E1000_SCC);
5254         adapter->stats.ecol += rd32(E1000_ECOL);
5255         adapter->stats.mcc += rd32(E1000_MCC);
5256         adapter->stats.latecol += rd32(E1000_LATECOL);
5257         adapter->stats.dc += rd32(E1000_DC);
5258         adapter->stats.rlec += rd32(E1000_RLEC);
5259         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5260         adapter->stats.xontxc += rd32(E1000_XONTXC);
5261         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5262         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5263         adapter->stats.fcruc += rd32(E1000_FCRUC);
5264         adapter->stats.gptc += rd32(E1000_GPTC);
5265         adapter->stats.gotc += rd32(E1000_GOTCL);
5266         rd32(E1000_GOTCH); /* clear GOTCL */
5267         adapter->stats.rnbc += rd32(E1000_RNBC);
5268         adapter->stats.ruc += rd32(E1000_RUC);
5269         adapter->stats.rfc += rd32(E1000_RFC);
5270         adapter->stats.rjc += rd32(E1000_RJC);
5271         adapter->stats.tor += rd32(E1000_TORH);
5272         adapter->stats.tot += rd32(E1000_TOTH);
5273         adapter->stats.tpr += rd32(E1000_TPR);
5274
5275         adapter->stats.ptc64 += rd32(E1000_PTC64);
5276         adapter->stats.ptc127 += rd32(E1000_PTC127);
5277         adapter->stats.ptc255 += rd32(E1000_PTC255);
5278         adapter->stats.ptc511 += rd32(E1000_PTC511);
5279         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5280         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5281
5282         adapter->stats.mptc += rd32(E1000_MPTC);
5283         adapter->stats.bptc += rd32(E1000_BPTC);
5284
5285         adapter->stats.tpt += rd32(E1000_TPT);
5286         adapter->stats.colc += rd32(E1000_COLC);
5287
5288         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5289         /* read internal phy specific stats */
5290         reg = rd32(E1000_CTRL_EXT);
5291         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5292                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5293
5294                 /* this stat has invalid values on i210/i211 */
5295                 if ((hw->mac.type != e1000_i210) &&
5296                     (hw->mac.type != e1000_i211))
5297                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5298         }
5299
5300         adapter->stats.tsctc += rd32(E1000_TSCTC);
5301         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5302
5303         adapter->stats.iac += rd32(E1000_IAC);
5304         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5305         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5306         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5307         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5308         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5309         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5310         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5311         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5312
5313         /* Fill out the OS statistics structure */
5314         net_stats->multicast = adapter->stats.mprc;
5315         net_stats->collisions = adapter->stats.colc;
5316
5317         /* Rx Errors */
5318
5319         /* RLEC on some newer hardware can be incorrect so build
5320          * our own version based on RUC and ROC
5321          */
5322         net_stats->rx_errors = adapter->stats.rxerrc +
5323                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5324                 adapter->stats.ruc + adapter->stats.roc +
5325                 adapter->stats.cexterr;
5326         net_stats->rx_length_errors = adapter->stats.ruc +
5327                                       adapter->stats.roc;
5328         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5329         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5330         net_stats->rx_missed_errors = adapter->stats.mpc;
5331
5332         /* Tx Errors */
5333         net_stats->tx_errors = adapter->stats.ecol +
5334                                adapter->stats.latecol;
5335         net_stats->tx_aborted_errors = adapter->stats.ecol;
5336         net_stats->tx_window_errors = adapter->stats.latecol;
5337         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5338
5339         /* Tx Dropped needs to be maintained elsewhere */
5340
5341         /* Phy Stats */
5342         if (hw->phy.media_type == e1000_media_type_copper) {
5343                 if ((adapter->link_speed == SPEED_1000) &&
5344                    (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5345                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5346                         adapter->phy_stats.idle_errors += phy_tmp;
5347                 }
5348         }
5349
5350         /* Management Stats */
5351         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5352         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5353         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5354
5355         /* OS2BMC Stats */
5356         reg = rd32(E1000_MANC);
5357         if (reg & E1000_MANC_EN_BMC2OS) {
5358                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5359                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5360                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5361                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5362         }
5363 }
5364
5365 static irqreturn_t igb_msix_other(int irq, void *data)
5366 {
5367         struct igb_adapter *adapter = data;
5368         struct e1000_hw *hw = &adapter->hw;
5369         u32 icr = rd32(E1000_ICR);
5370         /* reading ICR causes bit 31 of EICR to be cleared */
5371
5372         if (icr & E1000_ICR_DRSTA)
5373                 schedule_work(&adapter->reset_task);
5374
5375         if (icr & E1000_ICR_DOUTSYNC) {
5376                 /* HW is reporting DMA is out of sync */
5377                 adapter->stats.doosync++;
5378                 /* The DMA Out of Sync is also indication of a spoof event
5379                  * in IOV mode. Check the Wrong VM Behavior register to
5380                  * see if it is really a spoof event.
5381                  */
5382                 igb_check_wvbr(adapter);
5383         }
5384
5385         /* Check for a mailbox event */
5386         if (icr & E1000_ICR_VMMB)
5387                 igb_msg_task(adapter);
5388
5389         if (icr & E1000_ICR_LSC) {
5390                 hw->mac.get_link_status = 1;
5391                 /* guard against interrupt when we're going down */
5392                 if (!test_bit(__IGB_DOWN, &adapter->state))
5393                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5394         }
5395
5396         if (icr & E1000_ICR_TS) {
5397                 u32 tsicr = rd32(E1000_TSICR);
5398
5399                 if (tsicr & E1000_TSICR_TXTS) {
5400                         /* acknowledge the interrupt */
5401                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5402                         /* retrieve hardware timestamp */
5403                         schedule_work(&adapter->ptp_tx_work);
5404                 }
5405         }
5406
5407         wr32(E1000_EIMS, adapter->eims_other);
5408
5409         return IRQ_HANDLED;
5410 }
5411
5412 static void igb_write_itr(struct igb_q_vector *q_vector)
5413 {
5414         struct igb_adapter *adapter = q_vector->adapter;
5415         u32 itr_val = q_vector->itr_val & 0x7FFC;
5416
5417         if (!q_vector->set_itr)
5418                 return;
5419
5420         if (!itr_val)
5421                 itr_val = 0x4;
5422
5423         if (adapter->hw.mac.type == e1000_82575)
5424                 itr_val |= itr_val << 16;
5425         else
5426                 itr_val |= E1000_EITR_CNT_IGNR;
5427
5428         writel(itr_val, q_vector->itr_register);
5429         q_vector->set_itr = 0;
5430 }
5431
5432 static irqreturn_t igb_msix_ring(int irq, void *data)
5433 {
5434         struct igb_q_vector *q_vector = data;
5435
5436         /* Write the ITR value calculated from the previous interrupt. */
5437         igb_write_itr(q_vector);
5438
5439         napi_schedule(&q_vector->napi);
5440
5441         return IRQ_HANDLED;
5442 }
5443
5444 #ifdef CONFIG_IGB_DCA
5445 static void igb_update_tx_dca(struct igb_adapter *adapter,
5446                               struct igb_ring *tx_ring,
5447                               int cpu)
5448 {
5449         struct e1000_hw *hw = &adapter->hw;
5450         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5451
5452         if (hw->mac.type != e1000_82575)
5453                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5454
5455         /* We can enable relaxed ordering for reads, but not writes when
5456          * DCA is enabled.  This is due to a known issue in some chipsets
5457          * which will cause the DCA tag to be cleared.
5458          */
5459         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5460                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5461                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5462
5463         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5464 }
5465
5466 static void igb_update_rx_dca(struct igb_adapter *adapter,
5467                               struct igb_ring *rx_ring,
5468                               int cpu)
5469 {
5470         struct e1000_hw *hw = &adapter->hw;
5471         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5472
5473         if (hw->mac.type != e1000_82575)
5474                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5475
5476         /* We can enable relaxed ordering for reads, but not writes when
5477          * DCA is enabled.  This is due to a known issue in some chipsets
5478          * which will cause the DCA tag to be cleared.
5479          */
5480         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5481                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5482
5483         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5484 }
5485
5486 static void igb_update_dca(struct igb_q_vector *q_vector)
5487 {
5488         struct igb_adapter *adapter = q_vector->adapter;
5489         int cpu = get_cpu();
5490
5491         if (q_vector->cpu == cpu)
5492                 goto out_no_update;
5493
5494         if (q_vector->tx.ring)
5495                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5496
5497         if (q_vector->rx.ring)
5498                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5499
5500         q_vector->cpu = cpu;
5501 out_no_update:
5502         put_cpu();
5503 }
5504
5505 static void igb_setup_dca(struct igb_adapter *adapter)
5506 {
5507         struct e1000_hw *hw = &adapter->hw;
5508         int i;
5509
5510         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5511                 return;
5512
5513         /* Always use CB2 mode, difference is masked in the CB driver. */
5514         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5515
5516         for (i = 0; i < adapter->num_q_vectors; i++) {
5517                 adapter->q_vector[i]->cpu = -1;
5518                 igb_update_dca(adapter->q_vector[i]);
5519         }
5520 }
5521
5522 static int __igb_notify_dca(struct device *dev, void *data)
5523 {
5524         struct net_device *netdev = dev_get_drvdata(dev);
5525         struct igb_adapter *adapter = netdev_priv(netdev);
5526         struct pci_dev *pdev = adapter->pdev;
5527         struct e1000_hw *hw = &adapter->hw;
5528         unsigned long event = *(unsigned long *)data;
5529
5530         switch (event) {
5531         case DCA_PROVIDER_ADD:
5532                 /* if already enabled, don't do it again */
5533                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5534                         break;
5535                 if (dca_add_requester(dev) == 0) {
5536                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5537                         dev_info(&pdev->dev, "DCA enabled\n");
5538                         igb_setup_dca(adapter);
5539                         break;
5540                 }
5541                 /* Fall Through since DCA is disabled. */
5542         case DCA_PROVIDER_REMOVE:
5543                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5544                         /* without this a class_device is left
5545                          * hanging around in the sysfs model
5546                          */
5547                         dca_remove_requester(dev);
5548                         dev_info(&pdev->dev, "DCA disabled\n");
5549                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5550                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5551                 }
5552                 break;
5553         }
5554
5555         return 0;
5556 }
5557
5558 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5559                           void *p)
5560 {
5561         int ret_val;
5562
5563         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5564                                          __igb_notify_dca);
5565
5566         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5567 }
5568 #endif /* CONFIG_IGB_DCA */
5569
5570 #ifdef CONFIG_PCI_IOV
5571 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5572 {
5573         unsigned char mac_addr[ETH_ALEN];
5574
5575         eth_zero_addr(mac_addr);
5576         igb_set_vf_mac(adapter, vf, mac_addr);
5577
5578         /* By default spoof check is enabled for all VFs */
5579         adapter->vf_data[vf].spoofchk_enabled = true;
5580
5581         return 0;
5582 }
5583
5584 #endif
5585 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5586 {
5587         struct e1000_hw *hw = &adapter->hw;
5588         u32 ping;
5589         int i;
5590
5591         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5592                 ping = E1000_PF_CONTROL_MSG;
5593                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5594                         ping |= E1000_VT_MSGTYPE_CTS;
5595                 igb_write_mbx(hw, &ping, 1, i);
5596         }
5597 }
5598
5599 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5600 {
5601         struct e1000_hw *hw = &adapter->hw;
5602         u32 vmolr = rd32(E1000_VMOLR(vf));
5603         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5604
5605         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5606                             IGB_VF_FLAG_MULTI_PROMISC);
5607         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5608
5609         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5610                 vmolr |= E1000_VMOLR_MPME;
5611                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5612                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5613         } else {
5614                 /* if we have hashes and we are clearing a multicast promisc
5615                  * flag we need to write the hashes to the MTA as this step
5616                  * was previously skipped
5617                  */
5618                 if (vf_data->num_vf_mc_hashes > 30) {
5619                         vmolr |= E1000_VMOLR_MPME;
5620                 } else if (vf_data->num_vf_mc_hashes) {
5621                         int j;
5622                         vmolr |= E1000_VMOLR_ROMPE;
5623                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5624                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5625                 }
5626         }
5627
5628         wr32(E1000_VMOLR(vf), vmolr);
5629
5630         /* there are flags left unprocessed, likely not supported */
5631         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5632                 return -EINVAL;
5633
5634         return 0;
5635 }
5636
5637 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5638                                   u32 *msgbuf, u32 vf)
5639 {
5640         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5641         u16 *hash_list = (u16 *)&msgbuf[1];
5642         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5643         int i;
5644
5645         /* salt away the number of multicast addresses assigned
5646          * to this VF for later use to restore when the PF multi cast
5647          * list changes
5648          */
5649         vf_data->num_vf_mc_hashes = n;
5650
5651         /* only up to 30 hash values supported */
5652         if (n > 30)
5653                 n = 30;
5654
5655         /* store the hashes for later use */
5656         for (i = 0; i < n; i++)
5657                 vf_data->vf_mc_hashes[i] = hash_list[i];
5658
5659         /* Flush and reset the mta with the new values */
5660         igb_set_rx_mode(adapter->netdev);
5661
5662         return 0;
5663 }
5664
5665 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5666 {
5667         struct e1000_hw *hw = &adapter->hw;
5668         struct vf_data_storage *vf_data;
5669         int i, j;
5670
5671         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5672                 u32 vmolr = rd32(E1000_VMOLR(i));
5673                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5674
5675                 vf_data = &adapter->vf_data[i];
5676
5677                 if ((vf_data->num_vf_mc_hashes > 30) ||
5678                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5679                         vmolr |= E1000_VMOLR_MPME;
5680                 } else if (vf_data->num_vf_mc_hashes) {
5681                         vmolr |= E1000_VMOLR_ROMPE;
5682                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5683                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5684                 }
5685                 wr32(E1000_VMOLR(i), vmolr);
5686         }
5687 }
5688
5689 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5690 {
5691         struct e1000_hw *hw = &adapter->hw;
5692         u32 pool_mask, reg, vid;
5693         int i;
5694
5695         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5696
5697         /* Find the vlan filter for this id */
5698         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5699                 reg = rd32(E1000_VLVF(i));
5700
5701                 /* remove the vf from the pool */
5702                 reg &= ~pool_mask;
5703
5704                 /* if pool is empty then remove entry from vfta */
5705                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5706                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5707                         reg = 0;
5708                         vid = reg & E1000_VLVF_VLANID_MASK;
5709                         igb_vfta_set(hw, vid, false);
5710                 }
5711
5712                 wr32(E1000_VLVF(i), reg);
5713         }
5714
5715         adapter->vf_data[vf].vlans_enabled = 0;
5716 }
5717
5718 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5719 {
5720         struct e1000_hw *hw = &adapter->hw;
5721         u32 reg, i;
5722
5723         /* The vlvf table only exists on 82576 hardware and newer */
5724         if (hw->mac.type < e1000_82576)
5725                 return -1;
5726
5727         /* we only need to do this if VMDq is enabled */
5728         if (!adapter->vfs_allocated_count)
5729                 return -1;
5730
5731         /* Find the vlan filter for this id */
5732         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5733                 reg = rd32(E1000_VLVF(i));
5734                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5735                     vid == (reg & E1000_VLVF_VLANID_MASK))
5736                         break;
5737         }
5738
5739         if (add) {
5740                 if (i == E1000_VLVF_ARRAY_SIZE) {
5741                         /* Did not find a matching VLAN ID entry that was
5742                          * enabled.  Search for a free filter entry, i.e.
5743                          * one without the enable bit set
5744                          */
5745                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5746                                 reg = rd32(E1000_VLVF(i));
5747                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5748                                         break;
5749                         }
5750                 }
5751                 if (i < E1000_VLVF_ARRAY_SIZE) {
5752                         /* Found an enabled/available entry */
5753                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5754
5755                         /* if !enabled we need to set this up in vfta */
5756                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5757                                 /* add VID to filter table */
5758                                 igb_vfta_set(hw, vid, true);
5759                                 reg |= E1000_VLVF_VLANID_ENABLE;
5760                         }
5761                         reg &= ~E1000_VLVF_VLANID_MASK;
5762                         reg |= vid;
5763                         wr32(E1000_VLVF(i), reg);
5764
5765                         /* do not modify RLPML for PF devices */
5766                         if (vf >= adapter->vfs_allocated_count)
5767                                 return 0;
5768
5769                         if (!adapter->vf_data[vf].vlans_enabled) {
5770                                 u32 size;
5771                                 reg = rd32(E1000_VMOLR(vf));
5772                                 size = reg & E1000_VMOLR_RLPML_MASK;
5773                                 size += 4;
5774                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5775                                 reg |= size;
5776                                 wr32(E1000_VMOLR(vf), reg);
5777                         }
5778
5779                         adapter->vf_data[vf].vlans_enabled++;
5780                 }
5781         } else {
5782                 if (i < E1000_VLVF_ARRAY_SIZE) {
5783                         /* remove vf from the pool */
5784                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5785                         /* if pool is empty then remove entry from vfta */
5786                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5787                                 reg = 0;
5788                                 igb_vfta_set(hw, vid, false);
5789                         }
5790                         wr32(E1000_VLVF(i), reg);
5791
5792                         /* do not modify RLPML for PF devices */
5793                         if (vf >= adapter->vfs_allocated_count)
5794                                 return 0;
5795
5796                         adapter->vf_data[vf].vlans_enabled--;
5797                         if (!adapter->vf_data[vf].vlans_enabled) {
5798                                 u32 size;
5799                                 reg = rd32(E1000_VMOLR(vf));
5800                                 size = reg & E1000_VMOLR_RLPML_MASK;
5801                                 size -= 4;
5802                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5803                                 reg |= size;
5804                                 wr32(E1000_VMOLR(vf), reg);
5805                         }
5806                 }
5807         }
5808         return 0;
5809 }
5810
5811 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5812 {
5813         struct e1000_hw *hw = &adapter->hw;
5814
5815         if (vid)
5816                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5817         else
5818                 wr32(E1000_VMVIR(vf), 0);
5819 }
5820
5821 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5822                                int vf, u16 vlan, u8 qos)
5823 {
5824         int err = 0;
5825         struct igb_adapter *adapter = netdev_priv(netdev);
5826
5827         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5828                 return -EINVAL;
5829         if (vlan || qos) {
5830                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5831                 if (err)
5832                         goto out;
5833                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5834                 igb_set_vmolr(adapter, vf, !vlan);
5835                 adapter->vf_data[vf].pf_vlan = vlan;
5836                 adapter->vf_data[vf].pf_qos = qos;
5837                 dev_info(&adapter->pdev->dev,
5838                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5839                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5840                         dev_warn(&adapter->pdev->dev,
5841                                  "The VF VLAN has been set, but the PF device is not up.\n");
5842                         dev_warn(&adapter->pdev->dev,
5843                                  "Bring the PF device up before attempting to use the VF device.\n");
5844                 }
5845         } else {
5846                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5847                              false, vf);
5848                 igb_set_vmvir(adapter, vlan, vf);
5849                 igb_set_vmolr(adapter, vf, true);
5850                 adapter->vf_data[vf].pf_vlan = 0;
5851                 adapter->vf_data[vf].pf_qos = 0;
5852         }
5853 out:
5854         return err;
5855 }
5856
5857 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5858 {
5859         struct e1000_hw *hw = &adapter->hw;
5860         int i;
5861         u32 reg;
5862
5863         /* Find the vlan filter for this id */
5864         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5865                 reg = rd32(E1000_VLVF(i));
5866                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5867                     vid == (reg & E1000_VLVF_VLANID_MASK))
5868                         break;
5869         }
5870
5871         if (i >= E1000_VLVF_ARRAY_SIZE)
5872                 i = -1;
5873
5874         return i;
5875 }
5876
5877 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5878 {
5879         struct e1000_hw *hw = &adapter->hw;
5880         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5881         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5882         int err = 0;
5883
5884         /* If in promiscuous mode we need to make sure the PF also has
5885          * the VLAN filter set.
5886          */
5887         if (add && (adapter->netdev->flags & IFF_PROMISC))
5888                 err = igb_vlvf_set(adapter, vid, add,
5889                                    adapter->vfs_allocated_count);
5890         if (err)
5891                 goto out;
5892
5893         err = igb_vlvf_set(adapter, vid, add, vf);
5894
5895         if (err)
5896                 goto out;
5897
5898         /* Go through all the checks to see if the VLAN filter should
5899          * be wiped completely.
5900          */
5901         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
5902                 u32 vlvf, bits;
5903
5904                 int regndx = igb_find_vlvf_entry(adapter, vid);
5905                 if (regndx < 0)
5906                         goto out;
5907                 /* See if any other pools are set for this VLAN filter
5908                  * entry other than the PF.
5909                  */
5910                 vlvf = bits = rd32(E1000_VLVF(regndx));
5911                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
5912                               adapter->vfs_allocated_count);
5913                 /* If the filter was removed then ensure PF pool bit
5914                  * is cleared if the PF only added itself to the pool
5915                  * because the PF is in promiscuous mode.
5916                  */
5917                 if ((vlvf & VLAN_VID_MASK) == vid &&
5918                     !test_bit(vid, adapter->active_vlans) &&
5919                     !bits)
5920                         igb_vlvf_set(adapter, vid, add,
5921                                      adapter->vfs_allocated_count);
5922         }
5923
5924 out:
5925         return err;
5926 }
5927
5928 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5929 {
5930         /* clear flags - except flag that indicates PF has set the MAC */
5931         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5932         adapter->vf_data[vf].last_nack = jiffies;
5933
5934         /* reset offloads to defaults */
5935         igb_set_vmolr(adapter, vf, true);
5936
5937         /* reset vlans for device */
5938         igb_clear_vf_vfta(adapter, vf);
5939         if (adapter->vf_data[vf].pf_vlan)
5940                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5941                                     adapter->vf_data[vf].pf_vlan,
5942                                     adapter->vf_data[vf].pf_qos);
5943         else
5944                 igb_clear_vf_vfta(adapter, vf);
5945
5946         /* reset multicast table array for vf */
5947         adapter->vf_data[vf].num_vf_mc_hashes = 0;
5948
5949         /* Flush and reset the mta with the new values */
5950         igb_set_rx_mode(adapter->netdev);
5951 }
5952
5953 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5954 {
5955         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5956
5957         /* clear mac address as we were hotplug removed/added */
5958         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5959                 eth_zero_addr(vf_mac);
5960
5961         /* process remaining reset events */
5962         igb_vf_reset(adapter, vf);
5963 }
5964
5965 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5966 {
5967         struct e1000_hw *hw = &adapter->hw;
5968         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5969         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5970         u32 reg, msgbuf[3];
5971         u8 *addr = (u8 *)(&msgbuf[1]);
5972
5973         /* process all the same items cleared in a function level reset */
5974         igb_vf_reset(adapter, vf);
5975
5976         /* set vf mac address */
5977         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5978
5979         /* enable transmit and receive for vf */
5980         reg = rd32(E1000_VFTE);
5981         wr32(E1000_VFTE, reg | (1 << vf));
5982         reg = rd32(E1000_VFRE);
5983         wr32(E1000_VFRE, reg | (1 << vf));
5984
5985         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5986
5987         /* reply to reset with ack and vf mac address */
5988         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5989         memcpy(addr, vf_mac, ETH_ALEN);
5990         igb_write_mbx(hw, msgbuf, 3, vf);
5991 }
5992
5993 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5994 {
5995         /* The VF MAC Address is stored in a packed array of bytes
5996          * starting at the second 32 bit word of the msg array
5997          */
5998         unsigned char *addr = (char *)&msg[1];
5999         int err = -1;
6000
6001         if (is_valid_ether_addr(addr))
6002                 err = igb_set_vf_mac(adapter, vf, addr);
6003
6004         return err;
6005 }
6006
6007 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6008 {
6009         struct e1000_hw *hw = &adapter->hw;
6010         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6011         u32 msg = E1000_VT_MSGTYPE_NACK;
6012
6013         /* if device isn't clear to send it shouldn't be reading either */
6014         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6015             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6016                 igb_write_mbx(hw, &msg, 1, vf);
6017                 vf_data->last_nack = jiffies;
6018         }
6019 }
6020
6021 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6022 {
6023         struct pci_dev *pdev = adapter->pdev;
6024         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6025         struct e1000_hw *hw = &adapter->hw;
6026         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6027         s32 retval;
6028
6029         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6030
6031         if (retval) {
6032                 /* if receive failed revoke VF CTS stats and restart init */
6033                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6034                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6035                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6036                         return;
6037                 goto out;
6038         }
6039
6040         /* this is a message we already processed, do nothing */
6041         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6042                 return;
6043
6044         /* until the vf completes a reset it should not be
6045          * allowed to start any configuration.
6046          */
6047         if (msgbuf[0] == E1000_VF_RESET) {
6048                 igb_vf_reset_msg(adapter, vf);
6049                 return;
6050         }
6051
6052         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6053                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6054                         return;
6055                 retval = -1;
6056                 goto out;
6057         }
6058
6059         switch ((msgbuf[0] & 0xFFFF)) {
6060         case E1000_VF_SET_MAC_ADDR:
6061                 retval = -EINVAL;
6062                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6063                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6064                 else
6065                         dev_warn(&pdev->dev,
6066                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6067                                  vf);
6068                 break;
6069         case E1000_VF_SET_PROMISC:
6070                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6071                 break;
6072         case E1000_VF_SET_MULTICAST:
6073                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6074                 break;
6075         case E1000_VF_SET_LPE:
6076                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6077                 break;
6078         case E1000_VF_SET_VLAN:
6079                 retval = -1;
6080                 if (vf_data->pf_vlan)
6081                         dev_warn(&pdev->dev,
6082                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6083                                  vf);
6084                 else
6085                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6086                 break;
6087         default:
6088                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6089                 retval = -1;
6090                 break;
6091         }
6092
6093         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6094 out:
6095         /* notify the VF of the results of what it sent us */
6096         if (retval)
6097                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6098         else
6099                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6100
6101         igb_write_mbx(hw, msgbuf, 1, vf);
6102 }
6103
6104 static void igb_msg_task(struct igb_adapter *adapter)
6105 {
6106         struct e1000_hw *hw = &adapter->hw;
6107         u32 vf;
6108
6109         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6110                 /* process any reset requests */
6111                 if (!igb_check_for_rst(hw, vf))
6112                         igb_vf_reset_event(adapter, vf);
6113
6114                 /* process any messages pending */
6115                 if (!igb_check_for_msg(hw, vf))
6116                         igb_rcv_msg_from_vf(adapter, vf);
6117
6118                 /* process any acks */
6119                 if (!igb_check_for_ack(hw, vf))
6120                         igb_rcv_ack_from_vf(adapter, vf);
6121         }
6122 }
6123
6124 /**
6125  *  igb_set_uta - Set unicast filter table address
6126  *  @adapter: board private structure
6127  *
6128  *  The unicast table address is a register array of 32-bit registers.
6129  *  The table is meant to be used in a way similar to how the MTA is used
6130  *  however due to certain limitations in the hardware it is necessary to
6131  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6132  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6133  **/
6134 static void igb_set_uta(struct igb_adapter *adapter)
6135 {
6136         struct e1000_hw *hw = &adapter->hw;
6137         int i;
6138
6139         /* The UTA table only exists on 82576 hardware and newer */
6140         if (hw->mac.type < e1000_82576)
6141                 return;
6142
6143         /* we only need to do this if VMDq is enabled */
6144         if (!adapter->vfs_allocated_count)
6145                 return;
6146
6147         for (i = 0; i < hw->mac.uta_reg_count; i++)
6148                 array_wr32(E1000_UTA, i, ~0);
6149 }
6150
6151 /**
6152  *  igb_intr_msi - Interrupt Handler
6153  *  @irq: interrupt number
6154  *  @data: pointer to a network interface device structure
6155  **/
6156 static irqreturn_t igb_intr_msi(int irq, void *data)
6157 {
6158         struct igb_adapter *adapter = data;
6159         struct igb_q_vector *q_vector = adapter->q_vector[0];
6160         struct e1000_hw *hw = &adapter->hw;
6161         /* read ICR disables interrupts using IAM */
6162         u32 icr = rd32(E1000_ICR);
6163
6164         igb_write_itr(q_vector);
6165
6166         if (icr & E1000_ICR_DRSTA)
6167                 schedule_work(&adapter->reset_task);
6168
6169         if (icr & E1000_ICR_DOUTSYNC) {
6170                 /* HW is reporting DMA is out of sync */
6171                 adapter->stats.doosync++;
6172         }
6173
6174         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6175                 hw->mac.get_link_status = 1;
6176                 if (!test_bit(__IGB_DOWN, &adapter->state))
6177                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6178         }
6179
6180         if (icr & E1000_ICR_TS) {
6181                 u32 tsicr = rd32(E1000_TSICR);
6182
6183                 if (tsicr & E1000_TSICR_TXTS) {
6184                         /* acknowledge the interrupt */
6185                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6186                         /* retrieve hardware timestamp */
6187                         schedule_work(&adapter->ptp_tx_work);
6188                 }
6189         }
6190
6191         napi_schedule(&q_vector->napi);
6192
6193         return IRQ_HANDLED;
6194 }
6195
6196 /**
6197  *  igb_intr - Legacy Interrupt Handler
6198  *  @irq: interrupt number
6199  *  @data: pointer to a network interface device structure
6200  **/
6201 static irqreturn_t igb_intr(int irq, void *data)
6202 {
6203         struct igb_adapter *adapter = data;
6204         struct igb_q_vector *q_vector = adapter->q_vector[0];
6205         struct e1000_hw *hw = &adapter->hw;
6206         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6207          * need for the IMC write
6208          */
6209         u32 icr = rd32(E1000_ICR);
6210
6211         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6212          * not set, then the adapter didn't send an interrupt
6213          */
6214         if (!(icr & E1000_ICR_INT_ASSERTED))
6215                 return IRQ_NONE;
6216
6217         igb_write_itr(q_vector);
6218
6219         if (icr & E1000_ICR_DRSTA)
6220                 schedule_work(&adapter->reset_task);
6221
6222         if (icr & E1000_ICR_DOUTSYNC) {
6223                 /* HW is reporting DMA is out of sync */
6224                 adapter->stats.doosync++;
6225         }
6226
6227         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6228                 hw->mac.get_link_status = 1;
6229                 /* guard against interrupt when we're going down */
6230                 if (!test_bit(__IGB_DOWN, &adapter->state))
6231                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6232         }
6233
6234         if (icr & E1000_ICR_TS) {
6235                 u32 tsicr = rd32(E1000_TSICR);
6236
6237                 if (tsicr & E1000_TSICR_TXTS) {
6238                         /* acknowledge the interrupt */
6239                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6240                         /* retrieve hardware timestamp */
6241                         schedule_work(&adapter->ptp_tx_work);
6242                 }
6243         }
6244
6245         napi_schedule(&q_vector->napi);
6246
6247         return IRQ_HANDLED;
6248 }
6249
6250 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6251 {
6252         struct igb_adapter *adapter = q_vector->adapter;
6253         struct e1000_hw *hw = &adapter->hw;
6254
6255         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6256             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6257                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6258                         igb_set_itr(q_vector);
6259                 else
6260                         igb_update_ring_itr(q_vector);
6261         }
6262
6263         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6264                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6265                         wr32(E1000_EIMS, q_vector->eims_value);
6266                 else
6267                         igb_irq_enable(adapter);
6268         }
6269 }
6270
6271 /**
6272  *  igb_poll - NAPI Rx polling callback
6273  *  @napi: napi polling structure
6274  *  @budget: count of how many packets we should handle
6275  **/
6276 static int igb_poll(struct napi_struct *napi, int budget)
6277 {
6278         struct igb_q_vector *q_vector = container_of(napi,
6279                                                      struct igb_q_vector,
6280                                                      napi);
6281         bool clean_complete = true;
6282
6283 #ifdef CONFIG_IGB_DCA
6284         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6285                 igb_update_dca(q_vector);
6286 #endif
6287         if (q_vector->tx.ring)
6288                 clean_complete = igb_clean_tx_irq(q_vector);
6289
6290         if (q_vector->rx.ring)
6291                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6292
6293         /* If all work not completed, return budget and keep polling */
6294         if (!clean_complete)
6295                 return budget;
6296
6297         /* If not enough Rx work done, exit the polling mode */
6298         napi_complete(napi);
6299         igb_ring_irq_enable(q_vector);
6300
6301         return 0;
6302 }
6303
6304 /**
6305  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6306  *  @q_vector: pointer to q_vector containing needed info
6307  *
6308  *  returns true if ring is completely cleaned
6309  **/
6310 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6311 {
6312         struct igb_adapter *adapter = q_vector->adapter;
6313         struct igb_ring *tx_ring = q_vector->tx.ring;
6314         struct igb_tx_buffer *tx_buffer;
6315         union e1000_adv_tx_desc *tx_desc;
6316         unsigned int total_bytes = 0, total_packets = 0;
6317         unsigned int budget = q_vector->tx.work_limit;
6318         unsigned int i = tx_ring->next_to_clean;
6319
6320         if (test_bit(__IGB_DOWN, &adapter->state))
6321                 return true;
6322
6323         tx_buffer = &tx_ring->tx_buffer_info[i];
6324         tx_desc = IGB_TX_DESC(tx_ring, i);
6325         i -= tx_ring->count;
6326
6327         do {
6328                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6329
6330                 /* if next_to_watch is not set then there is no work pending */
6331                 if (!eop_desc)
6332                         break;
6333
6334                 /* prevent any other reads prior to eop_desc */
6335                 read_barrier_depends();
6336
6337                 /* if DD is not set pending work has not been completed */
6338                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6339                         break;
6340
6341                 /* clear next_to_watch to prevent false hangs */
6342                 tx_buffer->next_to_watch = NULL;
6343
6344                 /* update the statistics for this packet */
6345                 total_bytes += tx_buffer->bytecount;
6346                 total_packets += tx_buffer->gso_segs;
6347
6348                 /* free the skb */
6349                 dev_kfree_skb_any(tx_buffer->skb);
6350
6351                 /* unmap skb header data */
6352                 dma_unmap_single(tx_ring->dev,
6353                                  dma_unmap_addr(tx_buffer, dma),
6354                                  dma_unmap_len(tx_buffer, len),
6355                                  DMA_TO_DEVICE);
6356
6357                 /* clear tx_buffer data */
6358                 tx_buffer->skb = NULL;
6359                 dma_unmap_len_set(tx_buffer, len, 0);
6360
6361                 /* clear last DMA location and unmap remaining buffers */
6362                 while (tx_desc != eop_desc) {
6363                         tx_buffer++;
6364                         tx_desc++;
6365                         i++;
6366                         if (unlikely(!i)) {
6367                                 i -= tx_ring->count;
6368                                 tx_buffer = tx_ring->tx_buffer_info;
6369                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6370                         }
6371
6372                         /* unmap any remaining paged data */
6373                         if (dma_unmap_len(tx_buffer, len)) {
6374                                 dma_unmap_page(tx_ring->dev,
6375                                                dma_unmap_addr(tx_buffer, dma),
6376                                                dma_unmap_len(tx_buffer, len),
6377                                                DMA_TO_DEVICE);
6378                                 dma_unmap_len_set(tx_buffer, len, 0);
6379                         }
6380                 }
6381
6382                 /* move us one more past the eop_desc for start of next pkt */
6383                 tx_buffer++;
6384                 tx_desc++;
6385                 i++;
6386                 if (unlikely(!i)) {
6387                         i -= tx_ring->count;
6388                         tx_buffer = tx_ring->tx_buffer_info;
6389                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6390                 }
6391
6392                 /* issue prefetch for next Tx descriptor */
6393                 prefetch(tx_desc);
6394
6395                 /* update budget accounting */
6396                 budget--;
6397         } while (likely(budget));
6398
6399         netdev_tx_completed_queue(txring_txq(tx_ring),
6400                                   total_packets, total_bytes);
6401         i += tx_ring->count;
6402         tx_ring->next_to_clean = i;
6403         u64_stats_update_begin(&tx_ring->tx_syncp);
6404         tx_ring->tx_stats.bytes += total_bytes;
6405         tx_ring->tx_stats.packets += total_packets;
6406         u64_stats_update_end(&tx_ring->tx_syncp);
6407         q_vector->tx.total_bytes += total_bytes;
6408         q_vector->tx.total_packets += total_packets;
6409
6410         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6411                 struct e1000_hw *hw = &adapter->hw;
6412
6413                 /* Detect a transmit hang in hardware, this serializes the
6414                  * check with the clearing of time_stamp and movement of i
6415                  */
6416                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6417                 if (tx_buffer->next_to_watch &&
6418                     time_after(jiffies, tx_buffer->time_stamp +
6419                                (adapter->tx_timeout_factor * HZ)) &&
6420                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6421
6422                         /* detected Tx unit hang */
6423                         dev_err(tx_ring->dev,
6424                                 "Detected Tx Unit Hang\n"
6425                                 "  Tx Queue             <%d>\n"
6426                                 "  TDH                  <%x>\n"
6427                                 "  TDT                  <%x>\n"
6428                                 "  next_to_use          <%x>\n"
6429                                 "  next_to_clean        <%x>\n"
6430                                 "buffer_info[next_to_clean]\n"
6431                                 "  time_stamp           <%lx>\n"
6432                                 "  next_to_watch        <%p>\n"
6433                                 "  jiffies              <%lx>\n"
6434                                 "  desc.status          <%x>\n",
6435                                 tx_ring->queue_index,
6436                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6437                                 readl(tx_ring->tail),
6438                                 tx_ring->next_to_use,
6439                                 tx_ring->next_to_clean,
6440                                 tx_buffer->time_stamp,
6441                                 tx_buffer->next_to_watch,
6442                                 jiffies,
6443                                 tx_buffer->next_to_watch->wb.status);
6444                         netif_stop_subqueue(tx_ring->netdev,
6445                                             tx_ring->queue_index);
6446
6447                         /* we are about to reset, no point in enabling stuff */
6448                         return true;
6449                 }
6450         }
6451
6452 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6453         if (unlikely(total_packets &&
6454             netif_carrier_ok(tx_ring->netdev) &&
6455             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6456                 /* Make sure that anybody stopping the queue after this
6457                  * sees the new next_to_clean.
6458                  */
6459                 smp_mb();
6460                 if (__netif_subqueue_stopped(tx_ring->netdev,
6461                                              tx_ring->queue_index) &&
6462                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6463                         netif_wake_subqueue(tx_ring->netdev,
6464                                             tx_ring->queue_index);
6465
6466                         u64_stats_update_begin(&tx_ring->tx_syncp);
6467                         tx_ring->tx_stats.restart_queue++;
6468                         u64_stats_update_end(&tx_ring->tx_syncp);
6469                 }
6470         }
6471
6472         return !!budget;
6473 }
6474
6475 /**
6476  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6477  *  @rx_ring: rx descriptor ring to store buffers on
6478  *  @old_buff: donor buffer to have page reused
6479  *
6480  *  Synchronizes page for reuse by the adapter
6481  **/
6482 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6483                               struct igb_rx_buffer *old_buff)
6484 {
6485         struct igb_rx_buffer *new_buff;
6486         u16 nta = rx_ring->next_to_alloc;
6487
6488         new_buff = &rx_ring->rx_buffer_info[nta];
6489
6490         /* update, and store next to alloc */
6491         nta++;
6492         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6493
6494         /* transfer page from old buffer to new buffer */
6495         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
6496
6497         /* sync the buffer for use by the device */
6498         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6499                                          old_buff->page_offset,
6500                                          IGB_RX_BUFSZ,
6501                                          DMA_FROM_DEVICE);
6502 }
6503
6504 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6505                                   struct page *page,
6506                                   unsigned int truesize)
6507 {
6508         /* avoid re-using remote pages */
6509         if (unlikely(page_to_nid(page) != numa_node_id()))
6510                 return false;
6511
6512 #if (PAGE_SIZE < 8192)
6513         /* if we are only owner of page we can reuse it */
6514         if (unlikely(page_count(page) != 1))
6515                 return false;
6516
6517         /* flip page offset to other buffer */
6518         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6519
6520         /* since we are the only owner of the page and we need to
6521          * increment it, just set the value to 2 in order to avoid
6522          * an unnecessary locked operation
6523          */
6524         atomic_set(&page->_count, 2);
6525 #else
6526         /* move offset up to the next cache line */
6527         rx_buffer->page_offset += truesize;
6528
6529         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6530                 return false;
6531
6532         /* bump ref count on page before it is given to the stack */
6533         get_page(page);
6534 #endif
6535
6536         return true;
6537 }
6538
6539 /**
6540  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6541  *  @rx_ring: rx descriptor ring to transact packets on
6542  *  @rx_buffer: buffer containing page to add
6543  *  @rx_desc: descriptor containing length of buffer written by hardware
6544  *  @skb: sk_buff to place the data into
6545  *
6546  *  This function will add the data contained in rx_buffer->page to the skb.
6547  *  This is done either through a direct copy if the data in the buffer is
6548  *  less than the skb header size, otherwise it will just attach the page as
6549  *  a frag to the skb.
6550  *
6551  *  The function will then update the page offset if necessary and return
6552  *  true if the buffer can be reused by the adapter.
6553  **/
6554 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6555                             struct igb_rx_buffer *rx_buffer,
6556                             union e1000_adv_rx_desc *rx_desc,
6557                             struct sk_buff *skb)
6558 {
6559         struct page *page = rx_buffer->page;
6560         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6561 #if (PAGE_SIZE < 8192)
6562         unsigned int truesize = IGB_RX_BUFSZ;
6563 #else
6564         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6565 #endif
6566
6567         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6568                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6569
6570                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6571                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6572                         va += IGB_TS_HDR_LEN;
6573                         size -= IGB_TS_HDR_LEN;
6574                 }
6575
6576                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6577
6578                 /* we can reuse buffer as-is, just make sure it is local */
6579                 if (likely(page_to_nid(page) == numa_node_id()))
6580                         return true;
6581
6582                 /* this page cannot be reused so discard it */
6583                 put_page(page);
6584                 return false;
6585         }
6586
6587         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6588                         rx_buffer->page_offset, size, truesize);
6589
6590         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6591 }
6592
6593 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6594                                            union e1000_adv_rx_desc *rx_desc,
6595                                            struct sk_buff *skb)
6596 {
6597         struct igb_rx_buffer *rx_buffer;
6598         struct page *page;
6599
6600         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6601
6602         page = rx_buffer->page;
6603         prefetchw(page);
6604
6605         if (likely(!skb)) {
6606                 void *page_addr = page_address(page) +
6607                                   rx_buffer->page_offset;
6608
6609                 /* prefetch first cache line of first page */
6610                 prefetch(page_addr);
6611 #if L1_CACHE_BYTES < 128
6612                 prefetch(page_addr + L1_CACHE_BYTES);
6613 #endif
6614
6615                 /* allocate a skb to store the frags */
6616                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6617                                                 IGB_RX_HDR_LEN);
6618                 if (unlikely(!skb)) {
6619                         rx_ring->rx_stats.alloc_failed++;
6620                         return NULL;
6621                 }
6622
6623                 /* we will be copying header into skb->data in
6624                  * pskb_may_pull so it is in our interest to prefetch
6625                  * it now to avoid a possible cache miss
6626                  */
6627                 prefetchw(skb->data);
6628         }
6629
6630         /* we are reusing so sync this buffer for CPU use */
6631         dma_sync_single_range_for_cpu(rx_ring->dev,
6632                                       rx_buffer->dma,
6633                                       rx_buffer->page_offset,
6634                                       IGB_RX_BUFSZ,
6635                                       DMA_FROM_DEVICE);
6636
6637         /* pull page into skb */
6638         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6639                 /* hand second half of page back to the ring */
6640                 igb_reuse_rx_page(rx_ring, rx_buffer);
6641         } else {
6642                 /* we are not reusing the buffer so unmap it */
6643                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6644                                PAGE_SIZE, DMA_FROM_DEVICE);
6645         }
6646
6647         /* clear contents of rx_buffer */
6648         rx_buffer->page = NULL;
6649
6650         return skb;
6651 }
6652
6653 static inline void igb_rx_checksum(struct igb_ring *ring,
6654                                    union e1000_adv_rx_desc *rx_desc,
6655                                    struct sk_buff *skb)
6656 {
6657         skb_checksum_none_assert(skb);
6658
6659         /* Ignore Checksum bit is set */
6660         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6661                 return;
6662
6663         /* Rx checksum disabled via ethtool */
6664         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6665                 return;
6666
6667         /* TCP/UDP checksum error bit is set */
6668         if (igb_test_staterr(rx_desc,
6669                              E1000_RXDEXT_STATERR_TCPE |
6670                              E1000_RXDEXT_STATERR_IPE)) {
6671                 /* work around errata with sctp packets where the TCPE aka
6672                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6673                  * packets, (aka let the stack check the crc32c)
6674                  */
6675                 if (!((skb->len == 60) &&
6676                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6677                         u64_stats_update_begin(&ring->rx_syncp);
6678                         ring->rx_stats.csum_err++;
6679                         u64_stats_update_end(&ring->rx_syncp);
6680                 }
6681                 /* let the stack verify checksum errors */
6682                 return;
6683         }
6684         /* It must be a TCP or UDP packet with a valid checksum */
6685         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6686                                       E1000_RXD_STAT_UDPCS))
6687                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6688
6689         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6690                 le32_to_cpu(rx_desc->wb.upper.status_error));
6691 }
6692
6693 static inline void igb_rx_hash(struct igb_ring *ring,
6694                                union e1000_adv_rx_desc *rx_desc,
6695                                struct sk_buff *skb)
6696 {
6697         if (ring->netdev->features & NETIF_F_RXHASH)
6698                 skb_set_hash(skb,
6699                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
6700                              PKT_HASH_TYPE_L3);
6701 }
6702
6703 /**
6704  *  igb_is_non_eop - process handling of non-EOP buffers
6705  *  @rx_ring: Rx ring being processed
6706  *  @rx_desc: Rx descriptor for current buffer
6707  *  @skb: current socket buffer containing buffer in progress
6708  *
6709  *  This function updates next to clean.  If the buffer is an EOP buffer
6710  *  this function exits returning false, otherwise it will place the
6711  *  sk_buff in the next buffer to be chained and return true indicating
6712  *  that this is in fact a non-EOP buffer.
6713  **/
6714 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6715                            union e1000_adv_rx_desc *rx_desc)
6716 {
6717         u32 ntc = rx_ring->next_to_clean + 1;
6718
6719         /* fetch, update, and store next to clean */
6720         ntc = (ntc < rx_ring->count) ? ntc : 0;
6721         rx_ring->next_to_clean = ntc;
6722
6723         prefetch(IGB_RX_DESC(rx_ring, ntc));
6724
6725         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6726                 return false;
6727
6728         return true;
6729 }
6730
6731 /**
6732  *  igb_get_headlen - determine size of header for LRO/GRO
6733  *  @data: pointer to the start of the headers
6734  *  @max_len: total length of section to find headers in
6735  *
6736  *  This function is meant to determine the length of headers that will
6737  *  be recognized by hardware for LRO, and GRO offloads.  The main
6738  *  motivation of doing this is to only perform one pull for IPv4 TCP
6739  *  packets so that we can do basic things like calculating the gso_size
6740  *  based on the average data per packet.
6741  **/
6742 static unsigned int igb_get_headlen(unsigned char *data,
6743                                     unsigned int max_len)
6744 {
6745         union {
6746                 unsigned char *network;
6747                 /* l2 headers */
6748                 struct ethhdr *eth;
6749                 struct vlan_hdr *vlan;
6750                 /* l3 headers */
6751                 struct iphdr *ipv4;
6752                 struct ipv6hdr *ipv6;
6753         } hdr;
6754         __be16 protocol;
6755         u8 nexthdr = 0; /* default to not TCP */
6756         u8 hlen;
6757
6758         /* this should never happen, but better safe than sorry */
6759         if (max_len < ETH_HLEN)
6760                 return max_len;
6761
6762         /* initialize network frame pointer */
6763         hdr.network = data;
6764
6765         /* set first protocol and move network header forward */
6766         protocol = hdr.eth->h_proto;
6767         hdr.network += ETH_HLEN;
6768
6769         /* handle any vlan tag if present */
6770         if (protocol == htons(ETH_P_8021Q)) {
6771                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6772                         return max_len;
6773
6774                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6775                 hdr.network += VLAN_HLEN;
6776         }
6777
6778         /* handle L3 protocols */
6779         if (protocol == htons(ETH_P_IP)) {
6780                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6781                         return max_len;
6782
6783                 /* access ihl as a u8 to avoid unaligned access on ia64 */
6784                 hlen = (hdr.network[0] & 0x0F) << 2;
6785
6786                 /* verify hlen meets minimum size requirements */
6787                 if (hlen < sizeof(struct iphdr))
6788                         return hdr.network - data;
6789
6790                 /* record next protocol if header is present */
6791                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
6792                         nexthdr = hdr.ipv4->protocol;
6793         } else if (protocol == htons(ETH_P_IPV6)) {
6794                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6795                         return max_len;
6796
6797                 /* record next protocol */
6798                 nexthdr = hdr.ipv6->nexthdr;
6799                 hlen = sizeof(struct ipv6hdr);
6800         } else {
6801                 return hdr.network - data;
6802         }
6803
6804         /* relocate pointer to start of L4 header */
6805         hdr.network += hlen;
6806
6807         /* finally sort out TCP */
6808         if (nexthdr == IPPROTO_TCP) {
6809                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6810                         return max_len;
6811
6812                 /* access doff as a u8 to avoid unaligned access on ia64 */
6813                 hlen = (hdr.network[12] & 0xF0) >> 2;
6814
6815                 /* verify hlen meets minimum size requirements */
6816                 if (hlen < sizeof(struct tcphdr))
6817                         return hdr.network - data;
6818
6819                 hdr.network += hlen;
6820         } else if (nexthdr == IPPROTO_UDP) {
6821                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6822                         return max_len;
6823
6824                 hdr.network += sizeof(struct udphdr);
6825         }
6826
6827         /* If everything has gone correctly hdr.network should be the
6828          * data section of the packet and will be the end of the header.
6829          * If not then it probably represents the end of the last recognized
6830          * header.
6831          */
6832         if ((hdr.network - data) < max_len)
6833                 return hdr.network - data;
6834         else
6835                 return max_len;
6836 }
6837
6838 /**
6839  *  igb_pull_tail - igb specific version of skb_pull_tail
6840  *  @rx_ring: rx descriptor ring packet is being transacted on
6841  *  @rx_desc: pointer to the EOP Rx descriptor
6842  *  @skb: pointer to current skb being adjusted
6843  *
6844  *  This function is an igb specific version of __pskb_pull_tail.  The
6845  *  main difference between this version and the original function is that
6846  *  this function can make several assumptions about the state of things
6847  *  that allow for significant optimizations versus the standard function.
6848  *  As a result we can do things like drop a frag and maintain an accurate
6849  *  truesize for the skb.
6850  */
6851 static void igb_pull_tail(struct igb_ring *rx_ring,
6852                           union e1000_adv_rx_desc *rx_desc,
6853                           struct sk_buff *skb)
6854 {
6855         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6856         unsigned char *va;
6857         unsigned int pull_len;
6858
6859         /* it is valid to use page_address instead of kmap since we are
6860          * working with pages allocated out of the lomem pool per
6861          * alloc_page(GFP_ATOMIC)
6862          */
6863         va = skb_frag_address(frag);
6864
6865         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6866                 /* retrieve timestamp from buffer */
6867                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6868
6869                 /* update pointers to remove timestamp header */
6870                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6871                 frag->page_offset += IGB_TS_HDR_LEN;
6872                 skb->data_len -= IGB_TS_HDR_LEN;
6873                 skb->len -= IGB_TS_HDR_LEN;
6874
6875                 /* move va to start of packet data */
6876                 va += IGB_TS_HDR_LEN;
6877         }
6878
6879         /* we need the header to contain the greater of either ETH_HLEN or
6880          * 60 bytes if the skb->len is less than 60 for skb_pad.
6881          */
6882         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6883
6884         /* align pull length to size of long to optimize memcpy performance */
6885         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6886
6887         /* update all of the pointers */
6888         skb_frag_size_sub(frag, pull_len);
6889         frag->page_offset += pull_len;
6890         skb->data_len -= pull_len;
6891         skb->tail += pull_len;
6892 }
6893
6894 /**
6895  *  igb_cleanup_headers - Correct corrupted or empty headers
6896  *  @rx_ring: rx descriptor ring packet is being transacted on
6897  *  @rx_desc: pointer to the EOP Rx descriptor
6898  *  @skb: pointer to current skb being fixed
6899  *
6900  *  Address the case where we are pulling data in on pages only
6901  *  and as such no data is present in the skb header.
6902  *
6903  *  In addition if skb is not at least 60 bytes we need to pad it so that
6904  *  it is large enough to qualify as a valid Ethernet frame.
6905  *
6906  *  Returns true if an error was encountered and skb was freed.
6907  **/
6908 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6909                                 union e1000_adv_rx_desc *rx_desc,
6910                                 struct sk_buff *skb)
6911 {
6912         if (unlikely((igb_test_staterr(rx_desc,
6913                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6914                 struct net_device *netdev = rx_ring->netdev;
6915                 if (!(netdev->features & NETIF_F_RXALL)) {
6916                         dev_kfree_skb_any(skb);
6917                         return true;
6918                 }
6919         }
6920
6921         /* place header in linear portion of buffer */
6922         if (skb_is_nonlinear(skb))
6923                 igb_pull_tail(rx_ring, rx_desc, skb);
6924
6925         /* if skb_pad returns an error the skb was freed */
6926         if (unlikely(skb->len < 60)) {
6927                 int pad_len = 60 - skb->len;
6928
6929                 if (skb_pad(skb, pad_len))
6930                         return true;
6931                 __skb_put(skb, pad_len);
6932         }
6933
6934         return false;
6935 }
6936
6937 /**
6938  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
6939  *  @rx_ring: rx descriptor ring packet is being transacted on
6940  *  @rx_desc: pointer to the EOP Rx descriptor
6941  *  @skb: pointer to current skb being populated
6942  *
6943  *  This function checks the ring, descriptor, and packet information in
6944  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
6945  *  other fields within the skb.
6946  **/
6947 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6948                                    union e1000_adv_rx_desc *rx_desc,
6949                                    struct sk_buff *skb)
6950 {
6951         struct net_device *dev = rx_ring->netdev;
6952
6953         igb_rx_hash(rx_ring, rx_desc, skb);
6954
6955         igb_rx_checksum(rx_ring, rx_desc, skb);
6956
6957         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
6958             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
6959                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
6960
6961         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6962             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6963                 u16 vid;
6964                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6965                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6966                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6967                 else
6968                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6969
6970                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6971         }
6972
6973         skb_record_rx_queue(skb, rx_ring->queue_index);
6974
6975         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6976 }
6977
6978 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6979 {
6980         struct igb_ring *rx_ring = q_vector->rx.ring;
6981         struct sk_buff *skb = rx_ring->skb;
6982         unsigned int total_bytes = 0, total_packets = 0;
6983         u16 cleaned_count = igb_desc_unused(rx_ring);
6984
6985         while (likely(total_packets < budget)) {
6986                 union e1000_adv_rx_desc *rx_desc;
6987
6988                 /* return some buffers to hardware, one at a time is too slow */
6989                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6990                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
6991                         cleaned_count = 0;
6992                 }
6993
6994                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6995
6996                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6997                         break;
6998
6999                 /* This memory barrier is needed to keep us from reading
7000                  * any other fields out of the rx_desc until we know the
7001                  * RXD_STAT_DD bit is set
7002                  */
7003                 rmb();
7004
7005                 /* retrieve a buffer from the ring */
7006                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
7007
7008                 /* exit if we failed to retrieve a buffer */
7009                 if (!skb)
7010                         break;
7011
7012                 cleaned_count++;
7013
7014                 /* fetch next buffer in frame if non-eop */
7015                 if (igb_is_non_eop(rx_ring, rx_desc))
7016                         continue;
7017
7018                 /* verify the packet layout is correct */
7019                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
7020                         skb = NULL;
7021                         continue;
7022                 }
7023
7024                 /* probably a little skewed due to removing CRC */
7025                 total_bytes += skb->len;
7026
7027                 /* populate checksum, timestamp, VLAN, and protocol */
7028                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7029
7030                 napi_gro_receive(&q_vector->napi, skb);
7031
7032                 /* reset skb pointer */
7033                 skb = NULL;
7034
7035                 /* update budget accounting */
7036                 total_packets++;
7037         }
7038
7039         /* place incomplete frames back on ring for completion */
7040         rx_ring->skb = skb;
7041
7042         u64_stats_update_begin(&rx_ring->rx_syncp);
7043         rx_ring->rx_stats.packets += total_packets;
7044         rx_ring->rx_stats.bytes += total_bytes;
7045         u64_stats_update_end(&rx_ring->rx_syncp);
7046         q_vector->rx.total_packets += total_packets;
7047         q_vector->rx.total_bytes += total_bytes;
7048
7049         if (cleaned_count)
7050                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7051
7052         return (total_packets < budget);
7053 }
7054
7055 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7056                                   struct igb_rx_buffer *bi)
7057 {
7058         struct page *page = bi->page;
7059         dma_addr_t dma;
7060
7061         /* since we are recycling buffers we should seldom need to alloc */
7062         if (likely(page))
7063                 return true;
7064
7065         /* alloc new page for storage */
7066         page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
7067         if (unlikely(!page)) {
7068                 rx_ring->rx_stats.alloc_failed++;
7069                 return false;
7070         }
7071
7072         /* map page for use */
7073         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
7074
7075         /* if mapping failed free memory back to system since
7076          * there isn't much point in holding memory we can't use
7077          */
7078         if (dma_mapping_error(rx_ring->dev, dma)) {
7079                 __free_page(page);
7080
7081                 rx_ring->rx_stats.alloc_failed++;
7082                 return false;
7083         }
7084
7085         bi->dma = dma;
7086         bi->page = page;
7087         bi->page_offset = 0;
7088
7089         return true;
7090 }
7091
7092 /**
7093  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7094  *  @adapter: address of board private structure
7095  **/
7096 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7097 {
7098         union e1000_adv_rx_desc *rx_desc;
7099         struct igb_rx_buffer *bi;
7100         u16 i = rx_ring->next_to_use;
7101
7102         /* nothing to do */
7103         if (!cleaned_count)
7104                 return;
7105
7106         rx_desc = IGB_RX_DESC(rx_ring, i);
7107         bi = &rx_ring->rx_buffer_info[i];
7108         i -= rx_ring->count;
7109
7110         do {
7111                 if (!igb_alloc_mapped_page(rx_ring, bi))
7112                         break;
7113
7114                 /* Refresh the desc even if buffer_addrs didn't change
7115                  * because each write-back erases this info.
7116                  */
7117                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7118
7119                 rx_desc++;
7120                 bi++;
7121                 i++;
7122                 if (unlikely(!i)) {
7123                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7124                         bi = rx_ring->rx_buffer_info;
7125                         i -= rx_ring->count;
7126                 }
7127
7128                 /* clear the hdr_addr for the next_to_use descriptor */
7129                 rx_desc->read.hdr_addr = 0;
7130
7131                 cleaned_count--;
7132         } while (cleaned_count);
7133
7134         i += rx_ring->count;
7135
7136         if (rx_ring->next_to_use != i) {
7137                 /* record the next descriptor to use */
7138                 rx_ring->next_to_use = i;
7139
7140                 /* update next to alloc since we have filled the ring */
7141                 rx_ring->next_to_alloc = i;
7142
7143                 /* Force memory writes to complete before letting h/w
7144                  * know there are new descriptors to fetch.  (Only
7145                  * applicable for weak-ordered memory model archs,
7146                  * such as IA-64).
7147                  */
7148                 wmb();
7149                 writel(i, rx_ring->tail);
7150         }
7151 }
7152
7153 /**
7154  * igb_mii_ioctl -
7155  * @netdev:
7156  * @ifreq:
7157  * @cmd:
7158  **/
7159 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7160 {
7161         struct igb_adapter *adapter = netdev_priv(netdev);
7162         struct mii_ioctl_data *data = if_mii(ifr);
7163
7164         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7165                 return -EOPNOTSUPP;
7166
7167         switch (cmd) {
7168         case SIOCGMIIPHY:
7169                 data->phy_id = adapter->hw.phy.addr;
7170                 break;
7171         case SIOCGMIIREG:
7172                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7173                                      &data->val_out))
7174                         return -EIO;
7175                 break;
7176         case SIOCSMIIREG:
7177         default:
7178                 return -EOPNOTSUPP;
7179         }
7180         return 0;
7181 }
7182
7183 /**
7184  * igb_ioctl -
7185  * @netdev:
7186  * @ifreq:
7187  * @cmd:
7188  **/
7189 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7190 {
7191         switch (cmd) {
7192         case SIOCGMIIPHY:
7193         case SIOCGMIIREG:
7194         case SIOCSMIIREG:
7195                 return igb_mii_ioctl(netdev, ifr, cmd);
7196         case SIOCGHWTSTAMP:
7197                 return igb_ptp_get_ts_config(netdev, ifr);
7198         case SIOCSHWTSTAMP:
7199                 return igb_ptp_set_ts_config(netdev, ifr);
7200         default:
7201                 return -EOPNOTSUPP;
7202         }
7203 }
7204
7205 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7206 {
7207         struct igb_adapter *adapter = hw->back;
7208
7209         if (pcie_capability_read_word(adapter->pdev, reg, value))
7210                 return -E1000_ERR_CONFIG;
7211
7212         return 0;
7213 }
7214
7215 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7216 {
7217         struct igb_adapter *adapter = hw->back;
7218
7219         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7220                 return -E1000_ERR_CONFIG;
7221
7222         return 0;
7223 }
7224
7225 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7226 {
7227         struct igb_adapter *adapter = netdev_priv(netdev);
7228         struct e1000_hw *hw = &adapter->hw;
7229         u32 ctrl, rctl;
7230         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7231
7232         if (enable) {
7233                 /* enable VLAN tag insert/strip */
7234                 ctrl = rd32(E1000_CTRL);
7235                 ctrl |= E1000_CTRL_VME;
7236                 wr32(E1000_CTRL, ctrl);
7237
7238                 /* Disable CFI check */
7239                 rctl = rd32(E1000_RCTL);
7240                 rctl &= ~E1000_RCTL_CFIEN;
7241                 wr32(E1000_RCTL, rctl);
7242         } else {
7243                 /* disable VLAN tag insert/strip */
7244                 ctrl = rd32(E1000_CTRL);
7245                 ctrl &= ~E1000_CTRL_VME;
7246                 wr32(E1000_CTRL, ctrl);
7247         }
7248
7249         igb_rlpml_set(adapter);
7250 }
7251
7252 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7253                                __be16 proto, u16 vid)
7254 {
7255         struct igb_adapter *adapter = netdev_priv(netdev);
7256         struct e1000_hw *hw = &adapter->hw;
7257         int pf_id = adapter->vfs_allocated_count;
7258
7259         /* attempt to add filter to vlvf array */
7260         igb_vlvf_set(adapter, vid, true, pf_id);
7261
7262         /* add the filter since PF can receive vlans w/o entry in vlvf */
7263         igb_vfta_set(hw, vid, true);
7264
7265         set_bit(vid, adapter->active_vlans);
7266
7267         return 0;
7268 }
7269
7270 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7271                                 __be16 proto, u16 vid)
7272 {
7273         struct igb_adapter *adapter = netdev_priv(netdev);
7274         struct e1000_hw *hw = &adapter->hw;
7275         int pf_id = adapter->vfs_allocated_count;
7276         s32 err;
7277
7278         /* remove vlan from VLVF table array */
7279         err = igb_vlvf_set(adapter, vid, false, pf_id);
7280
7281         /* if vid was not present in VLVF just remove it from table */
7282         if (err)
7283                 igb_vfta_set(hw, vid, false);
7284
7285         clear_bit(vid, adapter->active_vlans);
7286
7287         return 0;
7288 }
7289
7290 static void igb_restore_vlan(struct igb_adapter *adapter)
7291 {
7292         u16 vid;
7293
7294         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7295
7296         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
7297                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7298 }
7299
7300 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7301 {
7302         struct pci_dev *pdev = adapter->pdev;
7303         struct e1000_mac_info *mac = &adapter->hw.mac;
7304
7305         mac->autoneg = 0;
7306
7307         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7308          * for the switch() below to work
7309          */
7310         if ((spd & 1) || (dplx & ~1))
7311                 goto err_inval;
7312
7313         /* Fiber NIC's only allow 1000 gbps Full duplex
7314          * and 100Mbps Full duplex for 100baseFx sfp
7315          */
7316         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7317                 switch (spd + dplx) {
7318                 case SPEED_10 + DUPLEX_HALF:
7319                 case SPEED_10 + DUPLEX_FULL:
7320                 case SPEED_100 + DUPLEX_HALF:
7321                         goto err_inval;
7322                 default:
7323                         break;
7324                 }
7325         }
7326
7327         switch (spd + dplx) {
7328         case SPEED_10 + DUPLEX_HALF:
7329                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7330                 break;
7331         case SPEED_10 + DUPLEX_FULL:
7332                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7333                 break;
7334         case SPEED_100 + DUPLEX_HALF:
7335                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7336                 break;
7337         case SPEED_100 + DUPLEX_FULL:
7338                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7339                 break;
7340         case SPEED_1000 + DUPLEX_FULL:
7341                 mac->autoneg = 1;
7342                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7343                 break;
7344         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7345         default:
7346                 goto err_inval;
7347         }
7348
7349         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7350         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7351
7352         return 0;
7353
7354 err_inval:
7355         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7356         return -EINVAL;
7357 }
7358
7359 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7360                           bool runtime)
7361 {
7362         struct net_device *netdev = pci_get_drvdata(pdev);
7363         struct igb_adapter *adapter = netdev_priv(netdev);
7364         struct e1000_hw *hw = &adapter->hw;
7365         u32 ctrl, rctl, status;
7366         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7367 #ifdef CONFIG_PM
7368         int retval = 0;
7369 #endif
7370
7371         netif_device_detach(netdev);
7372
7373         if (netif_running(netdev))
7374                 __igb_close(netdev, true);
7375
7376         igb_clear_interrupt_scheme(adapter);
7377
7378 #ifdef CONFIG_PM
7379         retval = pci_save_state(pdev);
7380         if (retval)
7381                 return retval;
7382 #endif
7383
7384         status = rd32(E1000_STATUS);
7385         if (status & E1000_STATUS_LU)
7386                 wufc &= ~E1000_WUFC_LNKC;
7387
7388         if (wufc) {
7389                 igb_setup_rctl(adapter);
7390                 igb_set_rx_mode(netdev);
7391
7392                 /* turn on all-multi mode if wake on multicast is enabled */
7393                 if (wufc & E1000_WUFC_MC) {
7394                         rctl = rd32(E1000_RCTL);
7395                         rctl |= E1000_RCTL_MPE;
7396                         wr32(E1000_RCTL, rctl);
7397                 }
7398
7399                 ctrl = rd32(E1000_CTRL);
7400                 /* advertise wake from D3Cold */
7401                 #define E1000_CTRL_ADVD3WUC 0x00100000
7402                 /* phy power management enable */
7403                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7404                 ctrl |= E1000_CTRL_ADVD3WUC;
7405                 wr32(E1000_CTRL, ctrl);
7406
7407                 /* Allow time for pending master requests to run */
7408                 igb_disable_pcie_master(hw);
7409
7410                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7411                 wr32(E1000_WUFC, wufc);
7412         } else {
7413                 wr32(E1000_WUC, 0);
7414                 wr32(E1000_WUFC, 0);
7415         }
7416
7417         *enable_wake = wufc || adapter->en_mng_pt;
7418         if (!*enable_wake)
7419                 igb_power_down_link(adapter);
7420         else
7421                 igb_power_up_link(adapter);
7422
7423         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7424          * would have already happened in close and is redundant.
7425          */
7426         igb_release_hw_control(adapter);
7427
7428         pci_disable_device(pdev);
7429
7430         return 0;
7431 }
7432
7433 #ifdef CONFIG_PM
7434 #ifdef CONFIG_PM_SLEEP
7435 static int igb_suspend(struct device *dev)
7436 {
7437         int retval;
7438         bool wake;
7439         struct pci_dev *pdev = to_pci_dev(dev);
7440
7441         retval = __igb_shutdown(pdev, &wake, 0);
7442         if (retval)
7443                 return retval;
7444
7445         if (wake) {
7446                 pci_prepare_to_sleep(pdev);
7447         } else {
7448                 pci_wake_from_d3(pdev, false);
7449                 pci_set_power_state(pdev, PCI_D3hot);
7450         }
7451
7452         return 0;
7453 }
7454 #endif /* CONFIG_PM_SLEEP */
7455
7456 static int igb_resume(struct device *dev)
7457 {
7458         struct pci_dev *pdev = to_pci_dev(dev);
7459         struct net_device *netdev = pci_get_drvdata(pdev);
7460         struct igb_adapter *adapter = netdev_priv(netdev);
7461         struct e1000_hw *hw = &adapter->hw;
7462         u32 err;
7463
7464         pci_set_power_state(pdev, PCI_D0);
7465         pci_restore_state(pdev);
7466         pci_save_state(pdev);
7467
7468         err = pci_enable_device_mem(pdev);
7469         if (err) {
7470                 dev_err(&pdev->dev,
7471                         "igb: Cannot enable PCI device from suspend\n");
7472                 return err;
7473         }
7474         pci_set_master(pdev);
7475
7476         pci_enable_wake(pdev, PCI_D3hot, 0);
7477         pci_enable_wake(pdev, PCI_D3cold, 0);
7478
7479         if (igb_init_interrupt_scheme(adapter, true)) {
7480                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7481                 return -ENOMEM;
7482         }
7483
7484         igb_reset(adapter);
7485
7486         /* let the f/w know that the h/w is now under the control of the
7487          * driver.
7488          */
7489         igb_get_hw_control(adapter);
7490
7491         wr32(E1000_WUS, ~0);
7492
7493         if (netdev->flags & IFF_UP) {
7494                 rtnl_lock();
7495                 err = __igb_open(netdev, true);
7496                 rtnl_unlock();
7497                 if (err)
7498                         return err;
7499         }
7500
7501         netif_device_attach(netdev);
7502         return 0;
7503 }
7504
7505 #ifdef CONFIG_PM_RUNTIME
7506 static int igb_runtime_idle(struct device *dev)
7507 {
7508         struct pci_dev *pdev = to_pci_dev(dev);
7509         struct net_device *netdev = pci_get_drvdata(pdev);
7510         struct igb_adapter *adapter = netdev_priv(netdev);
7511
7512         if (!igb_has_link(adapter))
7513                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7514
7515         return -EBUSY;
7516 }
7517
7518 static int igb_runtime_suspend(struct device *dev)
7519 {
7520         struct pci_dev *pdev = to_pci_dev(dev);
7521         int retval;
7522         bool wake;
7523
7524         retval = __igb_shutdown(pdev, &wake, 1);
7525         if (retval)
7526                 return retval;
7527
7528         if (wake) {
7529                 pci_prepare_to_sleep(pdev);
7530         } else {
7531                 pci_wake_from_d3(pdev, false);
7532                 pci_set_power_state(pdev, PCI_D3hot);
7533         }
7534
7535         return 0;
7536 }
7537
7538 static int igb_runtime_resume(struct device *dev)
7539 {
7540         return igb_resume(dev);
7541 }
7542 #endif /* CONFIG_PM_RUNTIME */
7543 #endif
7544
7545 static void igb_shutdown(struct pci_dev *pdev)
7546 {
7547         bool wake;
7548
7549         __igb_shutdown(pdev, &wake, 0);
7550
7551         if (system_state == SYSTEM_POWER_OFF) {
7552                 pci_wake_from_d3(pdev, wake);
7553                 pci_set_power_state(pdev, PCI_D3hot);
7554         }
7555 }
7556
7557 #ifdef CONFIG_PCI_IOV
7558 static int igb_sriov_reinit(struct pci_dev *dev)
7559 {
7560         struct net_device *netdev = pci_get_drvdata(dev);
7561         struct igb_adapter *adapter = netdev_priv(netdev);
7562         struct pci_dev *pdev = adapter->pdev;
7563
7564         rtnl_lock();
7565
7566         if (netif_running(netdev))
7567                 igb_close(netdev);
7568
7569         igb_clear_interrupt_scheme(adapter);
7570
7571         igb_init_queue_configuration(adapter);
7572
7573         if (igb_init_interrupt_scheme(adapter, true)) {
7574                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7575                 return -ENOMEM;
7576         }
7577
7578         if (netif_running(netdev))
7579                 igb_open(netdev);
7580
7581         rtnl_unlock();
7582
7583         return 0;
7584 }
7585
7586 static int igb_pci_disable_sriov(struct pci_dev *dev)
7587 {
7588         int err = igb_disable_sriov(dev);
7589
7590         if (!err)
7591                 err = igb_sriov_reinit(dev);
7592
7593         return err;
7594 }
7595
7596 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7597 {
7598         int err = igb_enable_sriov(dev, num_vfs);
7599
7600         if (err)
7601                 goto out;
7602
7603         err = igb_sriov_reinit(dev);
7604         if (!err)
7605                 return num_vfs;
7606
7607 out:
7608         return err;
7609 }
7610
7611 #endif
7612 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7613 {
7614 #ifdef CONFIG_PCI_IOV
7615         if (num_vfs == 0)
7616                 return igb_pci_disable_sriov(dev);
7617         else
7618                 return igb_pci_enable_sriov(dev, num_vfs);
7619 #endif
7620         return 0;
7621 }
7622
7623 #ifdef CONFIG_NET_POLL_CONTROLLER
7624 /* Polling 'interrupt' - used by things like netconsole to send skbs
7625  * without having to re-enable interrupts. It's not called while
7626  * the interrupt routine is executing.
7627  */
7628 static void igb_netpoll(struct net_device *netdev)
7629 {
7630         struct igb_adapter *adapter = netdev_priv(netdev);
7631         struct e1000_hw *hw = &adapter->hw;
7632         struct igb_q_vector *q_vector;
7633         int i;
7634
7635         for (i = 0; i < adapter->num_q_vectors; i++) {
7636                 q_vector = adapter->q_vector[i];
7637                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7638                         wr32(E1000_EIMC, q_vector->eims_value);
7639                 else
7640                         igb_irq_disable(adapter);
7641                 napi_schedule(&q_vector->napi);
7642         }
7643 }
7644 #endif /* CONFIG_NET_POLL_CONTROLLER */
7645
7646 /**
7647  *  igb_io_error_detected - called when PCI error is detected
7648  *  @pdev: Pointer to PCI device
7649  *  @state: The current pci connection state
7650  *
7651  *  This function is called after a PCI bus error affecting
7652  *  this device has been detected.
7653  **/
7654 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7655                                               pci_channel_state_t state)
7656 {
7657         struct net_device *netdev = pci_get_drvdata(pdev);
7658         struct igb_adapter *adapter = netdev_priv(netdev);
7659
7660         netif_device_detach(netdev);
7661
7662         if (state == pci_channel_io_perm_failure)
7663                 return PCI_ERS_RESULT_DISCONNECT;
7664
7665         if (netif_running(netdev))
7666                 igb_down(adapter);
7667         pci_disable_device(pdev);
7668
7669         /* Request a slot slot reset. */
7670         return PCI_ERS_RESULT_NEED_RESET;
7671 }
7672
7673 /**
7674  *  igb_io_slot_reset - called after the pci bus has been reset.
7675  *  @pdev: Pointer to PCI device
7676  *
7677  *  Restart the card from scratch, as if from a cold-boot. Implementation
7678  *  resembles the first-half of the igb_resume routine.
7679  **/
7680 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7681 {
7682         struct net_device *netdev = pci_get_drvdata(pdev);
7683         struct igb_adapter *adapter = netdev_priv(netdev);
7684         struct e1000_hw *hw = &adapter->hw;
7685         pci_ers_result_t result;
7686         int err;
7687
7688         if (pci_enable_device_mem(pdev)) {
7689                 dev_err(&pdev->dev,
7690                         "Cannot re-enable PCI device after reset.\n");
7691                 result = PCI_ERS_RESULT_DISCONNECT;
7692         } else {
7693                 pci_set_master(pdev);
7694                 pci_restore_state(pdev);
7695                 pci_save_state(pdev);
7696
7697                 pci_enable_wake(pdev, PCI_D3hot, 0);
7698                 pci_enable_wake(pdev, PCI_D3cold, 0);
7699
7700                 igb_reset(adapter);
7701                 wr32(E1000_WUS, ~0);
7702                 result = PCI_ERS_RESULT_RECOVERED;
7703         }
7704
7705         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7706         if (err) {
7707                 dev_err(&pdev->dev,
7708                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7709                         err);
7710                 /* non-fatal, continue */
7711         }
7712
7713         return result;
7714 }
7715
7716 /**
7717  *  igb_io_resume - called when traffic can start flowing again.
7718  *  @pdev: Pointer to PCI device
7719  *
7720  *  This callback is called when the error recovery driver tells us that
7721  *  its OK to resume normal operation. Implementation resembles the
7722  *  second-half of the igb_resume routine.
7723  */
7724 static void igb_io_resume(struct pci_dev *pdev)
7725 {
7726         struct net_device *netdev = pci_get_drvdata(pdev);
7727         struct igb_adapter *adapter = netdev_priv(netdev);
7728
7729         if (netif_running(netdev)) {
7730                 if (igb_up(adapter)) {
7731                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7732                         return;
7733                 }
7734         }
7735
7736         netif_device_attach(netdev);
7737
7738         /* let the f/w know that the h/w is now under the control of the
7739          * driver.
7740          */
7741         igb_get_hw_control(adapter);
7742 }
7743
7744 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7745                              u8 qsel)
7746 {
7747         u32 rar_low, rar_high;
7748         struct e1000_hw *hw = &adapter->hw;
7749
7750         /* HW expects these in little endian so we reverse the byte order
7751          * from network order (big endian) to little endian
7752          */
7753         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7754                    ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7755         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7756
7757         /* Indicate to hardware the Address is Valid. */
7758         rar_high |= E1000_RAH_AV;
7759
7760         if (hw->mac.type == e1000_82575)
7761                 rar_high |= E1000_RAH_POOL_1 * qsel;
7762         else
7763                 rar_high |= E1000_RAH_POOL_1 << qsel;
7764
7765         wr32(E1000_RAL(index), rar_low);
7766         wrfl();
7767         wr32(E1000_RAH(index), rar_high);
7768         wrfl();
7769 }
7770
7771 static int igb_set_vf_mac(struct igb_adapter *adapter,
7772                           int vf, unsigned char *mac_addr)
7773 {
7774         struct e1000_hw *hw = &adapter->hw;
7775         /* VF MAC addresses start at end of receive addresses and moves
7776          * towards the first, as a result a collision should not be possible
7777          */
7778         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7779
7780         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7781
7782         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7783
7784         return 0;
7785 }
7786
7787 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7788 {
7789         struct igb_adapter *adapter = netdev_priv(netdev);
7790         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7791                 return -EINVAL;
7792         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7793         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7794         dev_info(&adapter->pdev->dev,
7795                  "Reload the VF driver to make this change effective.");
7796         if (test_bit(__IGB_DOWN, &adapter->state)) {
7797                 dev_warn(&adapter->pdev->dev,
7798                          "The VF MAC address has been set, but the PF device is not up.\n");
7799                 dev_warn(&adapter->pdev->dev,
7800                          "Bring the PF device up before attempting to use the VF device.\n");
7801         }
7802         return igb_set_vf_mac(adapter, vf, mac);
7803 }
7804
7805 static int igb_link_mbps(int internal_link_speed)
7806 {
7807         switch (internal_link_speed) {
7808         case SPEED_100:
7809                 return 100;
7810         case SPEED_1000:
7811                 return 1000;
7812         default:
7813                 return 0;
7814         }
7815 }
7816
7817 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7818                                   int link_speed)
7819 {
7820         int rf_dec, rf_int;
7821         u32 bcnrc_val;
7822
7823         if (tx_rate != 0) {
7824                 /* Calculate the rate factor values to set */
7825                 rf_int = link_speed / tx_rate;
7826                 rf_dec = (link_speed - (rf_int * tx_rate));
7827                 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7828                          tx_rate;
7829
7830                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7831                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7832                               E1000_RTTBCNRC_RF_INT_MASK);
7833                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7834         } else {
7835                 bcnrc_val = 0;
7836         }
7837
7838         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7839         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7840          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7841          */
7842         wr32(E1000_RTTBCNRM, 0x14);
7843         wr32(E1000_RTTBCNRC, bcnrc_val);
7844 }
7845
7846 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7847 {
7848         int actual_link_speed, i;
7849         bool reset_rate = false;
7850
7851         /* VF TX rate limit was not set or not supported */
7852         if ((adapter->vf_rate_link_speed == 0) ||
7853             (adapter->hw.mac.type != e1000_82576))
7854                 return;
7855
7856         actual_link_speed = igb_link_mbps(adapter->link_speed);
7857         if (actual_link_speed != adapter->vf_rate_link_speed) {
7858                 reset_rate = true;
7859                 adapter->vf_rate_link_speed = 0;
7860                 dev_info(&adapter->pdev->dev,
7861                          "Link speed has been changed. VF Transmit rate is disabled\n");
7862         }
7863
7864         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7865                 if (reset_rate)
7866                         adapter->vf_data[i].tx_rate = 0;
7867
7868                 igb_set_vf_rate_limit(&adapter->hw, i,
7869                                       adapter->vf_data[i].tx_rate,
7870                                       actual_link_speed);
7871         }
7872 }
7873
7874 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7875 {
7876         struct igb_adapter *adapter = netdev_priv(netdev);
7877         struct e1000_hw *hw = &adapter->hw;
7878         int actual_link_speed;
7879
7880         if (hw->mac.type != e1000_82576)
7881                 return -EOPNOTSUPP;
7882
7883         actual_link_speed = igb_link_mbps(adapter->link_speed);
7884         if ((vf >= adapter->vfs_allocated_count) ||
7885             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7886             (tx_rate < 0) || (tx_rate > actual_link_speed))
7887                 return -EINVAL;
7888
7889         adapter->vf_rate_link_speed = actual_link_speed;
7890         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7891         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7892
7893         return 0;
7894 }
7895
7896 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7897                                    bool setting)
7898 {
7899         struct igb_adapter *adapter = netdev_priv(netdev);
7900         struct e1000_hw *hw = &adapter->hw;
7901         u32 reg_val, reg_offset;
7902
7903         if (!adapter->vfs_allocated_count)
7904                 return -EOPNOTSUPP;
7905
7906         if (vf >= adapter->vfs_allocated_count)
7907                 return -EINVAL;
7908
7909         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7910         reg_val = rd32(reg_offset);
7911         if (setting)
7912                 reg_val |= ((1 << vf) |
7913                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7914         else
7915                 reg_val &= ~((1 << vf) |
7916                              (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7917         wr32(reg_offset, reg_val);
7918
7919         adapter->vf_data[vf].spoofchk_enabled = setting;
7920         return E1000_SUCCESS;
7921 }
7922
7923 static int igb_ndo_get_vf_config(struct net_device *netdev,
7924                                  int vf, struct ifla_vf_info *ivi)
7925 {
7926         struct igb_adapter *adapter = netdev_priv(netdev);
7927         if (vf >= adapter->vfs_allocated_count)
7928                 return -EINVAL;
7929         ivi->vf = vf;
7930         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7931         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7932         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7933         ivi->qos = adapter->vf_data[vf].pf_qos;
7934         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7935         return 0;
7936 }
7937
7938 static void igb_vmm_control(struct igb_adapter *adapter)
7939 {
7940         struct e1000_hw *hw = &adapter->hw;
7941         u32 reg;
7942
7943         switch (hw->mac.type) {
7944         case e1000_82575:
7945         case e1000_i210:
7946         case e1000_i211:
7947         case e1000_i354:
7948         default:
7949                 /* replication is not supported for 82575 */
7950                 return;
7951         case e1000_82576:
7952                 /* notify HW that the MAC is adding vlan tags */
7953                 reg = rd32(E1000_DTXCTL);
7954                 reg |= E1000_DTXCTL_VLAN_ADDED;
7955                 wr32(E1000_DTXCTL, reg);
7956         case e1000_82580:
7957                 /* enable replication vlan tag stripping */
7958                 reg = rd32(E1000_RPLOLR);
7959                 reg |= E1000_RPLOLR_STRVLAN;
7960                 wr32(E1000_RPLOLR, reg);
7961         case e1000_i350:
7962                 /* none of the above registers are supported by i350 */
7963                 break;
7964         }
7965
7966         if (adapter->vfs_allocated_count) {
7967                 igb_vmdq_set_loopback_pf(hw, true);
7968                 igb_vmdq_set_replication_pf(hw, true);
7969                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7970                                               adapter->vfs_allocated_count);
7971         } else {
7972                 igb_vmdq_set_loopback_pf(hw, false);
7973                 igb_vmdq_set_replication_pf(hw, false);
7974         }
7975 }
7976
7977 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7978 {
7979         struct e1000_hw *hw = &adapter->hw;
7980         u32 dmac_thr;
7981         u16 hwm;
7982
7983         if (hw->mac.type > e1000_82580) {
7984                 if (adapter->flags & IGB_FLAG_DMAC) {
7985                         u32 reg;
7986
7987                         /* force threshold to 0. */
7988                         wr32(E1000_DMCTXTH, 0);
7989
7990                         /* DMA Coalescing high water mark needs to be greater
7991                          * than the Rx threshold. Set hwm to PBA - max frame
7992                          * size in 16B units, capping it at PBA - 6KB.
7993                          */
7994                         hwm = 64 * pba - adapter->max_frame_size / 16;
7995                         if (hwm < 64 * (pba - 6))
7996                                 hwm = 64 * (pba - 6);
7997                         reg = rd32(E1000_FCRTC);
7998                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7999                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
8000                                 & E1000_FCRTC_RTH_COAL_MASK);
8001                         wr32(E1000_FCRTC, reg);
8002
8003                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8004                          * frame size, capping it at PBA - 10KB.
8005                          */
8006                         dmac_thr = pba - adapter->max_frame_size / 512;
8007                         if (dmac_thr < pba - 10)
8008                                 dmac_thr = pba - 10;
8009                         reg = rd32(E1000_DMACR);
8010                         reg &= ~E1000_DMACR_DMACTHR_MASK;
8011                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
8012                                 & E1000_DMACR_DMACTHR_MASK);
8013
8014                         /* transition to L0x or L1 if available..*/
8015                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
8016
8017                         /* watchdog timer= +-1000 usec in 32usec intervals */
8018                         reg |= (1000 >> 5);
8019
8020                         /* Disable BMC-to-OS Watchdog Enable */
8021                         if (hw->mac.type != e1000_i354)
8022                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
8023
8024                         wr32(E1000_DMACR, reg);
8025
8026                         /* no lower threshold to disable
8027                          * coalescing(smart fifb)-UTRESH=0
8028                          */
8029                         wr32(E1000_DMCRTRH, 0);
8030
8031                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
8032
8033                         wr32(E1000_DMCTLX, reg);
8034
8035                         /* free space in tx packet buffer to wake from
8036                          * DMA coal
8037                          */
8038                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
8039                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
8040
8041                         /* make low power state decision controlled
8042                          * by DMA coal
8043                          */
8044                         reg = rd32(E1000_PCIEMISC);
8045                         reg &= ~E1000_PCIEMISC_LX_DECISION;
8046                         wr32(E1000_PCIEMISC, reg);
8047                 } /* endif adapter->dmac is not disabled */
8048         } else if (hw->mac.type == e1000_82580) {
8049                 u32 reg = rd32(E1000_PCIEMISC);
8050                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8051                 wr32(E1000_DMACR, 0);
8052         }
8053 }
8054
8055 /**
8056  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8057  *  @hw: pointer to hardware structure
8058  *  @byte_offset: byte offset to read
8059  *  @dev_addr: device address
8060  *  @data: value read
8061  *
8062  *  Performs byte read operation over I2C interface at
8063  *  a specified device address.
8064  **/
8065 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8066                       u8 dev_addr, u8 *data)
8067 {
8068         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8069         struct i2c_client *this_client = adapter->i2c_client;
8070         s32 status;
8071         u16 swfw_mask = 0;
8072
8073         if (!this_client)
8074                 return E1000_ERR_I2C;
8075
8076         swfw_mask = E1000_SWFW_PHY0_SM;
8077
8078         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
8079             != E1000_SUCCESS)
8080                 return E1000_ERR_SWFW_SYNC;
8081
8082         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8083         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8084
8085         if (status < 0)
8086                 return E1000_ERR_I2C;
8087         else {
8088                 *data = status;
8089                 return E1000_SUCCESS;
8090         }
8091 }
8092
8093 /**
8094  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8095  *  @hw: pointer to hardware structure
8096  *  @byte_offset: byte offset to write
8097  *  @dev_addr: device address
8098  *  @data: value to write
8099  *
8100  *  Performs byte write operation over I2C interface at
8101  *  a specified device address.
8102  **/
8103 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8104                        u8 dev_addr, u8 data)
8105 {
8106         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8107         struct i2c_client *this_client = adapter->i2c_client;
8108         s32 status;
8109         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8110
8111         if (!this_client)
8112                 return E1000_ERR_I2C;
8113
8114         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
8115                 return E1000_ERR_SWFW_SYNC;
8116         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8117         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8118
8119         if (status)
8120                 return E1000_ERR_I2C;
8121         else
8122                 return E1000_SUCCESS;
8123
8124 }
8125
8126 int igb_reinit_queues(struct igb_adapter *adapter)
8127 {
8128         struct net_device *netdev = adapter->netdev;
8129         struct pci_dev *pdev = adapter->pdev;
8130         int err = 0;
8131
8132         if (netif_running(netdev))
8133                 igb_close(netdev);
8134
8135         igb_reset_interrupt_capability(adapter);
8136
8137         if (igb_init_interrupt_scheme(adapter, true)) {
8138                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8139                 return -ENOMEM;
8140         }
8141
8142         if (netif_running(netdev))
8143                 err = igb_open(netdev);
8144
8145         return err;
8146 }
8147 /* igb_main.c */