2 * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <linux/netdevice.h>
37 #include <linux/vmalloc.h>
38 #include <linux/delay.h>
39 #include <linux/idr.h>
40 #include <linux/module.h>
41 #include <linux/printk.h>
42 #ifdef CONFIG_INFINIBAND_QIB_DCA
43 #include <linux/dca.h>
47 #include "qib_common.h"
51 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
54 * min buffers we want to have per context, after driver
56 #define QIB_MIN_USER_CTXT_BUFCNT 7
58 #define QLOGIC_IB_R_SOFTWARE_MASK 0xFF
59 #define QLOGIC_IB_R_SOFTWARE_SHIFT 24
60 #define QLOGIC_IB_R_EMULATOR_MASK (1ULL<<62)
63 * Number of ctxts we are configured to use (to allow for more pio
64 * buffers per ctxt, etc.) Zero means use chip value.
67 module_param_named(cfgctxts, qib_cfgctxts, ushort, S_IRUGO);
68 MODULE_PARM_DESC(cfgctxts, "Set max number of contexts to use");
70 unsigned qib_numa_aware;
71 module_param_named(numa_aware, qib_numa_aware, uint, S_IRUGO);
72 MODULE_PARM_DESC(numa_aware,
73 "0 -> PSM allocation close to HCA, 1 -> PSM allocation local to process");
76 * If set, do not write to any regs if avoidable, hack to allow
77 * check for deranged default register values.
80 module_param_named(mini_init, qib_mini_init, ushort, S_IRUGO);
81 MODULE_PARM_DESC(mini_init, "If set, do minimal diag init");
83 unsigned qib_n_krcv_queues;
84 module_param_named(krcvqs, qib_n_krcv_queues, uint, S_IRUGO);
85 MODULE_PARM_DESC(krcvqs, "number of kernel receive queues per IB port");
87 unsigned qib_cc_table_size;
88 module_param_named(cc_table_size, qib_cc_table_size, uint, S_IRUGO);
89 MODULE_PARM_DESC(cc_table_size, "Congestion control table entries 0 (CCA disabled - default), min = 128, max = 1984");
91 * qib_wc_pat parameter:
94 * If PAT initialization fails, code reverts back to MTRR
96 unsigned qib_wc_pat = 1; /* default (1) is to use PAT, not MTRR */
97 module_param_named(wc_pat, qib_wc_pat, uint, S_IRUGO);
98 MODULE_PARM_DESC(wc_pat, "enable write-combining via PAT mechanism");
100 static void verify_interrupt(unsigned long);
102 static struct idr qib_unit_table;
103 u32 qib_cpulist_count;
104 unsigned long *qib_cpulist;
106 /* set number of contexts we'll actually use */
107 void qib_set_ctxtcnt(struct qib_devdata *dd)
110 dd->cfgctxts = dd->first_user_ctxt + num_online_cpus();
111 if (dd->cfgctxts > dd->ctxtcnt)
112 dd->cfgctxts = dd->ctxtcnt;
113 } else if (qib_cfgctxts < dd->num_pports)
114 dd->cfgctxts = dd->ctxtcnt;
115 else if (qib_cfgctxts <= dd->ctxtcnt)
116 dd->cfgctxts = qib_cfgctxts;
118 dd->cfgctxts = dd->ctxtcnt;
119 dd->freectxts = (dd->first_user_ctxt > dd->cfgctxts) ? 0 :
120 dd->cfgctxts - dd->first_user_ctxt;
124 * Common code for creating the receive context array.
126 int qib_create_ctxts(struct qib_devdata *dd)
130 int local_node_id = pcibus_to_node(dd->pcidev->bus);
132 if (local_node_id < 0)
133 local_node_id = numa_node_id();
134 dd->assigned_node_id = local_node_id;
137 * Allocate full ctxtcnt array, rather than just cfgctxts, because
138 * cleanup iterates across all possible ctxts.
140 dd->rcd = kzalloc(sizeof(*dd->rcd) * dd->ctxtcnt, GFP_KERNEL);
143 "Unable to allocate ctxtdata array, failing\n");
148 /* create (one or more) kctxt */
149 for (i = 0; i < dd->first_user_ctxt; ++i) {
150 struct qib_pportdata *ppd;
151 struct qib_ctxtdata *rcd;
153 if (dd->skip_kctxt_mask & (1 << i))
156 ppd = dd->pport + (i % dd->num_pports);
158 rcd = qib_create_ctxtdata(ppd, i, dd->assigned_node_id);
161 "Unable to allocate ctxtdata for Kernel ctxt, failing\n");
165 rcd->pkeys[0] = QIB_DEFAULT_P_KEY;
174 * Common code for user and kernel context setup.
176 struct qib_ctxtdata *qib_create_ctxtdata(struct qib_pportdata *ppd, u32 ctxt,
179 struct qib_devdata *dd = ppd->dd;
180 struct qib_ctxtdata *rcd;
182 rcd = kzalloc_node(sizeof(*rcd), GFP_KERNEL, node_id);
184 INIT_LIST_HEAD(&rcd->qp_wait_list);
185 rcd->node_id = node_id;
192 dd->f_init_ctxt(rcd);
195 * To avoid wasting a lot of memory, we allocate 32KB chunks
196 * of physically contiguous memory, advance through it until
197 * used up and then allocate more. Of course, we need
198 * memory to store those extra pointers, now. 32KB seems to
199 * be the most that is "safe" under memory pressure
200 * (creating large files and then copying them over
201 * NFS while doing lots of MPI jobs). The OOM killer can
202 * get invoked, even though we say we can sleep and this can
203 * cause significant system problems....
205 rcd->rcvegrbuf_size = 0x8000;
206 rcd->rcvegrbufs_perchunk =
207 rcd->rcvegrbuf_size / dd->rcvegrbufsize;
208 rcd->rcvegrbuf_chunks = (rcd->rcvegrcnt +
209 rcd->rcvegrbufs_perchunk - 1) /
210 rcd->rcvegrbufs_perchunk;
211 BUG_ON(!is_power_of_2(rcd->rcvegrbufs_perchunk));
212 rcd->rcvegrbufs_perchunk_shift =
213 ilog2(rcd->rcvegrbufs_perchunk);
219 * Common code for initializing the physical port structure.
221 void qib_init_pportdata(struct qib_pportdata *ppd, struct qib_devdata *dd,
226 ppd->hw_pidx = hw_pidx;
227 ppd->port = port; /* IB port number, not index */
229 spin_lock_init(&ppd->sdma_lock);
230 spin_lock_init(&ppd->lflags_lock);
231 init_waitqueue_head(&ppd->state_wait);
233 init_timer(&ppd->symerr_clear_timer);
234 ppd->symerr_clear_timer.function = qib_clear_symerror_on_linkup;
235 ppd->symerr_clear_timer.data = (unsigned long)ppd;
239 spin_lock_init(&ppd->cc_shadow_lock);
241 if (qib_cc_table_size < IB_CCT_MIN_ENTRIES)
244 ppd->cc_supported_table_entries = min(max_t(int, qib_cc_table_size,
245 IB_CCT_MIN_ENTRIES), IB_CCT_ENTRIES*IB_CC_TABLE_CAP_DEFAULT);
247 ppd->cc_max_table_entries =
248 ppd->cc_supported_table_entries/IB_CCT_ENTRIES;
250 size = IB_CC_TABLE_CAP_DEFAULT * sizeof(struct ib_cc_table_entry)
252 ppd->ccti_entries = kzalloc(size, GFP_KERNEL);
253 if (!ppd->ccti_entries) {
255 "failed to allocate congestion control table for port %d!\n",
260 size = IB_CC_CCS_ENTRIES * sizeof(struct ib_cc_congestion_entry);
261 ppd->congestion_entries = kzalloc(size, GFP_KERNEL);
262 if (!ppd->congestion_entries) {
264 "failed to allocate congestion setting list for port %d!\n",
269 size = sizeof(struct cc_table_shadow);
270 ppd->ccti_entries_shadow = kzalloc(size, GFP_KERNEL);
271 if (!ppd->ccti_entries_shadow) {
273 "failed to allocate shadow ccti list for port %d!\n",
278 size = sizeof(struct ib_cc_congestion_setting_attr);
279 ppd->congestion_entries_shadow = kzalloc(size, GFP_KERNEL);
280 if (!ppd->congestion_entries_shadow) {
282 "failed to allocate shadow congestion setting list for port %d!\n",
290 kfree(ppd->ccti_entries_shadow);
291 ppd->ccti_entries_shadow = NULL;
293 kfree(ppd->congestion_entries);
294 ppd->congestion_entries = NULL;
296 kfree(ppd->ccti_entries);
297 ppd->ccti_entries = NULL;
299 /* User is intentionally disabling the congestion control agent */
300 if (!qib_cc_table_size)
303 if (qib_cc_table_size < IB_CCT_MIN_ENTRIES) {
304 qib_cc_table_size = 0;
306 "Congestion Control table size %d less than minimum %d for port %d\n",
307 qib_cc_table_size, IB_CCT_MIN_ENTRIES, port);
310 qib_dev_err(dd, "Congestion Control Agent disabled for port %d\n",
315 static int init_pioavailregs(struct qib_devdata *dd)
320 dd->pioavailregs_dma = dma_alloc_coherent(
321 &dd->pcidev->dev, PAGE_SIZE, &dd->pioavailregs_phys,
323 if (!dd->pioavailregs_dma) {
325 "failed to allocate PIOavail reg area in memory\n");
331 * We really want L2 cache aligned, but for current CPUs of
332 * interest, they are the same.
334 status_page = (u64 *)
335 ((char *) dd->pioavailregs_dma +
336 ((2 * L1_CACHE_BYTES +
337 dd->pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES));
338 /* device status comes first, for backwards compatibility */
339 dd->devstatusp = status_page;
341 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
342 dd->pport[pidx].statusp = status_page;
347 * Setup buffer to hold freeze and other messages, accessible to
348 * apps, following statusp. This is per-unit, not per port.
350 dd->freezemsg = (char *) status_page;
352 /* length of msg buffer is "whatever is left" */
353 ret = (char *) status_page - (char *) dd->pioavailregs_dma;
354 dd->freezelen = PAGE_SIZE - ret;
363 * init_shadow_tids - allocate the shadow TID array
364 * @dd: the qlogic_ib device
366 * allocate the shadow TID array, so we can qib_munlock previous
367 * entries. It may make more sense to move the pageshadow to the
368 * ctxt data structure, so we only allocate memory for ctxts actually
369 * in use, since we at 8k per ctxt, now.
370 * We don't want failures here to prevent use of the driver/chip,
371 * so no return value.
373 static void init_shadow_tids(struct qib_devdata *dd)
378 pages = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *));
381 "failed to allocate shadow page * array, no expected sends!\n");
385 addrs = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t));
388 "failed to allocate shadow dma handle array, no expected sends!\n");
392 dd->pageshadow = pages;
393 dd->physshadow = addrs;
399 dd->pageshadow = NULL;
403 * Do initialization for device that is only needed on
404 * first detect, not on resets.
406 static int loadtime_init(struct qib_devdata *dd)
410 if (((dd->revision >> QLOGIC_IB_R_SOFTWARE_SHIFT) &
411 QLOGIC_IB_R_SOFTWARE_MASK) != QIB_CHIP_SWVERSION) {
413 "Driver only handles version %d, chip swversion is %d (%llx), failng\n",
415 (int)(dd->revision >>
416 QLOGIC_IB_R_SOFTWARE_SHIFT) &
417 QLOGIC_IB_R_SOFTWARE_MASK,
418 (unsigned long long) dd->revision);
423 if (dd->revision & QLOGIC_IB_R_EMULATOR_MASK)
424 qib_devinfo(dd->pcidev, "%s", dd->boardversion);
426 spin_lock_init(&dd->pioavail_lock);
427 spin_lock_init(&dd->sendctrl_lock);
428 spin_lock_init(&dd->uctxt_lock);
429 spin_lock_init(&dd->qib_diag_trans_lock);
430 spin_lock_init(&dd->eep_st_lock);
431 mutex_init(&dd->eep_lock);
436 ret = init_pioavailregs(dd);
437 init_shadow_tids(dd);
439 qib_get_eeprom_info(dd);
441 /* setup time (don't start yet) to verify we got interrupt */
442 init_timer(&dd->intrchk_timer);
443 dd->intrchk_timer.function = verify_interrupt;
444 dd->intrchk_timer.data = (unsigned long) dd;
446 ret = qib_cq_init(dd);
452 * init_after_reset - re-initialize after a reset
453 * @dd: the qlogic_ib device
455 * sanity check at least some of the values after reset, and
456 * ensure no receive or transmit (explicitly, in case reset
459 static int init_after_reset(struct qib_devdata *dd)
464 * Ensure chip does no sends or receives, tail updates, or
465 * pioavail updates while we re-initialize. This is mostly
466 * for the driver data structures, not chip registers.
468 for (i = 0; i < dd->num_pports; ++i) {
470 * ctxt == -1 means "all contexts". Only really safe for
471 * _dis_abling things, as here.
473 dd->f_rcvctrl(dd->pport + i, QIB_RCVCTRL_CTXT_DIS |
474 QIB_RCVCTRL_INTRAVAIL_DIS |
475 QIB_RCVCTRL_TAILUPD_DIS, -1);
476 /* Redundant across ports for some, but no big deal. */
477 dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_DIS |
478 QIB_SENDCTRL_AVAIL_DIS);
484 static void enable_chip(struct qib_devdata *dd)
490 * Enable PIO send, and update of PIOavail regs to memory.
492 for (i = 0; i < dd->num_pports; ++i)
493 dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_ENB |
494 QIB_SENDCTRL_AVAIL_ENB);
496 * Enable kernel ctxts' receive and receive interrupt.
497 * Other ctxts done as user opens and inits them.
499 rcvmask = QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_INTRAVAIL_ENB;
500 rcvmask |= (dd->flags & QIB_NODMA_RTAIL) ?
501 QIB_RCVCTRL_TAILUPD_DIS : QIB_RCVCTRL_TAILUPD_ENB;
502 for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) {
503 struct qib_ctxtdata *rcd = dd->rcd[i];
506 dd->f_rcvctrl(rcd->ppd, rcvmask, i);
510 static void verify_interrupt(unsigned long opaque)
512 struct qib_devdata *dd = (struct qib_devdata *) opaque;
515 return; /* being torn down */
518 * If we don't have a lid or any interrupts, let the user know and
519 * don't bother checking again.
521 if (dd->int_counter == 0) {
522 if (!dd->f_intr_fallback(dd))
523 dev_err(&dd->pcidev->dev,
524 "No interrupts detected, not usable.\n");
525 else /* re-arm the timer to see if fallback works */
526 mod_timer(&dd->intrchk_timer, jiffies + HZ/2);
530 static void init_piobuf_state(struct qib_devdata *dd)
536 * Ensure all buffers are free, and fifos empty. Buffers
537 * are common, so only do once for port 0.
539 * After enable and qib_chg_pioavailkernel so we can safely
540 * enable pioavail updates and PIOENABLE. After this, packets
541 * are ready and able to go out.
543 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_ALL);
544 for (pidx = 0; pidx < dd->num_pports; ++pidx)
545 dd->f_sendctrl(dd->pport + pidx, QIB_SENDCTRL_FLUSH);
548 * If not all sendbufs are used, add the one to each of the lower
549 * numbered contexts. pbufsctxt and lastctxt_piobuf are
550 * calculated in chip-specific code because it may cause some
551 * chip-specific adjustments to be made.
553 uctxts = dd->cfgctxts - dd->first_user_ctxt;
554 dd->ctxts_extrabuf = dd->pbufsctxt ?
555 dd->lastctxt_piobuf - (dd->pbufsctxt * uctxts) : 0;
558 * Set up the shadow copies of the piobufavail registers,
559 * which we compare against the chip registers for now, and
560 * the in memory DMA'ed copies of the registers.
561 * By now pioavail updates to memory should have occurred, so
562 * copy them into our working/shadow registers; this is in
563 * case something went wrong with abort, but mostly to get the
564 * initial values of the generation bit correct.
566 for (i = 0; i < dd->pioavregs; i++) {
569 tmp = dd->pioavailregs_dma[i];
571 * Don't need to worry about pioavailkernel here
572 * because we will call qib_chg_pioavailkernel() later
573 * in initialization, to busy out buffers as needed.
575 dd->pioavailshadow[i] = le64_to_cpu(tmp);
577 while (i < ARRAY_SIZE(dd->pioavailshadow))
578 dd->pioavailshadow[i++] = 0; /* for debugging sanity */
580 /* after pioavailshadow is setup */
581 qib_chg_pioavailkernel(dd, 0, dd->piobcnt2k + dd->piobcnt4k,
582 TXCHK_CHG_TYPE_KERN, NULL);
583 dd->f_initvl15_bufs(dd);
587 * qib_create_workqueues - create per port workqueues
588 * @dd: the qlogic_ib device
590 static int qib_create_workqueues(struct qib_devdata *dd)
593 struct qib_pportdata *ppd;
595 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
596 ppd = dd->pport + pidx;
598 char wq_name[8]; /* 3 + 2 + 1 + 1 + 1 */
599 snprintf(wq_name, sizeof(wq_name), "qib%d_%d",
602 create_singlethread_workqueue(wq_name);
609 pr_err("create_singlethread_workqueue failed for port %d\n",
611 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
612 ppd = dd->pport + pidx;
614 destroy_workqueue(ppd->qib_wq);
622 * qib_init - do the actual initialization sequence on the chip
623 * @dd: the qlogic_ib device
624 * @reinit: reinitializing, so don't allocate new memory
626 * Do the actual initialization sequence on the chip. This is done
627 * both from the init routine called from the PCI infrastructure, and
628 * when we reset the chip, or detect that it was reset internally,
629 * or it's administratively re-enabled.
631 * Memory allocation here and in called routines is only done in
632 * the first case (reinit == 0). We have to be careful, because even
633 * without memory allocation, we need to re-write all the chip registers
634 * TIDs, etc. after the reset or enable has completed.
636 int qib_init(struct qib_devdata *dd, int reinit)
638 int ret = 0, pidx, lastfail = 0;
641 struct qib_ctxtdata *rcd;
642 struct qib_pportdata *ppd;
645 /* Set linkstate to unknown, so we can watch for a transition. */
646 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
647 ppd = dd->pport + pidx;
648 spin_lock_irqsave(&ppd->lflags_lock, flags);
649 ppd->lflags &= ~(QIBL_LINKACTIVE | QIBL_LINKARMED |
650 QIBL_LINKDOWN | QIBL_LINKINIT |
652 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
656 ret = init_after_reset(dd);
658 ret = loadtime_init(dd);
662 /* Bypass most chip-init, to get to device creation */
666 ret = dd->f_late_initreg(dd);
670 /* dd->rcd can be NULL if early init failed */
671 for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) {
673 * Set up the (kernel) rcvhdr queue and egr TIDs. If doing
674 * re-init, the simplest way to handle this is to free
675 * existing, and re-allocate.
676 * Need to re-create rest of ctxt 0 ctxtdata as well.
682 lastfail = qib_create_rcvhdrq(dd, rcd);
684 lastfail = qib_setup_eagerbufs(rcd);
687 "failed to allocate kernel ctxt's rcvhdrq and/or egr bufs\n");
692 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
696 ppd = dd->pport + pidx;
697 mtu = ib_mtu_enum_to_int(qib_ibmtu);
699 mtu = QIB_DEFAULT_MTU;
700 qib_ibmtu = 0; /* don't leave invalid value */
702 /* set max we can ever have for this driver load */
703 ppd->init_ibmaxlen = min(mtu > 2048 ?
704 dd->piosize4k : dd->piosize2k,
706 (dd->rcvhdrentsize << 2));
708 * Have to initialize ibmaxlen, but this will normally
709 * change immediately in qib_set_mtu().
711 ppd->ibmaxlen = ppd->init_ibmaxlen;
712 qib_set_mtu(ppd, mtu);
714 spin_lock_irqsave(&ppd->lflags_lock, flags);
715 ppd->lflags |= QIBL_IB_LINK_DISABLED;
716 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
718 lastfail = dd->f_bringup_serdes(ppd);
720 qib_devinfo(dd->pcidev,
721 "Failed to bringup IB port %u\n", ppd->port);
722 lastfail = -ENETDOWN;
730 /* none of the ports initialized */
731 if (!ret && lastfail)
735 /* but continue on, so we can debug cause */
740 init_piobuf_state(dd);
744 /* chip is OK for user apps; mark it as initialized */
745 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
746 ppd = dd->pport + pidx;
748 * Set status even if port serdes is not initialized
749 * so that diags will work.
751 *ppd->statusp |= QIB_STATUS_CHIP_PRESENT |
753 if (!ppd->link_speed_enabled)
755 if (dd->flags & QIB_HAS_SEND_DMA)
756 ret = qib_setup_sdma(ppd);
757 init_timer(&ppd->hol_timer);
758 ppd->hol_timer.function = qib_hol_event;
759 ppd->hol_timer.data = (unsigned long)ppd;
760 ppd->hol_state = QIB_HOL_UP;
763 /* now we can enable all interrupts from the chip */
764 dd->f_set_intr_state(dd, 1);
767 * Setup to verify we get an interrupt, and fallback
768 * to an alternate if necessary and possible.
770 mod_timer(&dd->intrchk_timer, jiffies + HZ/2);
771 /* start stats retrieval timer */
772 mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER);
775 /* if ret is non-zero, we probably should do some cleanup here... */
780 * These next two routines are placeholders in case we don't have per-arch
781 * code for controlling write combining. If explicit control of write
782 * combining is not available, performance will probably be awful.
785 int __attribute__((weak)) qib_enable_wc(struct qib_devdata *dd)
790 void __attribute__((weak)) qib_disable_wc(struct qib_devdata *dd)
794 static inline struct qib_devdata *__qib_lookup(int unit)
796 return idr_find(&qib_unit_table, unit);
799 struct qib_devdata *qib_lookup(int unit)
801 struct qib_devdata *dd;
804 spin_lock_irqsave(&qib_devs_lock, flags);
805 dd = __qib_lookup(unit);
806 spin_unlock_irqrestore(&qib_devs_lock, flags);
812 * Stop the timers during unit shutdown, or after an error late
815 static void qib_stop_timers(struct qib_devdata *dd)
817 struct qib_pportdata *ppd;
820 if (dd->stats_timer.data) {
821 del_timer_sync(&dd->stats_timer);
822 dd->stats_timer.data = 0;
824 if (dd->intrchk_timer.data) {
825 del_timer_sync(&dd->intrchk_timer);
826 dd->intrchk_timer.data = 0;
828 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
829 ppd = dd->pport + pidx;
830 if (ppd->hol_timer.data)
831 del_timer_sync(&ppd->hol_timer);
832 if (ppd->led_override_timer.data) {
833 del_timer_sync(&ppd->led_override_timer);
834 atomic_set(&ppd->led_override_timer_active, 0);
836 if (ppd->symerr_clear_timer.data)
837 del_timer_sync(&ppd->symerr_clear_timer);
842 * qib_shutdown_device - shut down a device
843 * @dd: the qlogic_ib device
845 * This is called to make the device quiet when we are about to
846 * unload the driver, and also when the device is administratively
847 * disabled. It does not free any data structures.
848 * Everything it does has to be setup again by qib_init(dd, 1)
850 static void qib_shutdown_device(struct qib_devdata *dd)
852 struct qib_pportdata *ppd;
855 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
856 ppd = dd->pport + pidx;
858 spin_lock_irq(&ppd->lflags_lock);
859 ppd->lflags &= ~(QIBL_LINKDOWN | QIBL_LINKINIT |
860 QIBL_LINKARMED | QIBL_LINKACTIVE |
862 spin_unlock_irq(&ppd->lflags_lock);
863 *ppd->statusp &= ~(QIB_STATUS_IB_CONF | QIB_STATUS_IB_READY);
865 dd->flags &= ~QIB_INITTED;
867 /* mask interrupts, but not errors */
868 dd->f_set_intr_state(dd, 0);
870 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
871 ppd = dd->pport + pidx;
872 dd->f_rcvctrl(ppd, QIB_RCVCTRL_TAILUPD_DIS |
873 QIB_RCVCTRL_CTXT_DIS |
874 QIB_RCVCTRL_INTRAVAIL_DIS |
875 QIB_RCVCTRL_PKEY_ENB, -1);
877 * Gracefully stop all sends allowing any in progress to
880 dd->f_sendctrl(ppd, QIB_SENDCTRL_CLEAR);
884 * Enough for anything that's going to trickle out to have actually
889 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
890 ppd = dd->pport + pidx;
891 dd->f_setextled(ppd, 0); /* make sure LEDs are off */
893 if (dd->flags & QIB_HAS_SEND_DMA)
894 qib_teardown_sdma(ppd);
896 dd->f_sendctrl(ppd, QIB_SENDCTRL_AVAIL_DIS |
897 QIB_SENDCTRL_SEND_DIS);
899 * Clear SerdesEnable.
900 * We can't count on interrupts since we are stopping.
902 dd->f_quiet_serdes(ppd);
905 destroy_workqueue(ppd->qib_wq);
910 qib_update_eeprom_log(dd);
914 * qib_free_ctxtdata - free a context's allocated data
915 * @dd: the qlogic_ib device
916 * @rcd: the ctxtdata structure
918 * free up any allocated data for a context
919 * This should not touch anything that would affect a simultaneous
920 * re-allocation of context data, because it is called after qib_mutex
921 * is released (and can be called from reinit as well).
922 * It should never change any chip state, or global driver state.
924 void qib_free_ctxtdata(struct qib_devdata *dd, struct qib_ctxtdata *rcd)
930 dma_free_coherent(&dd->pcidev->dev, rcd->rcvhdrq_size,
931 rcd->rcvhdrq, rcd->rcvhdrq_phys);
933 if (rcd->rcvhdrtail_kvaddr) {
934 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
935 rcd->rcvhdrtail_kvaddr,
936 rcd->rcvhdrqtailaddr_phys);
937 rcd->rcvhdrtail_kvaddr = NULL;
940 if (rcd->rcvegrbuf) {
943 for (e = 0; e < rcd->rcvegrbuf_chunks; e++) {
944 void *base = rcd->rcvegrbuf[e];
945 size_t size = rcd->rcvegrbuf_size;
947 dma_free_coherent(&dd->pcidev->dev, size,
948 base, rcd->rcvegrbuf_phys[e]);
950 kfree(rcd->rcvegrbuf);
951 rcd->rcvegrbuf = NULL;
952 kfree(rcd->rcvegrbuf_phys);
953 rcd->rcvegrbuf_phys = NULL;
954 rcd->rcvegrbuf_chunks = 0;
957 kfree(rcd->tid_pg_list);
958 vfree(rcd->user_event_mask);
959 vfree(rcd->subctxt_uregbase);
960 vfree(rcd->subctxt_rcvegrbuf);
961 vfree(rcd->subctxt_rcvhdr_base);
966 * Perform a PIO buffer bandwidth write test, to verify proper system
967 * configuration. Even when all the setup calls work, occasionally
968 * BIOS or other issues can prevent write combining from working, or
969 * can cause other bandwidth problems to the chip.
971 * This test simply writes the same buffer over and over again, and
972 * measures close to the peak bandwidth to the chip (not testing
973 * data bandwidth to the wire). On chips that use an address-based
974 * trigger to send packets to the wire, this is easy. On chips that
975 * use a count to trigger, we want to make sure that the packet doesn't
976 * go out on the wire, or trigger flow control checks.
978 static void qib_verify_pioperf(struct qib_devdata *dd)
980 u32 pbnum, cnt, lcnt;
985 piobuf = dd->f_getsendbuf(dd->pport, 0ULL, &pbnum);
987 qib_devinfo(dd->pcidev,
988 "No PIObufs for checking perf, skipping\n");
993 * Enough to give us a reasonable test, less than piobuf size, and
994 * likely multiple of store buffer length.
1000 qib_devinfo(dd->pcidev,
1001 "Couldn't get memory for checking PIO perf,"
1006 preempt_disable(); /* we want reasonably accurate elapsed time */
1007 msecs = 1 + jiffies_to_msecs(jiffies);
1008 for (lcnt = 0; lcnt < 10000U; lcnt++) {
1009 /* wait until we cross msec boundary */
1010 if (jiffies_to_msecs(jiffies) >= msecs)
1015 dd->f_set_armlaunch(dd, 0);
1018 * length 0, no dwords actually sent
1024 * This is only roughly accurate, since even with preempt we
1025 * still take interrupts that could take a while. Running for
1026 * >= 5 msec seems to get us "close enough" to accurate values.
1028 msecs = jiffies_to_msecs(jiffies);
1029 for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) {
1030 qib_pio_copy(piobuf + 64, addr, cnt >> 2);
1031 emsecs = jiffies_to_msecs(jiffies) - msecs;
1034 /* 1 GiB/sec, slightly over IB SDR line rate */
1035 if (lcnt < (emsecs * 1024U))
1037 "Performance problem: bandwidth to PIO buffers is only %u MiB/sec\n",
1038 lcnt / (u32) emsecs);
1045 /* disarm piobuf, so it's available again */
1046 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_BUF(pbnum));
1047 qib_sendbuf_done(dd, pbnum);
1048 dd->f_set_armlaunch(dd, 1);
1052 void qib_free_devdata(struct qib_devdata *dd)
1054 unsigned long flags;
1056 spin_lock_irqsave(&qib_devs_lock, flags);
1057 idr_remove(&qib_unit_table, dd->unit);
1058 list_del(&dd->list);
1059 spin_unlock_irqrestore(&qib_devs_lock, flags);
1061 ib_dealloc_device(&dd->verbs_dev.ibdev);
1065 * Allocate our primary per-unit data structure. Must be done via verbs
1066 * allocator, because the verbs cleanup process both does cleanup and
1067 * free of the data structure.
1068 * "extra" is for chip-specific data.
1070 * Use the idr mechanism to get a unit number for this unit.
1072 struct qib_devdata *qib_alloc_devdata(struct pci_dev *pdev, size_t extra)
1074 unsigned long flags;
1075 struct qib_devdata *dd;
1078 dd = (struct qib_devdata *) ib_alloc_device(sizeof(*dd) + extra);
1080 dd = ERR_PTR(-ENOMEM);
1084 idr_preload(GFP_KERNEL);
1085 spin_lock_irqsave(&qib_devs_lock, flags);
1087 ret = idr_alloc(&qib_unit_table, dd, 0, 0, GFP_NOWAIT);
1090 list_add(&dd->list, &qib_dev_list);
1093 spin_unlock_irqrestore(&qib_devs_lock, flags);
1097 qib_early_err(&pdev->dev,
1098 "Could not allocate unit ID: error %d\n", -ret);
1099 ib_dealloc_device(&dd->verbs_dev.ibdev);
1104 if (!qib_cpulist_count) {
1105 u32 count = num_online_cpus();
1106 qib_cpulist = kzalloc(BITS_TO_LONGS(count) *
1107 sizeof(long), GFP_KERNEL);
1109 qib_cpulist_count = count;
1111 qib_early_err(&pdev->dev,
1112 "Could not alloc cpulist info, cpu affinity might be wrong\n");
1120 * Called from freeze mode handlers, and from PCI error
1121 * reporting code. Should be paranoid about state of
1122 * system and data structures.
1124 void qib_disable_after_error(struct qib_devdata *dd)
1126 if (dd->flags & QIB_INITTED) {
1129 dd->flags &= ~QIB_INITTED;
1131 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1132 struct qib_pportdata *ppd;
1134 ppd = dd->pport + pidx;
1135 if (dd->flags & QIB_PRESENT) {
1136 qib_set_linkstate(ppd,
1137 QIB_IB_LINKDOWN_DISABLE);
1138 dd->f_setextled(ppd, 0);
1140 *ppd->statusp &= ~QIB_STATUS_IB_READY;
1145 * Mark as having had an error for driver, and also
1146 * for /sys and status word mapped to user programs.
1147 * This marks unit as not usable, until reset.
1150 *dd->devstatusp |= QIB_STATUS_HWERROR;
1153 static void qib_remove_one(struct pci_dev *);
1154 static int qib_init_one(struct pci_dev *, const struct pci_device_id *);
1156 #define DRIVER_LOAD_MSG "Intel " QIB_DRV_NAME " loaded: "
1157 #define PFX QIB_DRV_NAME ": "
1159 static DEFINE_PCI_DEVICE_TABLE(qib_pci_tbl) = {
1160 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_QLOGIC_IB_6120) },
1161 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7220) },
1162 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7322) },
1166 MODULE_DEVICE_TABLE(pci, qib_pci_tbl);
1168 struct pci_driver qib_driver = {
1169 .name = QIB_DRV_NAME,
1170 .probe = qib_init_one,
1171 .remove = qib_remove_one,
1172 .id_table = qib_pci_tbl,
1173 .err_handler = &qib_pci_err_handler,
1176 #ifdef CONFIG_INFINIBAND_QIB_DCA
1178 static int qib_notify_dca(struct notifier_block *, unsigned long, void *);
1179 static struct notifier_block dca_notifier = {
1180 .notifier_call = qib_notify_dca,
1185 static int qib_notify_dca_device(struct device *device, void *data)
1187 struct qib_devdata *dd = dev_get_drvdata(device);
1188 unsigned long event = *(unsigned long *)data;
1190 return dd->f_notify_dca(dd, event);
1193 static int qib_notify_dca(struct notifier_block *nb, unsigned long event,
1198 rval = driver_for_each_device(&qib_driver.driver, NULL,
1199 &event, qib_notify_dca_device);
1200 return rval ? NOTIFY_BAD : NOTIFY_DONE;
1206 * Do all the generic driver unit- and chip-independent memory
1207 * allocation and initialization.
1209 static int __init qlogic_ib_init(void)
1213 ret = qib_dev_init();
1218 * These must be called before the driver is registered with
1219 * the PCI subsystem.
1221 idr_init(&qib_unit_table);
1223 #ifdef CONFIG_INFINIBAND_QIB_DCA
1224 dca_register_notify(&dca_notifier);
1226 ret = pci_register_driver(&qib_driver);
1228 pr_err("Unable to register driver: error %d\n", -ret);
1232 /* not fatal if it doesn't work */
1233 if (qib_init_qibfs())
1234 pr_err("Unable to register ipathfs\n");
1235 goto bail; /* all OK */
1238 #ifdef CONFIG_INFINIBAND_QIB_DCA
1239 dca_unregister_notify(&dca_notifier);
1241 idr_destroy(&qib_unit_table);
1247 module_init(qlogic_ib_init);
1250 * Do the non-unit driver cleanup, memory free, etc. at unload.
1252 static void __exit qlogic_ib_cleanup(void)
1256 ret = qib_exit_qibfs();
1259 "Unable to cleanup counter filesystem: error %d\n",
1262 #ifdef CONFIG_INFINIBAND_QIB_DCA
1263 dca_unregister_notify(&dca_notifier);
1265 pci_unregister_driver(&qib_driver);
1267 qib_cpulist_count = 0;
1270 idr_destroy(&qib_unit_table);
1274 module_exit(qlogic_ib_cleanup);
1276 /* this can only be called after a successful initialization */
1277 static void cleanup_device_data(struct qib_devdata *dd)
1281 struct qib_ctxtdata **tmp;
1282 unsigned long flags;
1284 /* users can't do anything more with chip */
1285 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1286 if (dd->pport[pidx].statusp)
1287 *dd->pport[pidx].statusp &= ~QIB_STATUS_CHIP_PRESENT;
1289 spin_lock(&dd->pport[pidx].cc_shadow_lock);
1291 kfree(dd->pport[pidx].congestion_entries);
1292 dd->pport[pidx].congestion_entries = NULL;
1293 kfree(dd->pport[pidx].ccti_entries);
1294 dd->pport[pidx].ccti_entries = NULL;
1295 kfree(dd->pport[pidx].ccti_entries_shadow);
1296 dd->pport[pidx].ccti_entries_shadow = NULL;
1297 kfree(dd->pport[pidx].congestion_entries_shadow);
1298 dd->pport[pidx].congestion_entries_shadow = NULL;
1300 spin_unlock(&dd->pport[pidx].cc_shadow_lock);
1306 if (dd->pioavailregs_dma) {
1307 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1308 (void *) dd->pioavailregs_dma,
1309 dd->pioavailregs_phys);
1310 dd->pioavailregs_dma = NULL;
1313 if (dd->pageshadow) {
1314 struct page **tmpp = dd->pageshadow;
1315 dma_addr_t *tmpd = dd->physshadow;
1318 for (ctxt = 0; ctxt < dd->cfgctxts; ctxt++) {
1319 int ctxt_tidbase = ctxt * dd->rcvtidcnt;
1320 int maxtid = ctxt_tidbase + dd->rcvtidcnt;
1322 for (i = ctxt_tidbase; i < maxtid; i++) {
1325 pci_unmap_page(dd->pcidev, tmpd[i],
1326 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1327 qib_release_user_pages(&tmpp[i], 1);
1333 tmpp = dd->pageshadow;
1334 dd->pageshadow = NULL;
1339 * Free any resources still in use (usually just kernel contexts)
1340 * at unload; we do for ctxtcnt, because that's what we allocate.
1341 * We acquire lock to be really paranoid that rcd isn't being
1342 * accessed from some interrupt-related code (that should not happen,
1343 * but best to be sure).
1345 spin_lock_irqsave(&dd->uctxt_lock, flags);
1348 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1349 for (ctxt = 0; tmp && ctxt < dd->ctxtcnt; ctxt++) {
1350 struct qib_ctxtdata *rcd = tmp[ctxt];
1352 tmp[ctxt] = NULL; /* debugging paranoia */
1353 qib_free_ctxtdata(dd, rcd);
1356 kfree(dd->boardname);
1361 * Clean up on unit shutdown, or error during unit load after
1362 * successful initialization.
1364 static void qib_postinit_cleanup(struct qib_devdata *dd)
1367 * Clean up chip-specific stuff.
1368 * We check for NULL here, because it's outside
1369 * the kregbase check, and we need to call it
1370 * after the free_irq. Thus it's possible that
1371 * the function pointers were never initialized.
1376 qib_pcie_ddcleanup(dd);
1378 cleanup_device_data(dd);
1380 qib_free_devdata(dd);
1383 static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1385 int ret, j, pidx, initfail;
1386 struct qib_devdata *dd = NULL;
1388 ret = qib_pcie_init(pdev, ent);
1393 * Do device-specific initialiation, function table setup, dd
1396 switch (ent->device) {
1397 case PCI_DEVICE_ID_QLOGIC_IB_6120:
1398 #ifdef CONFIG_PCI_MSI
1399 dd = qib_init_iba6120_funcs(pdev, ent);
1401 qib_early_err(&pdev->dev,
1402 "Intel PCIE device 0x%x cannot work if CONFIG_PCI_MSI is not enabled\n",
1404 dd = ERR_PTR(-ENODEV);
1408 case PCI_DEVICE_ID_QLOGIC_IB_7220:
1409 dd = qib_init_iba7220_funcs(pdev, ent);
1412 case PCI_DEVICE_ID_QLOGIC_IB_7322:
1413 dd = qib_init_iba7322_funcs(pdev, ent);
1417 qib_early_err(&pdev->dev,
1418 "Failing on unknown Intel deviceid 0x%x\n",
1426 goto bail; /* error already printed */
1428 ret = qib_create_workqueues(dd);
1432 /* do the generic initialization */
1433 initfail = qib_init(dd, 0);
1435 ret = qib_register_ib_device(dd);
1438 * Now ready for use. this should be cleared whenever we
1439 * detect a reset, or initiate one. If earlier failure,
1440 * we still create devices, so diags, etc. can be used
1441 * to determine cause of problem.
1443 if (!qib_mini_init && !initfail && !ret)
1444 dd->flags |= QIB_INITTED;
1446 j = qib_device_create(dd);
1448 qib_dev_err(dd, "Failed to create /dev devices: %d\n", -j);
1451 qib_dev_err(dd, "Failed filesystem setup for counters: %d\n",
1454 if (qib_mini_init || initfail || ret) {
1455 qib_stop_timers(dd);
1456 flush_workqueue(ib_wq);
1457 for (pidx = 0; pidx < dd->num_pports; ++pidx)
1458 dd->f_quiet_serdes(dd->pport + pidx);
1462 (void) qibfs_remove(dd);
1463 qib_device_remove(dd);
1466 qib_unregister_ib_device(dd);
1467 qib_postinit_cleanup(dd);
1474 ret = qib_enable_wc(dd);
1477 "Write combining not enabled (err %d): performance may be poor\n",
1483 qib_verify_pioperf(dd);
1488 static void qib_remove_one(struct pci_dev *pdev)
1490 struct qib_devdata *dd = pci_get_drvdata(pdev);
1493 /* unregister from IB core */
1494 qib_unregister_ib_device(dd);
1497 * Disable the IB link, disable interrupts on the device,
1498 * clear dma engines, etc.
1501 qib_shutdown_device(dd);
1503 qib_stop_timers(dd);
1505 /* wait until all of our (qsfp) queue_work() calls complete */
1506 flush_workqueue(ib_wq);
1508 ret = qibfs_remove(dd);
1510 qib_dev_err(dd, "Failed counters filesystem cleanup: %d\n",
1513 qib_device_remove(dd);
1515 qib_postinit_cleanup(dd);
1519 * qib_create_rcvhdrq - create a receive header queue
1520 * @dd: the qlogic_ib device
1521 * @rcd: the context data
1523 * This must be contiguous memory (from an i/o perspective), and must be
1524 * DMA'able (which means for some systems, it will go through an IOMMU,
1525 * or be forced into a low address range).
1527 int qib_create_rcvhdrq(struct qib_devdata *dd, struct qib_ctxtdata *rcd)
1532 if (!rcd->rcvhdrq) {
1533 dma_addr_t phys_hdrqtail;
1536 amt = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1537 sizeof(u32), PAGE_SIZE);
1538 gfp_flags = (rcd->ctxt >= dd->first_user_ctxt) ?
1539 GFP_USER : GFP_KERNEL;
1541 old_node_id = dev_to_node(&dd->pcidev->dev);
1542 set_dev_node(&dd->pcidev->dev, rcd->node_id);
1543 rcd->rcvhdrq = dma_alloc_coherent(
1544 &dd->pcidev->dev, amt, &rcd->rcvhdrq_phys,
1545 gfp_flags | __GFP_COMP);
1546 set_dev_node(&dd->pcidev->dev, old_node_id);
1548 if (!rcd->rcvhdrq) {
1550 "attempt to allocate %d bytes for ctxt %u rcvhdrq failed\n",
1555 if (rcd->ctxt >= dd->first_user_ctxt) {
1556 rcd->user_event_mask = vmalloc_user(PAGE_SIZE);
1557 if (!rcd->user_event_mask)
1558 goto bail_free_hdrq;
1561 if (!(dd->flags & QIB_NODMA_RTAIL)) {
1562 set_dev_node(&dd->pcidev->dev, rcd->node_id);
1563 rcd->rcvhdrtail_kvaddr = dma_alloc_coherent(
1564 &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail,
1566 set_dev_node(&dd->pcidev->dev, old_node_id);
1567 if (!rcd->rcvhdrtail_kvaddr)
1569 rcd->rcvhdrqtailaddr_phys = phys_hdrqtail;
1572 rcd->rcvhdrq_size = amt;
1575 /* clear for security and sanity on each use */
1576 memset(rcd->rcvhdrq, 0, rcd->rcvhdrq_size);
1577 if (rcd->rcvhdrtail_kvaddr)
1578 memset(rcd->rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1583 "attempt to allocate 1 page for ctxt %u rcvhdrqtailaddr failed\n",
1585 vfree(rcd->user_event_mask);
1586 rcd->user_event_mask = NULL;
1588 dma_free_coherent(&dd->pcidev->dev, amt, rcd->rcvhdrq,
1590 rcd->rcvhdrq = NULL;
1596 * allocate eager buffers, both kernel and user contexts.
1597 * @rcd: the context we are setting up.
1599 * Allocate the eager TID buffers and program them into hip.
1600 * They are no longer completely contiguous, we do multiple allocation
1601 * calls. Otherwise we get the OOM code involved, by asking for too
1602 * much per call, with disastrous results on some kernels.
1604 int qib_setup_eagerbufs(struct qib_ctxtdata *rcd)
1606 struct qib_devdata *dd = rcd->dd;
1607 unsigned e, egrcnt, egrperchunk, chunk, egrsize, egroff;
1613 * GFP_USER, but without GFP_FS, so buffer cache can be
1614 * coalesced (we hope); otherwise, even at order 4,
1615 * heavy filesystem activity makes these fail, and we can
1616 * use compound pages.
1618 gfp_flags = __GFP_WAIT | __GFP_IO | __GFP_COMP;
1620 egrcnt = rcd->rcvegrcnt;
1621 egroff = rcd->rcvegr_tid_base;
1622 egrsize = dd->rcvegrbufsize;
1624 chunk = rcd->rcvegrbuf_chunks;
1625 egrperchunk = rcd->rcvegrbufs_perchunk;
1626 size = rcd->rcvegrbuf_size;
1627 if (!rcd->rcvegrbuf) {
1629 kzalloc_node(chunk * sizeof(rcd->rcvegrbuf[0]),
1630 GFP_KERNEL, rcd->node_id);
1631 if (!rcd->rcvegrbuf)
1634 if (!rcd->rcvegrbuf_phys) {
1635 rcd->rcvegrbuf_phys =
1636 kmalloc_node(chunk * sizeof(rcd->rcvegrbuf_phys[0]),
1637 GFP_KERNEL, rcd->node_id);
1638 if (!rcd->rcvegrbuf_phys)
1639 goto bail_rcvegrbuf;
1641 for (e = 0; e < rcd->rcvegrbuf_chunks; e++) {
1642 if (rcd->rcvegrbuf[e])
1645 old_node_id = dev_to_node(&dd->pcidev->dev);
1646 set_dev_node(&dd->pcidev->dev, rcd->node_id);
1648 dma_alloc_coherent(&dd->pcidev->dev, size,
1649 &rcd->rcvegrbuf_phys[e],
1651 set_dev_node(&dd->pcidev->dev, old_node_id);
1652 if (!rcd->rcvegrbuf[e])
1653 goto bail_rcvegrbuf_phys;
1656 rcd->rcvegr_phys = rcd->rcvegrbuf_phys[0];
1658 for (e = chunk = 0; chunk < rcd->rcvegrbuf_chunks; chunk++) {
1659 dma_addr_t pa = rcd->rcvegrbuf_phys[chunk];
1662 /* clear for security and sanity on each use */
1663 memset(rcd->rcvegrbuf[chunk], 0, size);
1665 for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) {
1666 dd->f_put_tid(dd, e + egroff +
1671 RCVHQ_RCV_TYPE_EAGER, pa);
1674 cond_resched(); /* don't hog the cpu */
1679 bail_rcvegrbuf_phys:
1680 for (e = 0; e < rcd->rcvegrbuf_chunks && rcd->rcvegrbuf[e]; e++)
1681 dma_free_coherent(&dd->pcidev->dev, size,
1682 rcd->rcvegrbuf[e], rcd->rcvegrbuf_phys[e]);
1683 kfree(rcd->rcvegrbuf_phys);
1684 rcd->rcvegrbuf_phys = NULL;
1686 kfree(rcd->rcvegrbuf);
1687 rcd->rcvegrbuf = NULL;
1693 * Note: Changes to this routine should be mirrored
1694 * for the diagnostics routine qib_remap_ioaddr32().
1695 * There is also related code for VL15 buffers in qib_init_7322_variables().
1696 * The teardown code that unmaps is in qib_pcie_ddcleanup()
1698 int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen)
1700 u64 __iomem *qib_kregbase = NULL;
1701 void __iomem *qib_piobase = NULL;
1702 u64 __iomem *qib_userbase = NULL;
1704 u64 qib_pio2koffset = dd->piobufbase & 0xffffffff;
1705 u64 qib_pio4koffset = dd->piobufbase >> 32;
1706 u64 qib_pio2klen = dd->piobcnt2k * dd->palign;
1707 u64 qib_pio4klen = dd->piobcnt4k * dd->align4k;
1708 u64 qib_physaddr = dd->physaddr;
1710 u64 qib_userlen = 0;
1713 * Free the old mapping because the kernel will try to reuse the
1714 * old mapping and not create a new mapping with the
1715 * write combining attribute.
1717 iounmap(dd->kregbase);
1718 dd->kregbase = NULL;
1721 * Assumes chip address space looks like:
1722 * - kregs + sregs + cregs + uregs (in any order)
1723 * - piobufs (2K and 4K bufs in either order)
1725 * - kregs + sregs + cregs (in any order)
1726 * - piobufs (2K and 4K bufs in either order)
1729 if (dd->piobcnt4k == 0) {
1730 qib_kreglen = qib_pio2koffset;
1731 qib_piolen = qib_pio2klen;
1732 } else if (qib_pio2koffset < qib_pio4koffset) {
1733 qib_kreglen = qib_pio2koffset;
1734 qib_piolen = qib_pio4koffset + qib_pio4klen - qib_kreglen;
1736 qib_kreglen = qib_pio4koffset;
1737 qib_piolen = qib_pio2koffset + qib_pio2klen - qib_kreglen;
1739 qib_piolen += vl15buflen;
1740 /* Map just the configured ports (not all hw ports) */
1741 if (dd->uregbase > qib_kreglen)
1742 qib_userlen = dd->ureg_align * dd->cfgctxts;
1744 /* Sanity checks passed, now create the new mappings */
1745 qib_kregbase = ioremap_nocache(qib_physaddr, qib_kreglen);
1749 qib_piobase = ioremap_wc(qib_physaddr + qib_kreglen, qib_piolen);
1754 qib_userbase = ioremap_nocache(qib_physaddr + dd->uregbase,
1760 dd->kregbase = qib_kregbase;
1761 dd->kregend = (u64 __iomem *)
1762 ((char __iomem *) qib_kregbase + qib_kreglen);
1763 dd->piobase = qib_piobase;
1764 dd->pio2kbase = (void __iomem *)
1765 (((char __iomem *) dd->piobase) +
1766 qib_pio2koffset - qib_kreglen);
1768 dd->pio4kbase = (void __iomem *)
1769 (((char __iomem *) dd->piobase) +
1770 qib_pio4koffset - qib_kreglen);
1772 /* ureg will now be accessed relative to dd->userbase */
1773 dd->userbase = qib_userbase;
1777 iounmap(qib_piobase);
1779 iounmap(qib_kregbase);