6 depends on ARCH_MULTI_V6
9 select SOC_HAS_OMAP2_SDRC
13 depends on ARCH_MULTI_V7
16 select ARM_CPU_SUSPEND if PM
17 select OMAP_INTERCONNECT
19 select PM_RUNTIME if CPU_IDLE
20 select SOC_HAS_OMAP2_SDRC
24 depends on ARCH_MULTI_V7
27 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
28 select ARM_CPU_SUSPEND if PM
29 select ARM_ERRATA_720789
32 select HAVE_ARM_SCU if SMP
33 select HAVE_ARM_TWD if SMP
34 select OMAP_INTERCONNECT
35 select PL310_ERRATA_588369
36 select PL310_ERRATA_727915
38 select PM_RUNTIME if CPU_IDLE
39 select ARM_ERRATA_754322
40 select ARM_ERRATA_775420
44 depends on ARCH_MULTI_V7
47 select ARM_CPU_SUSPEND if PM
49 select HAVE_ARM_SCU if SMP
50 select HAVE_ARM_TWD if SMP
51 select HAVE_ARM_ARCH_TIMER
52 select ARM_ERRATA_798181 if SMP
56 depends on ARCH_MULTI_V7
59 select ARM_CPU_SUSPEND if PM
63 depends on ARCH_MULTI_V7
67 select MACH_OMAP_GENERIC
71 depends on ARCH_MULTI_V7
74 select ARM_CPU_SUSPEND if PM
76 select HAVE_ARM_ARCH_TIMER
81 select ARCH_HAS_BANDGAP
82 select ARCH_HAS_CPUFREQ
83 select ARCH_HAS_HOLES_MEMORYMODEL
85 select ARCH_REQUIRE_GPIOLIB
87 select GENERIC_IRQ_CHIP
88 select MACH_OMAP_GENERIC
94 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
99 menu "TI OMAP2/3/4 Specific Features"
101 config ARCH_OMAP2PLUS_TYPICAL
102 bool "Typical OMAP configuration"
108 select MENELAUS if ARCH_OMAP2
109 select NEON if CPU_V7
112 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
113 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
116 Compile a kernel suitable for booting most boards
118 config SOC_HAS_OMAP2_SDRC
119 bool "OMAP2 SDRAM Controller support"
121 config SOC_HAS_REALTIME_COUNTER
122 bool "Real time free running counter"
123 depends on SOC_OMAP5 || SOC_DRA7XX
126 comment "OMAP Core Type"
127 depends on ARCH_OMAP2
130 bool "OMAP2420 support"
131 depends on ARCH_OMAP2
134 select SOC_HAS_OMAP2_SDRC
137 bool "OMAP2430 support"
138 depends on ARCH_OMAP2
140 select SOC_HAS_OMAP2_SDRC
143 bool "OMAP3430 support"
144 depends on ARCH_OMAP3
146 select SOC_HAS_OMAP2_SDRC
149 bool "TI81XX support"
150 depends on ARCH_OMAP3
153 config OMAP_PACKAGE_CBC
156 config OMAP_PACKAGE_CBB
159 config OMAP_PACKAGE_CUS
162 config OMAP_PACKAGE_CBP
165 comment "OMAP Legacy Platform Data Board Type"
166 depends on ARCH_OMAP2PLUS
168 config MACH_OMAP_GENERIC
171 config MACH_OMAP2_TUSB6010
173 depends on ARCH_OMAP2 && SOC_OMAP2420
174 default y if MACH_NOKIA_N8X0
176 config MACH_OMAP3_BEAGLE
177 bool "OMAP3 BEAGLE board"
178 depends on ARCH_OMAP3
180 select OMAP_PACKAGE_CBB
182 config MACH_DEVKIT8000
183 bool "DEVKIT8000 board"
184 depends on ARCH_OMAP3
186 select OMAP_PACKAGE_CUS
189 bool "OMAP3 LDP board"
190 depends on ARCH_OMAP3
192 select OMAP_PACKAGE_CBB
194 config MACH_OMAP3530_LV_SOM
195 bool "OMAP3 Logic 3530 LV SOM board"
196 depends on ARCH_OMAP3
198 select OMAP_PACKAGE_CBB
200 Support for the LogicPD OMAP3530 SOM Development kit
201 for full description please see the products webpage at
202 http://www.logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap35x-development-kit
204 config MACH_OMAP3_TORPEDO
205 bool "OMAP3 Logic 35x Torpedo board"
206 depends on ARCH_OMAP3
208 select OMAP_PACKAGE_CBB
210 Support for the LogicPD OMAP35x Torpedo Development kit
211 for full description please see the products webpage at
212 http://www.logicpd.com/products/development-kits/zoom-omap35x-torpedo-development-kit
215 bool "Gumstix Overo board"
216 depends on ARCH_OMAP3
218 select OMAP_PACKAGE_CBB
220 config MACH_OMAP3517EVM
221 bool "OMAP3517/ AM3517 EVM board"
222 depends on ARCH_OMAP3
224 select OMAP_PACKAGE_CBB
226 config MACH_CRANEBOARD
227 bool "AM3517/05 CRANE board"
228 depends on ARCH_OMAP3
229 select OMAP_PACKAGE_CBB
231 config MACH_OMAP3_PANDORA
233 depends on ARCH_OMAP3
235 select OMAP_PACKAGE_CBB
236 select REGULATOR_FIXED_VOLTAGE if REGULATOR
238 config MACH_TOUCHBOOK
239 bool "OMAP3 Touch Book"
240 depends on ARCH_OMAP3
242 select OMAP_PACKAGE_CBB
244 config MACH_OMAP_3430SDP
245 bool "OMAP 3430 SDP board"
246 depends on ARCH_OMAP3
248 select OMAP_PACKAGE_CBB
250 config MACH_NOKIA_N810
253 config MACH_NOKIA_N810_WIMAX
256 config MACH_NOKIA_N8X0
257 bool "Nokia N800/N810"
258 depends on SOC_OMAP2420
260 select MACH_NOKIA_N810
261 select MACH_NOKIA_N810_WIMAX
263 config MACH_NOKIA_RX51
264 bool "Nokia N900 (RX-51) phone"
265 depends on ARCH_OMAP3
267 select OMAP_PACKAGE_CBB
270 bool "CompuLab CM-T35/CM-T3730 modules"
271 depends on ARCH_OMAP3
274 select OMAP_PACKAGE_CUS
277 bool "CompuLab CM-T3517 module"
278 depends on ARCH_OMAP3
280 select OMAP_PACKAGE_CBB
286 bool "OMAP3 SBC STALKER board"
287 depends on ARCH_OMAP3
289 select OMAP_PACKAGE_CUS
291 config MACH_TI8168EVM
292 bool "TI8168 Evaluation Module"
293 depends on SOC_TI81XX
296 config MACH_TI8148EVM
297 bool "TI8148 Evaluation Module"
298 depends on SOC_TI81XX
302 bool "OMAP3 debugging peripherals"
303 depends on ARCH_OMAP3
307 Say Y here to enable debugging hardware of omap3
309 config OMAP3_SDRC_AC_TIMING
310 bool "Enable SDRC AC timing register changes"
311 depends on ARCH_OMAP3
314 If you know that none of your system initiators will attempt to
315 access SDRAM during CORE DVFS, select Y here. This should boost
316 SDRAM performance at lower CORE OPPs. There are relatively few
317 users who will wish to say yes at this point - almost everyone will
318 wish to say no. Selecting yes without understanding what is
319 going on could result in system crashes;
321 config OMAP4_ERRATA_I688
322 bool "OMAP4 errata: Async Bridge Corruption"
323 depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM
324 select ARCH_HAS_BARRIERS
326 If a data is stalled inside asynchronous bridge because of back
327 pressure, it may be accepted multiple times, creating pointer
328 misalignment that will corrupt next transfers on that data path
329 until next reset of the system (No recovery procedure once the
330 issue is hit, the path remains consistently broken). Async bridge
331 can be found on path between MPU to EMIF and MPU to L3 interconnect.
332 This situation can happen only when the idle is initiated by a
333 Master Request Disconnection (which is trigged by software when
334 executing WFI on CPU).
335 The work-around for this errata needs all the initiators connected
336 through async bridge must ensure that data path is properly drained
337 before issuing WFI. This condition will be met if one Strongly ordered
338 access is performed to the target right before executing the WFI.
339 In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained.
340 IO barrier ensure that there is no synchronisation loss on initiators
341 operating on both interconnect port simultaneously.