arch/arm/mach-at91/at91sam9263_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9263_devices.c
   3  *
   4  *  Copyright (C) 2007 Atmel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12 #include <asm/mach/arch.h>
  13 #include <asm/mach/map.h>
  14
  15 #include <linux/dma-mapping.h>
  16 #include <linux/gpio.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/i2c-gpio.h>
  19
  20 #include <linux/fb.h>
  21 #include <video/atmel_lcdc.h>
  22
  23 #include <mach/at91sam9263.h>
  24 #include <mach/at91sam9263_matrix.h>
  25 #include <mach/at91_matrix.h>
  26 #include <mach/at91sam9_smc.h>
  27 #include <mach/hardware.h>
  28
  29 #include "board.h"
  30 #include "generic.h"
  31
  32
  33 /* --------------------------------------------------------------------
  34  *  USB Host
  35  * -------------------------------------------------------------------- */
  36
  37 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  38 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  39 static struct at91_usbh_data usbh_data;
  40
  41 static struct resource usbh_resources[] = {
  42         [0] = {
  43                 .start  = AT91SAM9263_UHP_BASE,
  44                 .end    = AT91SAM9263_UHP_BASE + SZ_1M - 1,
  45                 .flags  = IORESOURCE_MEM,
  46         },
  47         [1] = {
  48                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
  49                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
  50                 .flags  = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct platform_device at91_usbh_device = {
  55         .name           = "at91_ohci",
  56         .id             = -1,
  57         .dev            = {
  58                                 .dma_mask               = &ohci_dmamask,
  59                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  60                                 .platform_data          = &usbh_data,
  61         },
  62         .resource       = usbh_resources,
  63         .num_resources  = ARRAY_SIZE(usbh_resources),
  64 };
  65
  66 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  67 {
  68         int i;
  69
  70         if (!data)
  71                 return;
  72
  73         /* Enable VBus control for UHP ports */
  74         for (i = 0; i < data->ports; i++) {
  75                 if (gpio_is_valid(data->vbus_pin[i]))
  76                         at91_set_gpio_output(data->vbus_pin[i],
  77                                              data->vbus_pin_active_low[i]);
  78         }
  79
  80         /* Enable overcurrent notification */
  81         for (i = 0; i < data->ports; i++) {
  82                 if (gpio_is_valid(data->overcurrent_pin[i]))
  83                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
  84         }
  85
  86         usbh_data = *data;
  87         platform_device_register(&at91_usbh_device);
  88 }
  89 #else
  90 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  91 #endif
  92
  93
  94 /* --------------------------------------------------------------------
  95  *  USB Device (Gadget)
  96  * -------------------------------------------------------------------- */
  97
  98 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
  99 static struct at91_udc_data udc_data;
 100
 101 static struct resource udc_resources[] = {
 102         [0] = {
 103                 .start  = AT91SAM9263_BASE_UDP,
 104                 .end    = AT91SAM9263_BASE_UDP + SZ_16K - 1,
 105                 .flags  = IORESOURCE_MEM,
 106         },
 107         [1] = {
 108                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
 109                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
 110                 .flags  = IORESOURCE_IRQ,
 111         },
 112 };
 113
 114 static struct platform_device at91_udc_device = {
 115         .name           = "at91_udc",
 116         .id             = -1,
 117         .dev            = {
 118                                 .platform_data          = &udc_data,
 119         },
 120         .resource       = udc_resources,
 121         .num_resources  = ARRAY_SIZE(udc_resources),
 122 };
 123
 124 void __init at91_add_device_udc(struct at91_udc_data *data)
 125 {
 126         if (!data)
 127                 return;
 128
 129         if (gpio_is_valid(data->vbus_pin)) {
 130                 at91_set_gpio_input(data->vbus_pin, 0);
 131                 at91_set_deglitch(data->vbus_pin, 1);
 132         }
 133
 134         /* Pullup pin is handled internally by USB device peripheral */
 135
 136         udc_data = *data;
 137         platform_device_register(&at91_udc_device);
 138 }
 139 #else
 140 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 141 #endif
 142
 143
 144 /* --------------------------------------------------------------------
 145  *  Ethernet
 146  * -------------------------------------------------------------------- */
 147
 148 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 149 static u64 eth_dmamask = DMA_BIT_MASK(32);
 150 static struct macb_platform_data eth_data;
 151
 152 static struct resource eth_resources[] = {
 153         [0] = {
 154                 .start  = AT91SAM9263_BASE_EMAC,
 155                 .end    = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
 156                 .flags  = IORESOURCE_MEM,
 157         },
 158         [1] = {
 159                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
 160                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
 161                 .flags  = IORESOURCE_IRQ,
 162         },
 163 };
 164
 165 static struct platform_device at91sam9263_eth_device = {
 166         .name           = "macb",
 167         .id             = -1,
 168         .dev            = {
 169                                 .dma_mask               = &eth_dmamask,
 170                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 171                                 .platform_data          = &eth_data,
 172         },
 173         .resource       = eth_resources,
 174         .num_resources  = ARRAY_SIZE(eth_resources),
 175 };
 176
 177 void __init at91_add_device_eth(struct macb_platform_data *data)
 178 {
 179         if (!data)
 180                 return;
 181
 182         if (gpio_is_valid(data->phy_irq_pin)) {
 183                 at91_set_gpio_input(data->phy_irq_pin, 0);
 184                 at91_set_deglitch(data->phy_irq_pin, 1);
 185         }
 186
 187         /* Pins used for MII and RMII */
 188         at91_set_A_periph(AT91_PIN_PE21, 0);    /* ETXCK_EREFCK */
 189         at91_set_B_periph(AT91_PIN_PC25, 0);    /* ERXDV */
 190         at91_set_A_periph(AT91_PIN_PE25, 0);    /* ERX0 */
 191         at91_set_A_periph(AT91_PIN_PE26, 0);    /* ERX1 */
 192         at91_set_A_periph(AT91_PIN_PE27, 0);    /* ERXER */
 193         at91_set_A_periph(AT91_PIN_PE28, 0);    /* ETXEN */
 194         at91_set_A_periph(AT91_PIN_PE23, 0);    /* ETX0 */
 195         at91_set_A_periph(AT91_PIN_PE24, 0);    /* ETX1 */
 196         at91_set_A_periph(AT91_PIN_PE30, 0);    /* EMDIO */
 197         at91_set_A_periph(AT91_PIN_PE29, 0);    /* EMDC */
 198
 199         if (!data->is_rmii) {
 200                 at91_set_A_periph(AT91_PIN_PE22, 0);    /* ECRS */
 201                 at91_set_B_periph(AT91_PIN_PC26, 0);    /* ECOL */
 202                 at91_set_B_periph(AT91_PIN_PC22, 0);    /* ERX2 */
 203                 at91_set_B_periph(AT91_PIN_PC23, 0);    /* ERX3 */
 204                 at91_set_B_periph(AT91_PIN_PC27, 0);    /* ERXCK */
 205                 at91_set_B_periph(AT91_PIN_PC20, 0);    /* ETX2 */
 206                 at91_set_B_periph(AT91_PIN_PC21, 0);    /* ETX3 */
 207                 at91_set_B_periph(AT91_PIN_PC24, 0);    /* ETXER */
 208         }
 209
 210         eth_data = *data;
 211         platform_device_register(&at91sam9263_eth_device);
 212 }
 213 #else
 214 void __init at91_add_device_eth(struct macb_platform_data *data) {}
 215 #endif
 216
 217
 218 /* --------------------------------------------------------------------
 219  *  MMC / SD
 220  * -------------------------------------------------------------------- */
 221
 222 #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
 223 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 224 static struct mci_platform_data mmc0_data, mmc1_data;
 225
 226 static struct resource mmc0_resources[] = {
 227         [0] = {
 228                 .start  = AT91SAM9263_BASE_MCI0,
 229                 .end    = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
 230                 .flags  = IORESOURCE_MEM,
 231         },
 232         [1] = {
 233                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
 234                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
 235                 .flags  = IORESOURCE_IRQ,
 236         },
 237 };
 238
 239 static struct platform_device at91sam9263_mmc0_device = {
 240         .name           = "atmel_mci",
 241         .id             = 0,
 242         .dev            = {
 243                                 .dma_mask               = &mmc_dmamask,
 244                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 245                                 .platform_data          = &mmc0_data,
 246         },
 247         .resource       = mmc0_resources,
 248         .num_resources  = ARRAY_SIZE(mmc0_resources),
 249 };
 250
 251 static struct resource mmc1_resources[] = {
 252         [0] = {
 253                 .start  = AT91SAM9263_BASE_MCI1,
 254                 .end    = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
 255                 .flags  = IORESOURCE_MEM,
 256         },
 257         [1] = {
 258                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
 259                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
 260                 .flags  = IORESOURCE_IRQ,
 261         },
 262 };
 263
 264 static struct platform_device at91sam9263_mmc1_device = {
 265         .name           = "atmel_mci",
 266         .id             = 1,
 267         .dev            = {
 268                                 .dma_mask               = &mmc_dmamask,
 269                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 270                                 .platform_data          = &mmc1_data,
 271         },
 272         .resource       = mmc1_resources,
 273         .num_resources  = ARRAY_SIZE(mmc1_resources),
 274 };
 275
 276 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 277 {
 278         unsigned int i;
 279         unsigned int slot_count = 0;
 280
 281         if (!data)
 282                 return;
 283
 284         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
 285
 286                 if (!data->slot[i].bus_width)
 287                         continue;
 288
 289                 /* input/irq */
 290                 if (gpio_is_valid(data->slot[i].detect_pin)) {
 291                         at91_set_gpio_input(data->slot[i].detect_pin,
 292                                         1);
 293                         at91_set_deglitch(data->slot[i].detect_pin,
 294                                         1);
 295                 }
 296                 if (gpio_is_valid(data->slot[i].wp_pin))
 297                         at91_set_gpio_input(data->slot[i].wp_pin, 1);
 298
 299                 if (mmc_id == 0) {                              /* MCI0 */
 300                         switch (i) {
 301                         case 0:                                 /* slot A */
 302                                 /* CMD */
 303                                 at91_set_A_periph(AT91_PIN_PA1, 1);
 304                                 /* DAT0, maybe DAT1..DAT3 */
 305                                 at91_set_A_periph(AT91_PIN_PA0, 1);
 306                                 if (data->slot[i].bus_width == 4) {
 307                                         at91_set_A_periph(AT91_PIN_PA3, 1);
 308                                         at91_set_A_periph(AT91_PIN_PA4, 1);
 309                                         at91_set_A_periph(AT91_PIN_PA5, 1);
 310                                 }
 311                                 slot_count++;
 312                                 break;
 313                         case 1:                                 /* slot B */
 314                                 /* CMD */
 315                                 at91_set_A_periph(AT91_PIN_PA16, 1);
 316                                 /* DAT0, maybe DAT1..DAT3 */
 317                                 at91_set_A_periph(AT91_PIN_PA17, 1);
 318                                 if (data->slot[i].bus_width == 4) {
 319                                         at91_set_A_periph(AT91_PIN_PA18, 1);
 320                                         at91_set_A_periph(AT91_PIN_PA19, 1);
 321                                         at91_set_A_periph(AT91_PIN_PA20, 1);
 322                                 }
 323                                 slot_count++;
 324                                 break;
 325                         default:
 326                                 printk(KERN_ERR
 327                                        "AT91: SD/MMC slot %d not available\n", i);
 328                                 break;
 329                         }
 330                         if (slot_count) {
 331                                 /* CLK */
 332                                 at91_set_A_periph(AT91_PIN_PA12, 0);
 333
 334                                 mmc0_data = *data;
 335                                 platform_device_register(&at91sam9263_mmc0_device);
 336                         }
 337                 } else if (mmc_id == 1) {                       /* MCI1 */
 338                         switch (i) {
 339                         case 0:                                 /* slot A */
 340                                 /* CMD */
 341                                 at91_set_A_periph(AT91_PIN_PA7, 1);
 342                                 /* DAT0, maybe DAT1..DAT3 */
 343                                 at91_set_A_periph(AT91_PIN_PA8, 1);
 344                                 if (data->slot[i].bus_width == 4) {
 345                                         at91_set_A_periph(AT91_PIN_PA9, 1);
 346                                         at91_set_A_periph(AT91_PIN_PA10, 1);
 347                                         at91_set_A_periph(AT91_PIN_PA11, 1);
 348                                 }
 349                                 slot_count++;
 350                                 break;
 351                         case 1:                                 /* slot B */
 352                                 /* CMD */
 353                                 at91_set_A_periph(AT91_PIN_PA21, 1);
 354                                 /* DAT0, maybe DAT1..DAT3 */
 355                                 at91_set_A_periph(AT91_PIN_PA22, 1);
 356                                 if (data->slot[i].bus_width == 4) {
 357                                         at91_set_A_periph(AT91_PIN_PA23, 1);
 358                                         at91_set_A_periph(AT91_PIN_PA24, 1);
 359                                         at91_set_A_periph(AT91_PIN_PA25, 1);
 360                                 }
 361                                 slot_count++;
 362                                 break;
 363                         default:
 364                                 printk(KERN_ERR
 365                                        "AT91: SD/MMC slot %d not available\n", i);
 366                                 break;
 367                         }
 368                         if (slot_count) {
 369                                 /* CLK */
 370                                 at91_set_A_periph(AT91_PIN_PA6, 0);
 371
 372                                 mmc1_data = *data;
 373                                 platform_device_register(&at91sam9263_mmc1_device);
 374                         }
 375                 }
 376         }
 377 }
 378 #else
 379 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
 380 #endif
 381
 382 /* --------------------------------------------------------------------
 383  *  Compact Flash (PCMCIA or IDE)
 384  * -------------------------------------------------------------------- */
 385
 386 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
 387         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
 388
 389 static struct at91_cf_data cf0_data;
 390
 391 static struct resource cf0_resources[] = {
 392         [0] = {
 393                 .start  = AT91_CHIPSELECT_4,
 394                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
 395                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
 396         }
 397 };
 398
 399 static struct platform_device cf0_device = {
 400         .id             = 0,
 401         .dev            = {
 402                                 .platform_data  = &cf0_data,
 403         },
 404         .resource       = cf0_resources,
 405         .num_resources  = ARRAY_SIZE(cf0_resources),
 406 };
 407
 408 static struct at91_cf_data cf1_data;
 409
 410 static struct resource cf1_resources[] = {
 411         [0] = {
 412                 .start  = AT91_CHIPSELECT_5,
 413                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
 414                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
 415         }
 416 };
 417
 418 static struct platform_device cf1_device = {
 419         .id             = 1,
 420         .dev            = {
 421                                 .platform_data  = &cf1_data,
 422         },
 423         .resource       = cf1_resources,
 424         .num_resources  = ARRAY_SIZE(cf1_resources),
 425 };
 426
 427 void __init at91_add_device_cf(struct at91_cf_data *data)
 428 {
 429         unsigned long ebi0_csa;
 430         struct platform_device *pdev;
 431
 432         if (!data)
 433                 return;
 434
 435         /*
 436          * assign CS4 or CS5 to SMC with Compact Flash logic support,
 437          * we assume SMC timings are configured by board code,
 438          * except True IDE where timings are controlled by driver
 439          */
 440         ebi0_csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
 441         switch (data->chipselect) {
 442         case 4:
 443                 at91_set_A_periph(AT91_PIN_PD6, 0);  /* EBI0_NCS4/CFCS0 */
 444                 ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
 445                 cf0_data = *data;
 446                 pdev = &cf0_device;
 447                 break;
 448         case 5:
 449                 at91_set_A_periph(AT91_PIN_PD7, 0);  /* EBI0_NCS5/CFCS1 */
 450                 ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
 451                 cf1_data = *data;
 452                 pdev = &cf1_device;
 453                 break;
 454         default:
 455                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
 456                        data->chipselect);
 457                 return;
 458         }
 459         at91_matrix_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
 460
 461         if (gpio_is_valid(data->det_pin)) {
 462                 at91_set_gpio_input(data->det_pin, 1);
 463                 at91_set_deglitch(data->det_pin, 1);
 464         }
 465
 466         if (gpio_is_valid(data->irq_pin)) {
 467                 at91_set_gpio_input(data->irq_pin, 1);
 468                 at91_set_deglitch(data->irq_pin, 1);
 469         }
 470
 471         if (gpio_is_valid(data->vcc_pin))
 472                 /* initially off */
 473                 at91_set_gpio_output(data->vcc_pin, 0);
 474
 475         /* enable EBI controlled pins */
 476         at91_set_A_periph(AT91_PIN_PD5, 1);  /* NWAIT */
 477         at91_set_A_periph(AT91_PIN_PD8, 0);  /* CFCE1 */
 478         at91_set_A_periph(AT91_PIN_PD9, 0);  /* CFCE2 */
 479         at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
 480
 481         pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf";
 482         platform_device_register(pdev);
 483 }
 484 #else
 485 void __init at91_add_device_cf(struct at91_cf_data *data) {}
 486 #endif
 487
 488 /* --------------------------------------------------------------------
 489  *  NAND / SmartMedia
 490  * -------------------------------------------------------------------- */
 491
 492 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 493 static struct atmel_nand_data nand_data;
 494
 495 #define NAND_BASE       AT91_CHIPSELECT_3
 496
 497 static struct resource nand_resources[] = {
 498         [0] = {
 499                 .start  = NAND_BASE,
 500                 .end    = NAND_BASE + SZ_256M - 1,
 501                 .flags  = IORESOURCE_MEM,
 502         },
 503         [1] = {
 504                 .start  = AT91SAM9263_BASE_ECC0,
 505                 .end    = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
 506                 .flags  = IORESOURCE_MEM,
 507         }
 508 };
 509
 510 static struct platform_device at91sam9263_nand_device = {
 511         .name           = "atmel_nand",
 512         .id             = -1,
 513         .dev            = {
 514                                 .platform_data  = &nand_data,
 515         },
 516         .resource       = nand_resources,
 517         .num_resources  = ARRAY_SIZE(nand_resources),
 518 };
 519
 520 void __init at91_add_device_nand(struct atmel_nand_data *data)
 521 {
 522         unsigned long csa;
 523
 524         if (!data)
 525                 return;
 526
 527         csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
 528         at91_matrix_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 529
 530         /* enable pin */
 531         if (gpio_is_valid(data->enable_pin))
 532                 at91_set_gpio_output(data->enable_pin, 1);
 533
 534         /* ready/busy pin */
 535         if (gpio_is_valid(data->rdy_pin))
 536                 at91_set_gpio_input(data->rdy_pin, 1);
 537
 538         /* card detect pin */
 539         if (gpio_is_valid(data->det_pin))
 540                 at91_set_gpio_input(data->det_pin, 1);
 541
 542         nand_data = *data;
 543         platform_device_register(&at91sam9263_nand_device);
 544 }
 545 #else
 546 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 547 #endif
 548
 549
 550 /* --------------------------------------------------------------------
 551  *  TWI (i2c)
 552  * -------------------------------------------------------------------- */
 553
 554 /*
 555  * Prefer the GPIO code since the TWI controller isn't robust
 556  * (gets overruns and underruns under load) and can only issue
 557  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 558  */
 559 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 560
 561 static struct i2c_gpio_platform_data pdata = {
 562         .sda_pin                = AT91_PIN_PB4,
 563         .sda_is_open_drain      = 1,
 564         .scl_pin                = AT91_PIN_PB5,
 565         .scl_is_open_drain      = 1,
 566         .udelay                 = 2,            /* ~100 kHz */
 567 };
 568
 569 static struct platform_device at91sam9263_twi_device = {
 570         .name                   = "i2c-gpio",
 571         .id                     = 0,
 572         .dev.platform_data      = &pdata,
 573 };
 574
 575 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 576 {
 577         at91_set_GPIO_periph(AT91_PIN_PB4, 1);          /* TWD (SDA) */
 578         at91_set_multi_drive(AT91_PIN_PB4, 1);
 579
 580         at91_set_GPIO_periph(AT91_PIN_PB5, 1);          /* TWCK (SCL) */
 581         at91_set_multi_drive(AT91_PIN_PB5, 1);
 582
 583         i2c_register_board_info(0, devices, nr_devices);
 584         platform_device_register(&at91sam9263_twi_device);
 585 }
 586
 587 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 588
 589 static struct resource twi_resources[] = {
 590         [0] = {
 591                 .start  = AT91SAM9263_BASE_TWI,
 592                 .end    = AT91SAM9263_BASE_TWI + SZ_16K - 1,
 593                 .flags  = IORESOURCE_MEM,
 594         },
 595         [1] = {
 596                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
 597                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
 598                 .flags  = IORESOURCE_IRQ,
 599         },
 600 };
 601
 602 static struct platform_device at91sam9263_twi_device = {
 603         .name           = "i2c-at91sam9260",
 604         .id             = 0,
 605         .resource       = twi_resources,
 606         .num_resources  = ARRAY_SIZE(twi_resources),
 607 };
 608
 609 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 610 {
 611         /* pins used for TWI interface */
 612         at91_set_A_periph(AT91_PIN_PB4, 0);             /* TWD */
 613         at91_set_multi_drive(AT91_PIN_PB4, 1);
 614
 615         at91_set_A_periph(AT91_PIN_PB5, 0);             /* TWCK */
 616         at91_set_multi_drive(AT91_PIN_PB5, 1);
 617
 618         i2c_register_board_info(0, devices, nr_devices);
 619         platform_device_register(&at91sam9263_twi_device);
 620 }
 621 #else
 622 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 623 #endif
 624
 625
 626 /* --------------------------------------------------------------------
 627  *  SPI
 628  * -------------------------------------------------------------------- */
 629
 630 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 631 static u64 spi_dmamask = DMA_BIT_MASK(32);
 632
 633 static struct resource spi0_resources[] = {
 634         [0] = {
 635                 .start  = AT91SAM9263_BASE_SPI0,
 636                 .end    = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
 637                 .flags  = IORESOURCE_MEM,
 638         },
 639         [1] = {
 640                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
 641                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
 642                 .flags  = IORESOURCE_IRQ,
 643         },
 644 };
 645
 646 static struct platform_device at91sam9263_spi0_device = {
 647         .name           = "atmel_spi",
 648         .id             = 0,
 649         .dev            = {
 650                                 .dma_mask               = &spi_dmamask,
 651                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 652         },
 653         .resource       = spi0_resources,
 654         .num_resources  = ARRAY_SIZE(spi0_resources),
 655 };
 656
 657 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
 658
 659 static struct resource spi1_resources[] = {
 660         [0] = {
 661                 .start  = AT91SAM9263_BASE_SPI1,
 662                 .end    = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
 663                 .flags  = IORESOURCE_MEM,
 664         },
 665         [1] = {
 666                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
 667                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
 668                 .flags  = IORESOURCE_IRQ,
 669         },
 670 };
 671
 672 static struct platform_device at91sam9263_spi1_device = {
 673         .name           = "atmel_spi",
 674         .id             = 1,
 675         .dev            = {
 676                                 .dma_mask               = &spi_dmamask,
 677                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 678         },
 679         .resource       = spi1_resources,
 680         .num_resources  = ARRAY_SIZE(spi1_resources),
 681 };
 682
 683 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
 684
 685 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 686 {
 687         int i;
 688         unsigned long cs_pin;
 689         short enable_spi0 = 0;
 690         short enable_spi1 = 0;
 691
 692         /* Choose SPI chip-selects */
 693         for (i = 0; i < nr_devices; i++) {
 694                 if (devices[i].controller_data)
 695                         cs_pin = (unsigned long) devices[i].controller_data;
 696                 else if (devices[i].bus_num == 0)
 697                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 698                 else
 699                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 700
 701                 if (!gpio_is_valid(cs_pin))
 702                         continue;
 703
 704                 if (devices[i].bus_num == 0)
 705                         enable_spi0 = 1;
 706                 else
 707                         enable_spi1 = 1;
 708
 709                 /* enable chip-select pin */
 710                 at91_set_gpio_output(cs_pin, 1);
 711
 712                 /* pass chip-select pin to driver */
 713                 devices[i].controller_data = (void *) cs_pin;
 714         }
 715
 716         spi_register_board_info(devices, nr_devices);
 717
 718         /* Configure SPI bus(es) */
 719         if (enable_spi0) {
 720                 at91_set_B_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 721                 at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 722                 at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 723
 724                 platform_device_register(&at91sam9263_spi0_device);
 725         }
 726         if (enable_spi1) {
 727                 at91_set_A_periph(AT91_PIN_PB12, 0);    /* SPI1_MISO */
 728                 at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
 729                 at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
 730
 731                 platform_device_register(&at91sam9263_spi1_device);
 732         }
 733 }
 734 #else
 735 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 736 #endif
 737
 738
 739 /* --------------------------------------------------------------------
 740  *  AC97
 741  * -------------------------------------------------------------------- */
 742
 743 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
 744 static u64 ac97_dmamask = DMA_BIT_MASK(32);
 745 static struct ac97c_platform_data ac97_data;
 746
 747 static struct resource ac97_resources[] = {
 748         [0] = {
 749                 .start  = AT91SAM9263_BASE_AC97C,
 750                 .end    = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
 751                 .flags  = IORESOURCE_MEM,
 752         },
 753         [1] = {
 754                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
 755                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
 756                 .flags  = IORESOURCE_IRQ,
 757         },
 758 };
 759
 760 static struct platform_device at91sam9263_ac97_device = {
 761         .name           = "atmel_ac97c",
 762         .id             = 0,
 763         .dev            = {
 764                                 .dma_mask               = &ac97_dmamask,
 765                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 766                                 .platform_data          = &ac97_data,
 767         },
 768         .resource       = ac97_resources,
 769         .num_resources  = ARRAY_SIZE(ac97_resources),
 770 };
 771
 772 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
 773 {
 774         if (!data)
 775                 return;
 776
 777         at91_set_A_periph(AT91_PIN_PB0, 0);     /* AC97FS */
 778         at91_set_A_periph(AT91_PIN_PB1, 0);     /* AC97CK */
 779         at91_set_A_periph(AT91_PIN_PB2, 0);     /* AC97TX */
 780         at91_set_A_periph(AT91_PIN_PB3, 0);     /* AC97RX */
 781
 782         /* reset */
 783         if (gpio_is_valid(data->reset_pin))
 784                 at91_set_gpio_output(data->reset_pin, 0);
 785
 786         ac97_data = *data;
 787         platform_device_register(&at91sam9263_ac97_device);
 788 }
 789 #else
 790 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
 791 #endif
 792
 793 /* --------------------------------------------------------------------
 794  *  CAN Controller
 795  * -------------------------------------------------------------------- */
 796
 797 #if defined(CONFIG_CAN_AT91) || defined(CONFIG_CAN_AT91_MODULE)
 798 static struct resource can_resources[] = {
 799         [0] = {
 800                 .start  = AT91SAM9263_BASE_CAN,
 801                 .end    = AT91SAM9263_BASE_CAN + SZ_16K - 1,
 802                 .flags  = IORESOURCE_MEM,
 803         },
 804         [1] = {
 805                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
 806                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
 807                 .flags  = IORESOURCE_IRQ,
 808         },
 809 };
 810
 811 static struct platform_device at91sam9263_can_device = {
 812         .name           = "at91_can",
 813         .id             = -1,
 814         .resource       = can_resources,
 815         .num_resources  = ARRAY_SIZE(can_resources),
 816 };
 817
 818 void __init at91_add_device_can(struct at91_can_data *data)
 819 {
 820         at91_set_A_periph(AT91_PIN_PA13, 0);    /* CANTX */
 821         at91_set_A_periph(AT91_PIN_PA14, 0);    /* CANRX */
 822         at91sam9263_can_device.dev.platform_data = data;
 823
 824         platform_device_register(&at91sam9263_can_device);
 825 }
 826 #else
 827 void __init at91_add_device_can(struct at91_can_data *data) {}
 828 #endif
 829
 830 /* --------------------------------------------------------------------
 831  *  LCD Controller
 832  * -------------------------------------------------------------------- */
 833
 834 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 835 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 836 static struct atmel_lcdfb_pdata lcdc_data;
 837
 838 static struct resource lcdc_resources[] = {
 839         [0] = {
 840                 .start  = AT91SAM9263_LCDC_BASE,
 841                 .end    = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
 842                 .flags  = IORESOURCE_MEM,
 843         },
 844         [1] = {
 845                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
 846                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
 847                 .flags  = IORESOURCE_IRQ,
 848         },
 849 };
 850
 851 static struct platform_device at91_lcdc_device = {
 852         .name           = "at91sam9263-lcdfb",
 853         .id             = 0,
 854         .dev            = {
 855                                 .dma_mask               = &lcdc_dmamask,
 856                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 857                                 .platform_data          = &lcdc_data,
 858         },
 859         .resource       = lcdc_resources,
 860         .num_resources  = ARRAY_SIZE(lcdc_resources),
 861 };
 862
 863 void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data)
 864 {
 865         if (!data)
 866                 return;
 867
 868         at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
 869         at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
 870         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
 871         at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
 872         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
 873         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
 874         at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
 875         at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
 876         at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
 877         at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
 878         at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
 879         at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 880         at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 881         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD13 */
 882         at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 883         at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 884         at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
 885         at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
 886         at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
 887         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD21 */
 888         at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
 889         at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
 890
 891         lcdc_data = *data;
 892         platform_device_register(&at91_lcdc_device);
 893 }
 894 #else
 895 void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data) {}
 896 #endif
 897
 898
 899 /* --------------------------------------------------------------------
 900  *  Image Sensor Interface
 901  * -------------------------------------------------------------------- */
 902
 903 #if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
 904
 905 struct resource isi_resources[] = {
 906         [0] = {
 907                 .start  = AT91SAM9263_BASE_ISI,
 908                 .end    = AT91SAM9263_BASE_ISI + SZ_16K - 1,
 909                 .flags  = IORESOURCE_MEM,
 910         },
 911         [1] = {
 912                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
 913                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
 914                 .flags  = IORESOURCE_IRQ,
 915         },
 916 };
 917
 918 static struct platform_device at91sam9263_isi_device = {
 919         .name           = "at91_isi",
 920         .id             = -1,
 921         .resource       = isi_resources,
 922         .num_resources  = ARRAY_SIZE(isi_resources),
 923 };
 924
 925 void __init at91_add_device_isi(struct isi_platform_data *data,
 926                 bool use_pck_as_mck)
 927 {
 928         at91_set_A_periph(AT91_PIN_PE0, 0);     /* ISI_D0 */
 929         at91_set_A_periph(AT91_PIN_PE1, 0);     /* ISI_D1 */
 930         at91_set_A_periph(AT91_PIN_PE2, 0);     /* ISI_D2 */
 931         at91_set_A_periph(AT91_PIN_PE3, 0);     /* ISI_D3 */
 932         at91_set_A_periph(AT91_PIN_PE4, 0);     /* ISI_D4 */
 933         at91_set_A_periph(AT91_PIN_PE5, 0);     /* ISI_D5 */
 934         at91_set_A_periph(AT91_PIN_PE6, 0);     /* ISI_D6 */
 935         at91_set_A_periph(AT91_PIN_PE7, 0);     /* ISI_D7 */
 936         at91_set_A_periph(AT91_PIN_PE8, 0);     /* ISI_PCK */
 937         at91_set_A_periph(AT91_PIN_PE9, 0);     /* ISI_HSYNC */
 938         at91_set_A_periph(AT91_PIN_PE10, 0);    /* ISI_VSYNC */
 939         at91_set_B_periph(AT91_PIN_PE12, 0);    /* ISI_PD8 */
 940         at91_set_B_periph(AT91_PIN_PE13, 0);    /* ISI_PD9 */
 941         at91_set_B_periph(AT91_PIN_PE14, 0);    /* ISI_PD10 */
 942         at91_set_B_periph(AT91_PIN_PE15, 0);    /* ISI_PD11 */
 943
 944         if (use_pck_as_mck) {
 945                 at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
 946
 947                 /* TODO: register the PCK for ISI_MCK and set its parent */
 948         }
 949 }
 950 #else
 951 void __init at91_add_device_isi(struct isi_platform_data *data,
 952                 bool use_pck_as_mck) {}
 953 #endif
 954
 955
 956 /* --------------------------------------------------------------------
 957  *  Timer/Counter block
 958  * -------------------------------------------------------------------- */
 959
 960 #ifdef CONFIG_ATMEL_TCLIB
 961
 962 static struct resource tcb_resources[] = {
 963         [0] = {
 964                 .start  = AT91SAM9263_BASE_TCB0,
 965                 .end    = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
 966                 .flags  = IORESOURCE_MEM,
 967         },
 968         [1] = {
 969                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
 970                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
 971                 .flags  = IORESOURCE_IRQ,
 972         },
 973 };
 974
 975 static struct platform_device at91sam9263_tcb_device = {
 976         .name           = "atmel_tcb",
 977         .id             = 0,
 978         .resource       = tcb_resources,
 979         .num_resources  = ARRAY_SIZE(tcb_resources),
 980 };
 981
 982 #if defined(CONFIG_OF)
 983 static struct of_device_id tcb_ids[] = {
 984         { .compatible = "atmel,at91rm9200-tcb" },
 985         { /*sentinel*/ }
 986 };
 987 #endif
 988
 989 static void __init at91_add_device_tc(void)
 990 {
 991 #if defined(CONFIG_OF)
 992         struct device_node *np;
 993
 994         np = of_find_matching_node(NULL, tcb_ids);
 995         if (np) {
 996                 of_node_put(np);
 997                 return;
 998         }
 999 #endif
1000
1001         platform_device_register(&at91sam9263_tcb_device);
1002 }
1003 #else
1004 static void __init at91_add_device_tc(void) { }
1005 #endif
1006
1007
1008 /* --------------------------------------------------------------------
1009  *  RTT
1010  * -------------------------------------------------------------------- */
1011
1012 static struct resource rtt0_resources[] = {
1013         {
1014                 .start  = AT91SAM9263_BASE_RTT0,
1015                 .end    = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
1016                 .flags  = IORESOURCE_MEM,
1017         }, {
1018                 .flags  = IORESOURCE_MEM,
1019         }, {
1020                 .flags  = IORESOURCE_IRQ,
1021         }
1022 };
1023
1024 static struct platform_device at91sam9263_rtt0_device = {
1025         .name           = "at91_rtt",
1026         .id             = 0,
1027         .resource       = rtt0_resources,
1028 };
1029
1030 static struct resource rtt1_resources[] = {
1031         {
1032                 .start  = AT91SAM9263_BASE_RTT1,
1033                 .end    = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
1034                 .flags  = IORESOURCE_MEM,
1035         }, {
1036                 .flags  = IORESOURCE_MEM,
1037         }, {
1038                 .flags  = IORESOURCE_IRQ,
1039         }
1040 };
1041
1042 static struct platform_device at91sam9263_rtt1_device = {
1043         .name           = "at91_rtt",
1044         .id             = 1,
1045         .resource       = rtt1_resources,
1046 };
1047
1048 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
1049 static void __init at91_add_device_rtt_rtc(void)
1050 {
1051         struct platform_device *pdev;
1052         struct resource *r;
1053
1054         switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
1055         case 0:
1056                 /*
1057                  * The second resource is needed only for the chosen RTT:
1058                  * GPBR will serve as the storage for RTC time offset
1059                  */
1060                 at91sam9263_rtt0_device.num_resources = 3;
1061                 at91sam9263_rtt1_device.num_resources = 1;
1062                 pdev = &at91sam9263_rtt0_device;
1063                 r = rtt0_resources;
1064                 break;
1065         case 1:
1066                 at91sam9263_rtt0_device.num_resources = 1;
1067                 at91sam9263_rtt1_device.num_resources = 3;
1068                 pdev = &at91sam9263_rtt1_device;
1069                 r = rtt1_resources;
1070                 break;
1071         default:
1072                 pr_err("at91sam9263: only supports 2 RTT (%d)\n",
1073                        CONFIG_RTC_DRV_AT91SAM9_RTT);
1074                 return;
1075         }
1076
1077         pdev->name = "rtc-at91sam9";
1078         r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
1079         r[1].end = r[1].start + 3;
1080         r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
1081         r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
1082 }
1083 #else
1084 static void __init at91_add_device_rtt_rtc(void)
1085 {
1086         /* Only one resource is needed: RTT not used as RTC */
1087         at91sam9263_rtt0_device.num_resources = 1;
1088         at91sam9263_rtt1_device.num_resources = 1;
1089 }
1090 #endif
1091
1092 static void __init at91_add_device_rtt(void)
1093 {
1094         at91_add_device_rtt_rtc();
1095         platform_device_register(&at91sam9263_rtt0_device);
1096         platform_device_register(&at91sam9263_rtt1_device);
1097 }
1098
1099
1100 /* --------------------------------------------------------------------
1101  *  Watchdog
1102  * -------------------------------------------------------------------- */
1103
1104 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
1105 static struct resource wdt_resources[] = {
1106         {
1107                 .start  = AT91SAM9263_BASE_WDT,
1108                 .end    = AT91SAM9263_BASE_WDT + SZ_16 - 1,
1109                 .flags  = IORESOURCE_MEM,
1110         }
1111 };
1112
1113 static struct platform_device at91sam9263_wdt_device = {
1114         .name           = "at91_wdt",
1115         .id             = -1,
1116         .resource       = wdt_resources,
1117         .num_resources  = ARRAY_SIZE(wdt_resources),
1118 };
1119
1120 static void __init at91_add_device_watchdog(void)
1121 {
1122         platform_device_register(&at91sam9263_wdt_device);
1123 }
1124 #else
1125 static void __init at91_add_device_watchdog(void) {}
1126 #endif
1127
1128
1129 /* --------------------------------------------------------------------
1130  *  PWM
1131  * --------------------------------------------------------------------*/
1132
1133 #if defined(CONFIG_ATMEL_PWM)
1134 static u32 pwm_mask;
1135
1136 static struct resource pwm_resources[] = {
1137         [0] = {
1138                 .start  = AT91SAM9263_BASE_PWMC,
1139                 .end    = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
1140                 .flags  = IORESOURCE_MEM,
1141         },
1142         [1] = {
1143                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1144                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1145                 .flags  = IORESOURCE_IRQ,
1146         },
1147 };
1148
1149 static struct platform_device at91sam9263_pwm0_device = {
1150         .name   = "atmel_pwm",
1151         .id     = -1,
1152         .dev    = {
1153                 .platform_data          = &pwm_mask,
1154         },
1155         .resource       = pwm_resources,
1156         .num_resources  = ARRAY_SIZE(pwm_resources),
1157 };
1158
1159 void __init at91_add_device_pwm(u32 mask)
1160 {
1161         if (mask & (1 << AT91_PWM0))
1162                 at91_set_B_periph(AT91_PIN_PB7, 1);     /* enable PWM0 */
1163
1164         if (mask & (1 << AT91_PWM1))
1165                 at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM1 */
1166
1167         if (mask & (1 << AT91_PWM2))
1168                 at91_set_B_periph(AT91_PIN_PC29, 1);    /* enable PWM2 */
1169
1170         if (mask & (1 << AT91_PWM3))
1171                 at91_set_B_periph(AT91_PIN_PB29, 1);    /* enable PWM3 */
1172
1173         pwm_mask = mask;
1174
1175         platform_device_register(&at91sam9263_pwm0_device);
1176 }
1177 #else
1178 void __init at91_add_device_pwm(u32 mask) {}
1179 #endif
1180
1181
1182 /* --------------------------------------------------------------------
1183  *  SSC -- Synchronous Serial Controller
1184  * -------------------------------------------------------------------- */
1185
1186 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
1187 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
1188
1189 static struct resource ssc0_resources[] = {
1190         [0] = {
1191                 .start  = AT91SAM9263_BASE_SSC0,
1192                 .end    = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
1193                 .flags  = IORESOURCE_MEM,
1194         },
1195         [1] = {
1196                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1197                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1198                 .flags  = IORESOURCE_IRQ,
1199         },
1200 };
1201
1202 static struct platform_device at91sam9263_ssc0_device = {
1203         .name   = "at91rm9200_ssc",
1204         .id     = 0,
1205         .dev    = {
1206                 .dma_mask               = &ssc0_dmamask,
1207                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1208         },
1209         .resource       = ssc0_resources,
1210         .num_resources  = ARRAY_SIZE(ssc0_resources),
1211 };
1212
1213 static inline void configure_ssc0_pins(unsigned pins)
1214 {
1215         if (pins & ATMEL_SSC_TF)
1216                 at91_set_B_periph(AT91_PIN_PB0, 1);
1217         if (pins & ATMEL_SSC_TK)
1218                 at91_set_B_periph(AT91_PIN_PB1, 1);
1219         if (pins & ATMEL_SSC_TD)
1220                 at91_set_B_periph(AT91_PIN_PB2, 1);
1221         if (pins & ATMEL_SSC_RD)
1222                 at91_set_B_periph(AT91_PIN_PB3, 1);
1223         if (pins & ATMEL_SSC_RK)
1224                 at91_set_B_periph(AT91_PIN_PB4, 1);
1225         if (pins & ATMEL_SSC_RF)
1226                 at91_set_B_periph(AT91_PIN_PB5, 1);
1227 }
1228
1229 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
1230
1231 static struct resource ssc1_resources[] = {
1232         [0] = {
1233                 .start  = AT91SAM9263_BASE_SSC1,
1234                 .end    = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
1235                 .flags  = IORESOURCE_MEM,
1236         },
1237         [1] = {
1238                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1239                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1240                 .flags  = IORESOURCE_IRQ,
1241         },
1242 };
1243
1244 static struct platform_device at91sam9263_ssc1_device = {
1245         .name   = "at91rm9200_ssc",
1246         .id     = 1,
1247         .dev    = {
1248                 .dma_mask               = &ssc1_dmamask,
1249                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1250         },
1251         .resource       = ssc1_resources,
1252         .num_resources  = ARRAY_SIZE(ssc1_resources),
1253 };
1254
1255 static inline void configure_ssc1_pins(unsigned pins)
1256 {
1257         if (pins & ATMEL_SSC_TF)
1258                 at91_set_A_periph(AT91_PIN_PB6, 1);
1259         if (pins & ATMEL_SSC_TK)
1260                 at91_set_A_periph(AT91_PIN_PB7, 1);
1261         if (pins & ATMEL_SSC_TD)
1262                 at91_set_A_periph(AT91_PIN_PB8, 1);
1263         if (pins & ATMEL_SSC_RD)
1264                 at91_set_A_periph(AT91_PIN_PB9, 1);
1265         if (pins & ATMEL_SSC_RK)
1266                 at91_set_A_periph(AT91_PIN_PB10, 1);
1267         if (pins & ATMEL_SSC_RF)
1268                 at91_set_A_periph(AT91_PIN_PB11, 1);
1269 }
1270
1271 /*
1272  * SSC controllers are accessed through library code, instead of any
1273  * kind of all-singing/all-dancing driver.  For example one could be
1274  * used by a particular I2S audio codec's driver, while another one
1275  * on the same system might be used by a custom data capture driver.
1276  */
1277 void __init at91_add_device_ssc(unsigned id, unsigned pins)
1278 {
1279         struct platform_device *pdev;
1280
1281         /*
1282          * NOTE: caller is responsible for passing information matching
1283          * "pins" to whatever will be using each particular controller.
1284          */
1285         switch (id) {
1286         case AT91SAM9263_ID_SSC0:
1287                 pdev = &at91sam9263_ssc0_device;
1288                 configure_ssc0_pins(pins);
1289                 break;
1290         case AT91SAM9263_ID_SSC1:
1291                 pdev = &at91sam9263_ssc1_device;
1292                 configure_ssc1_pins(pins);
1293                 break;
1294         default:
1295                 return;
1296         }
1297
1298         platform_device_register(pdev);
1299 }
1300
1301 #else
1302 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1303 #endif
1304
1305
1306 /* --------------------------------------------------------------------
1307  *  UART
1308  * -------------------------------------------------------------------- */
1309
1310 #if defined(CONFIG_SERIAL_ATMEL)
1311
1312 static struct resource dbgu_resources[] = {
1313         [0] = {
1314                 .start  = AT91SAM9263_BASE_DBGU,
1315                 .end    = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
1316                 .flags  = IORESOURCE_MEM,
1317         },
1318         [1] = {
1319                 .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
1320                 .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
1321                 .flags  = IORESOURCE_IRQ,
1322         },
1323 };
1324
1325 static struct atmel_uart_data dbgu_data = {
1326         .use_dma_tx     = 0,
1327         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
1328         .rts_gpio       = -EINVAL,
1329 };
1330
1331 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1332
1333 static struct platform_device at91sam9263_dbgu_device = {
1334         .name           = "atmel_usart",
1335         .id             = 0,
1336         .dev            = {
1337                                 .dma_mask               = &dbgu_dmamask,
1338                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1339                                 .platform_data          = &dbgu_data,
1340         },
1341         .resource       = dbgu_resources,
1342         .num_resources  = ARRAY_SIZE(dbgu_resources),
1343 };
1344
1345 static inline void configure_dbgu_pins(void)
1346 {
1347         at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
1348         at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
1349 }
1350
1351 static struct resource uart0_resources[] = {
1352         [0] = {
1353                 .start  = AT91SAM9263_BASE_US0,
1354                 .end    = AT91SAM9263_BASE_US0 + SZ_16K - 1,
1355                 .flags  = IORESOURCE_MEM,
1356         },
1357         [1] = {
1358                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1359                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1360                 .flags  = IORESOURCE_IRQ,
1361         },
1362 };
1363
1364 static struct atmel_uart_data uart0_data = {
1365         .use_dma_tx     = 1,
1366         .use_dma_rx     = 1,
1367         .rts_gpio       = -EINVAL,
1368 };
1369
1370 static u64 uart0_dmamask = DMA_BIT_MASK(32);
1371
1372 static struct platform_device at91sam9263_uart0_device = {
1373         .name           = "atmel_usart",
1374         .id             = 1,
1375         .dev            = {
1376                                 .dma_mask               = &uart0_dmamask,
1377                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1378                                 .platform_data          = &uart0_data,
1379         },
1380         .resource       = uart0_resources,
1381         .num_resources  = ARRAY_SIZE(uart0_resources),
1382 };
1383
1384 static inline void configure_usart0_pins(unsigned pins)
1385 {
1386         at91_set_A_periph(AT91_PIN_PA26, 1);            /* TXD0 */
1387         at91_set_A_periph(AT91_PIN_PA27, 0);            /* RXD0 */
1388
1389         if (pins & ATMEL_UART_RTS)
1390                 at91_set_A_periph(AT91_PIN_PA28, 0);    /* RTS0 */
1391         if (pins & ATMEL_UART_CTS)
1392                 at91_set_A_periph(AT91_PIN_PA29, 0);    /* CTS0 */
1393 }
1394
1395 static struct resource uart1_resources[] = {
1396         [0] = {
1397                 .start  = AT91SAM9263_BASE_US1,
1398                 .end    = AT91SAM9263_BASE_US1 + SZ_16K - 1,
1399                 .flags  = IORESOURCE_MEM,
1400         },
1401         [1] = {
1402                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1403                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1404                 .flags  = IORESOURCE_IRQ,
1405         },
1406 };
1407
1408 static struct atmel_uart_data uart1_data = {
1409         .use_dma_tx     = 1,
1410         .use_dma_rx     = 1,
1411         .rts_gpio       = -EINVAL,
1412 };
1413
1414 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1415
1416 static struct platform_device at91sam9263_uart1_device = {
1417         .name           = "atmel_usart",
1418         .id             = 2,
1419         .dev            = {
1420                                 .dma_mask               = &uart1_dmamask,
1421                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1422                                 .platform_data          = &uart1_data,
1423         },
1424         .resource       = uart1_resources,
1425         .num_resources  = ARRAY_SIZE(uart1_resources),
1426 };
1427
1428 static inline void configure_usart1_pins(unsigned pins)
1429 {
1430         at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
1431         at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
1432
1433         if (pins & ATMEL_UART_RTS)
1434                 at91_set_B_periph(AT91_PIN_PD7, 0);     /* RTS1 */
1435         if (pins & ATMEL_UART_CTS)
1436                 at91_set_B_periph(AT91_PIN_PD8, 0);     /* CTS1 */
1437 }
1438
1439 static struct resource uart2_resources[] = {
1440         [0] = {
1441                 .start  = AT91SAM9263_BASE_US2,
1442                 .end    = AT91SAM9263_BASE_US2 + SZ_16K - 1,
1443                 .flags  = IORESOURCE_MEM,
1444         },
1445         [1] = {
1446                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1447                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1448                 .flags  = IORESOURCE_IRQ,
1449         },
1450 };
1451
1452 static struct atmel_uart_data uart2_data = {
1453         .use_dma_tx     = 1,
1454         .use_dma_rx     = 1,
1455         .rts_gpio       = -EINVAL,
1456 };
1457
1458 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1459
1460 static struct platform_device at91sam9263_uart2_device = {
1461         .name           = "atmel_usart",
1462         .id             = 3,
1463         .dev            = {
1464                                 .dma_mask               = &uart2_dmamask,
1465                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1466                                 .platform_data          = &uart2_data,
1467         },
1468         .resource       = uart2_resources,
1469         .num_resources  = ARRAY_SIZE(uart2_resources),
1470 };
1471
1472 static inline void configure_usart2_pins(unsigned pins)
1473 {
1474         at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
1475         at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
1476
1477         if (pins & ATMEL_UART_RTS)
1478                 at91_set_B_periph(AT91_PIN_PD5, 0);     /* RTS2 */
1479         if (pins & ATMEL_UART_CTS)
1480                 at91_set_B_periph(AT91_PIN_PD6, 0);     /* CTS2 */
1481 }
1482
1483 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1484
1485 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1486 {
1487         struct platform_device *pdev;
1488         struct atmel_uart_data *pdata;
1489
1490         switch (id) {
1491                 case 0:         /* DBGU */
1492                         pdev = &at91sam9263_dbgu_device;
1493                         configure_dbgu_pins();
1494                         break;
1495                 case AT91SAM9263_ID_US0:
1496                         pdev = &at91sam9263_uart0_device;
1497                         configure_usart0_pins(pins);
1498                         break;
1499                 case AT91SAM9263_ID_US1:
1500                         pdev = &at91sam9263_uart1_device;
1501                         configure_usart1_pins(pins);
1502                         break;
1503                 case AT91SAM9263_ID_US2:
1504                         pdev = &at91sam9263_uart2_device;
1505                         configure_usart2_pins(pins);
1506                         break;
1507                 default:
1508                         return;
1509         }
1510         pdata = pdev->dev.platform_data;
1511         pdata->num = portnr;            /* update to mapped ID */
1512
1513         if (portnr < ATMEL_MAX_UART)
1514                 at91_uarts[portnr] = pdev;
1515 }
1516
1517 void __init at91_add_device_serial(void)
1518 {
1519         int i;
1520
1521         for (i = 0; i < ATMEL_MAX_UART; i++) {
1522                 if (at91_uarts[i])
1523                         platform_device_register(at91_uarts[i]);
1524         }
1525 }
1526 #else
1527 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1528 void __init at91_add_device_serial(void) {}
1529 #endif
1530
1531
1532 /* -------------------------------------------------------------------- */
1533 /*
1534  * These devices are always present and don't need any board-specific
1535  * setup.
1536  */
1537 static int __init at91_add_standard_devices(void)
1538 {
1539         if (of_have_populated_dt())
1540                 return 0;
1541
1542         at91_add_device_rtt();
1543         at91_add_device_watchdog();
1544         at91_add_device_tc();
1545         return 0;
1546 }
1547
1548 arch_initcall(at91_add_standard_devices);