arch/arm/boot/dts/tegra30-colibri.dtsi

   1 #include <dt-bindings/input/input.h>
   2 #include "tegra30.dtsi"
   3
   4 /**
   5  * Toradex Colibri T30 device tree
   6  * Compatible for Revisions 1.1B/1.1C/1.1D
   7  */
   8 / {
   9         model = "Toradex Colibri T30";
  10         compatible = "toradex,colibri_t30-1024-v11b",
  11                      "toradex,colibri_t30-1024-v11c",
  12                      "toradex,colibri_t30-1024-v11d",
  13                      "toradex,colibri_t30-1024", "nvidia,tegra30";
  14
  15         aliases {
  16                 serial0 = &uarta;
  17                 serial1 = &uartd;
  18                 serial2 = &uartb;
  19         };
  20
  21         memory {
  22                 reg = <0x80000000 0x40000000>;
  23         };
  24
  25         host1x@50000000 {
  26                 hdmi@54280000 {
  27                         vdd-supply = <&sys_3v3_reg>;
  28                         pll-supply = <&vio_reg>;
  29
  30                         nvidia,hpd-gpio =
  31                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  32                         nvidia,ddc-i2c-bus = <&hdmiddc>;
  33                 };
  34         };
  35
  36         pinmux@70000868 {
  37                 pinctrl-names = "default";
  38                 pinctrl-0 = <&state_default>;
  39
  40                 state_default: pinmux {
  41                         /* SD-Card Slot */
  42                         kb_row10_ps2 {
  43                                 nvidia,pins = "kb_row10_ps2";
  44                                 nvidia,function = "sdmmc2";
  45                                 nvidia,pull = <0>;
  46                                 nvidia,tristate = <0>;
  47                         };
  48                         kb_row11_ps3 {
  49                                 nvidia,pins =   "kb_row11_ps3",
  50                                                 "kb_row12_ps4",
  51                                                 "kb_row13_ps5",
  52                                                 "kb_row14_ps6",
  53                                                 "kb_row15_ps7";
  54                                 nvidia,function = "sdmmc2";
  55                                 nvidia,pull = <2>;
  56                                 nvidia,tristate = <0>;
  57                         };
  58
  59                         /* eMMC */
  60                         sdmmc4_clk_pcc4 {
  61                                 nvidia,pins =   "sdmmc4_clk_pcc4",
  62                                                 "sdmmc4_rst_n_pcc3"; /* PLDWN?*/
  63                                 nvidia,function = "sdmmc4";
  64                                 nvidia,pull = <0>;
  65                                 nvidia,tristate = <0>;
  66                         };
  67                         sdmmc4_dat0_paa0 {
  68                                 nvidia,pins =   "sdmmc4_dat0_paa0",
  69                                                 "sdmmc4_dat1_paa1",
  70                                                 "sdmmc4_dat2_paa2",
  71                                                 "sdmmc4_dat3_paa3",
  72                                                 "sdmmc4_dat4_paa4",
  73                                                 "sdmmc4_dat5_paa5",
  74                                                 "sdmmc4_dat6_paa6",
  75                                                 "sdmmc4_dat7_paa7";
  76                                 nvidia,function = "sdmmc4";
  77                                 nvidia,pull = <2>;
  78                                 nvidia,tristate = <0>;
  79                         };
  80
  81                         /* UART A */
  82                         ulpi_data0 {
  83                                 nvidia,pins =   "ulpi_data0_po1",
  84                                                 "ulpi_data1_po2",
  85                                                 "ulpi_data2_po3",
  86                                                 "ulpi_data3_po4",
  87                                                 "ulpi_data4_po5",
  88                                                 "ulpi_data5_po6",
  89                                                 "ulpi_data6_po7",
  90                                                 "ulpi_data7_po0";
  91                                 nvidia,function = "uarta";
  92                                 nvidia,pull = <0>;
  93                                 nvidia,tristate = <0>;
  94                         };
  95
  96                         /* UART B */
  97                         uart2_rxd {
  98                                 nvidia,pins =   "uart2_rxd_pc3",
  99                                                 "uart2_txd_pc2";
 100                                 nvidia,function = "uartb";
 101                                 nvidia,pull = <0>;
 102                                 nvidia,tristate = <0>;
 103                         };
 104
 105                         /* UART D */
 106                         gmi_a16_pj7 {
 107                                 nvidia,pins =   "gmi_a16_pj7",
 108                                                 "gmi_a17_pb0",
 109                                                 "gmi_a18_pb1",
 110                                                 "gmi_a19_pk7";
 111                                 nvidia,function = "uartd";
 112                                 nvidia,pull = <0>;
 113                                 nvidia,tristate = <0>;
 114                         };
 115                 };
 116         };
 117
 118         hdmiddc: i2c@7000c700 {
 119                 clock-frequency = <100000>;
 120         };
 121
 122         i2c@7000d000 {
 123                 status = "okay";
 124                 clock-frequency = <100000>;
 125
 126                 pmic: tps65911@2d {
 127                         compatible = "ti,tps65911";
 128                         reg = <0x2d>;
 129
 130                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 131                         #interrupt-cells = <2>;
 132                         interrupt-controller;
 133
 134                         ti,system-power-controller;
 135
 136                         #gpio-cells = <2>;
 137                         gpio-controller;
 138
 139                         vcc1-supply = <&sys_3v3_reg>;
 140                         vcc2-supply = <&sys_3v3_reg>;
 141                         vcc3-supply = <&vio_reg>;
 142                         vcc4-supply = <&sys_3v3_reg>;
 143                         vcc5-supply = <&sys_3v3_reg>;
 144                         vcc6-supply = <&vio_reg>;
 145                         vcc7-supply = <&sys_5v0_reg>;
 146                         vccio-supply = <&sys_3v3_reg>;
 147
 148                         regulators {
 149                                 /* SW1: +V1.35_VDDIO_DDR */
 150                                 vdd1_reg: vdd1 {
 151                                         regulator-name = "vddio_ddr_1v35";
 152                                         regulator-min-microvolt = <1350000>;
 153                                         regulator-max-microvolt = <1350000>;
 154                                         regulator-always-on;
 155                                 };
 156
 157                                 /* VDD2 is not connected */
 158
 159                                 /* SW CTRL: +V1.0_VDD_CPU */
 160                                 vddctrl_reg: vddctrl {
 161                                         regulator-name = "vdd_cpu,vdd_sys";
 162                                         regulator-min-microvolt = <1000000>;
 163                                         regulator-max-microvolt = <1000000>;
 164                                         regulator-always-on;
 165                                 };
 166
 167                                 /* SWIO: +V1.8 */
 168                                 vio_reg: vio {
 169                                         regulator-name = "vdd_1v8_gen";
 170                                         regulator-min-microvolt = <1800000>;
 171                                         regulator-max-microvolt = <1800000>;
 172                                         regulator-always-on;
 173                                 };
 174
 175                                 /* LDO1 is not connected */
 176
 177                                 ldo2_reg: ldo2 {
 178                                         regulator-name = "en_3v3";
 179                                         regulator-min-microvolt = <3300000>;
 180                                         regulator-max-microvolt = <3300000>;
 181                                         regulator-always-on;
 182                                 };
 183
 184                                 /* LDO3 is not connected */
 185
 186                                 /* +V1.2_VDD_RTC */
 187                                 ldo4_reg: ldo4 {
 188                                         regulator-name = "vdd_rtc";
 189                                         regulator-min-microvolt = <1200000>;
 190                                         regulator-max-microvolt = <1200000>;
 191                                         regulator-always-on;
 192                                 };
 193
 194                                 /*
 195                                  * +V2.8_AVDD_VDAC
 196                                  * only required for analog RGB
 197                                  */
 198                                 ldo5_reg: ldo5 {
 199                                         regulator-name = "avdd_vdac";
 200                                         regulator-min-microvolt = <2800000>;
 201                                         regulator-max-microvolt = <2800000>;
 202                                         regulator-always-on;
 203                                 };
 204
 205                                 /*
 206                                  * +V1.05_AVDD_PLLE
 207                                  * avdd_plle should be 1.05V but LDO6 can't set
 208                                  * voltage in 50mV granularity
 209                                  */
 210                                 ldo6_reg: ldo6 {
 211                                         regulator-name = "avdd_plle";
 212                                         regulator-min-microvolt = <1100000>;
 213                                         regulator-max-microvolt = <1100000>;
 214                                 };
 215
 216                                 /* +V1.2_AVDD_PLL */
 217                                 ldo7_reg: ldo7 {
 218                                         regulator-name = "avdd_pll";
 219                                         regulator-min-microvolt = <1200000>;
 220                                         regulator-max-microvolt = <1200000>;
 221                                         regulator-always-on;
 222                                 };
 223
 224                                 /* +V1.0_VDD_DDR_HS */
 225                                 ldo8_reg: ldo8 {
 226                                         regulator-name = "vdd_ddr_hs";
 227                                         regulator-min-microvolt = <1000000>;
 228                                         regulator-max-microvolt = <1000000>;
 229                                         regulator-always-on;
 230                                 };
 231                         };
 232                 };
 233
 234                 /* SW: +V1.2_VDD_CORE */
 235                 tps62362@60 {
 236                         compatible = "ti,tps62362";
 237                         reg = <0x60>;
 238
 239                         regulator-name = "tps62362-vout";
 240                         regulator-min-microvolt = <900000>;
 241                         regulator-max-microvolt = <1400000>;
 242                         regulator-boot-on;
 243                         regulator-always-on;
 244                         ti,vsel0-state-low;
 245                         ti,vsel1-state-high;
 246                 };
 247         };
 248
 249         pmc@7000e400 {
 250                 status = "okay";
 251                 nvidia,invert-interrupt;
 252                 nvidia,suspend-mode = <1>;
 253                 nvidia,cpu-pwr-good-time = <5000>;
 254                 nvidia,cpu-pwr-off-time = <5000>;
 255                 nvidia,core-pwr-good-time = <3845 3845>;
 256                 nvidia,core-pwr-off-time = <0>;
 257                 nvidia,core-power-req-active-high;
 258                 nvidia,sys-clock-req-active-high;
 259         };
 260
 261         sdhci@78000200 {
 262                 status = "okay";
 263                 bus-width = <4>;
 264                 cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
 265                 no-1-8-v;
 266         };
 267
 268         /* eMMC */
 269         sdhci@78000600 {
 270                 status = "okay";
 271                 bus-width = <8>;
 272                 non-removable;
 273         };
 274
 275         /* EHCI instance 1: USB2_DP/N -> AX88772B */
 276         usb@7d004000 {
 277                 status = "okay";
 278         };
 279
 280         usb-phy@7d004000 {
 281                 status = "okay";
 282         };
 283
 284         clocks {
 285                 compatible = "simple-bus";
 286                 #address-cells = <1>;
 287                 #size-cells = <0>;
 288
 289                 clk32k_in: clock {
 290                         compatible = "fixed-clock";
 291                         reg=<0>;
 292                         #clock-cells = <0>;
 293                         clock-frequency = <32768>;
 294                 };
 295         };
 296
 297         regulators {
 298                 compatible = "simple-bus";
 299                 #address-cells = <1>;
 300                 #size-cells = <0>;
 301
 302                 sys_3v3_reg: regulator@100 {
 303                         compatible = "regulator-fixed";
 304                         reg = <100>;
 305                         regulator-name = "3v3";
 306                         regulator-min-microvolt = <3300000>;
 307                         regulator-max-microvolt = <3300000>;
 308                         regulator-always-on;
 309                 };
 310         };
 311 };