Merge branch 'async-scsi-resume' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux.git] / arch / arm / boot / dts / tegra114-dalmore.dts
1 /*
2  * This dts file supports Dalmore A04.
3  * Other board revisions are not supported
4  */
5
6 /dts-v1/;
7
8 #include <dt-bindings/input/input.h>
9 #include "tegra114.dtsi"
10
11 / {
12         model = "NVIDIA Tegra114 Dalmore evaluation board";
13         compatible = "nvidia,dalmore", "nvidia,tegra114";
14
15         aliases {
16                 rtc0 = "/i2c@7000d000/tps65913@58";
17                 rtc1 = "/rtc@7000e000";
18         };
19
20         memory {
21                 reg = <0x80000000 0x40000000>;
22         };
23
24         host1x@50000000 {
25                 hdmi@54280000 {
26                         status = "okay";
27
28                         vdd-supply = <&vdd_hdmi_reg>;
29                         pll-supply = <&palmas_smps3_reg>;
30
31                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
32                         nvidia,hpd-gpio =
33                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
34                 };
35
36                 dsi@54300000 {
37                         status = "okay";
38
39                         panel@0 {
40                                 compatible = "panasonic,vvx10f004b00",
41                                              "simple-panel";
42                                 reg = <0>;
43
44                                 power-supply = <&avdd_lcd_reg>;
45                                 backlight = <&backlight>;
46                         };
47                 };
48         };
49
50         pinmux@70000868 {
51                 pinctrl-names = "default";
52                 pinctrl-0 = <&state_default>;
53
54                 state_default: pinmux {
55                         clk1_out_pw4 {
56                                 nvidia,pins = "clk1_out_pw4";
57                                 nvidia,function = "extperiph1";
58                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
59                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
60                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
61                         };
62                         dap1_din_pn1 {
63                                 nvidia,pins = "dap1_din_pn1";
64                                 nvidia,function = "i2s0";
65                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
66                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
67                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
68                         };
69                         dap1_dout_pn2 {
70                                 nvidia,pins = "dap1_dout_pn2",
71                                                 "dap1_fs_pn0",
72                                                 "dap1_sclk_pn3";
73                                 nvidia,function = "i2s0";
74                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
75                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
76                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
77                         };
78                         dap2_din_pa4 {
79                                 nvidia,pins = "dap2_din_pa4";
80                                 nvidia,function = "i2s1";
81                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
82                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
83                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
84                         };
85                         dap2_dout_pa5 {
86                                 nvidia,pins = "dap2_dout_pa5",
87                                                 "dap2_fs_pa2",
88                                                 "dap2_sclk_pa3";
89                                 nvidia,function = "i2s1";
90                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
91                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
92                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
93                         };
94                         dap4_din_pp5 {
95                                 nvidia,pins = "dap4_din_pp5",
96                                                 "dap4_dout_pp6",
97                                                 "dap4_fs_pp4",
98                                                 "dap4_sclk_pp7";
99                                 nvidia,function = "i2s3";
100                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
101                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
102                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
103                         };
104                         dvfs_pwm_px0 {
105                                 nvidia,pins = "dvfs_pwm_px0",
106                                                 "dvfs_clk_px2";
107                                 nvidia,function = "cldvfs";
108                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
109                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
110                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
111                         };
112                         ulpi_clk_py0 {
113                                 nvidia,pins = "ulpi_clk_py0",
114                                                 "ulpi_data0_po1",
115                                                 "ulpi_data1_po2",
116                                                 "ulpi_data2_po3",
117                                                 "ulpi_data3_po4",
118                                                 "ulpi_data4_po5",
119                                                 "ulpi_data5_po6",
120                                                 "ulpi_data6_po7",
121                                                 "ulpi_data7_po0";
122                                 nvidia,function = "ulpi";
123                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
124                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
125                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
126                         };
127                         ulpi_dir_py1 {
128                                 nvidia,pins = "ulpi_dir_py1",
129                                                 "ulpi_nxt_py2";
130                                 nvidia,function = "ulpi";
131                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
132                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
133                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134                         };
135                         ulpi_stp_py3 {
136                                 nvidia,pins = "ulpi_stp_py3";
137                                 nvidia,function = "ulpi";
138                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
139                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
140                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
141                         };
142                         cam_i2c_scl_pbb1 {
143                                 nvidia,pins = "cam_i2c_scl_pbb1",
144                                                 "cam_i2c_sda_pbb2";
145                                 nvidia,function = "i2c3";
146                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
147                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
148                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
149                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
150                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
151                         };
152                         cam_mclk_pcc0 {
153                                 nvidia,pins = "cam_mclk_pcc0",
154                                                 "pbb0";
155                                 nvidia,function = "vi_alt3";
156                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
157                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
158                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
159                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
160                         };
161                         gen2_i2c_scl_pt5 {
162                                 nvidia,pins = "gen2_i2c_scl_pt5",
163                                                 "gen2_i2c_sda_pt6";
164                                 nvidia,function = "i2c2";
165                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
166                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
167                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
168                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
169                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
170                         };
171                         gmi_a16_pj7 {
172                                 nvidia,pins = "gmi_a16_pj7";
173                                 nvidia,function = "uartd";
174                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
175                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
176                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
177                         };
178                         gmi_a17_pb0 {
179                                 nvidia,pins = "gmi_a17_pb0",
180                                                 "gmi_a18_pb1";
181                                 nvidia,function = "uartd";
182                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
183                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
184                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
185                         };
186                         gmi_a19_pk7 {
187                                 nvidia,pins = "gmi_a19_pk7";
188                                 nvidia,function = "uartd";
189                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
190                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
191                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
192                         };
193                         gmi_ad5_pg5 {
194                                 nvidia,pins = "gmi_ad5_pg5",
195                                                 "gmi_cs6_n_pi3",
196                                                 "gmi_wr_n_pi0";
197                                 nvidia,function = "spi4";
198                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
199                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
200                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
201                         };
202                         gmi_ad6_pg6 {
203                                 nvidia,pins = "gmi_ad6_pg6",
204                                                 "gmi_ad7_pg7";
205                                 nvidia,function = "spi4";
206                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
207                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
208                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
209                         };
210                         gmi_ad12_ph4 {
211                                 nvidia,pins = "gmi_ad12_ph4";
212                                 nvidia,function = "rsvd4";
213                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
215                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
216                         };
217                         gmi_ad9_ph1 {
218                                 nvidia,pins = "gmi_ad9_ph1";
219                                 nvidia,function = "pwm1";
220                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
221                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
222                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
223                         };
224                         gmi_cs1_n_pj2 {
225                                 nvidia,pins = "gmi_cs1_n_pj2",
226                                                 "gmi_oe_n_pi1";
227                                 nvidia,function = "soc";
228                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
229                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
230                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
231                         };
232                         clk2_out_pw5 {
233                                 nvidia,pins = "clk2_out_pw5";
234                                 nvidia,function = "extperiph2";
235                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
236                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
237                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
238                         };
239                         sdmmc1_clk_pz0 {
240                                 nvidia,pins = "sdmmc1_clk_pz0";
241                                 nvidia,function = "sdmmc1";
242                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
243                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
244                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
245                         };
246                         sdmmc1_cmd_pz1 {
247                                 nvidia,pins = "sdmmc1_cmd_pz1",
248                                                 "sdmmc1_dat0_py7",
249                                                 "sdmmc1_dat1_py6",
250                                                 "sdmmc1_dat2_py5",
251                                                 "sdmmc1_dat3_py4";
252                                 nvidia,function = "sdmmc1";
253                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
254                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
255                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
256                         };
257                         sdmmc1_wp_n_pv3 {
258                                 nvidia,pins = "sdmmc1_wp_n_pv3";
259                                 nvidia,function = "spi4";
260                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
261                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
262                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
263                         };
264                         sdmmc3_clk_pa6 {
265                                 nvidia,pins = "sdmmc3_clk_pa6";
266                                 nvidia,function = "sdmmc3";
267                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
268                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
269                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
270                         };
271                         sdmmc3_cmd_pa7 {
272                                 nvidia,pins = "sdmmc3_cmd_pa7",
273                                                 "sdmmc3_dat0_pb7",
274                                                 "sdmmc3_dat1_pb6",
275                                                 "sdmmc3_dat2_pb5",
276                                                 "sdmmc3_dat3_pb4",
277                                                 "kb_col4_pq4",
278                                                 "sdmmc3_clk_lb_out_pee4",
279                                                 "sdmmc3_clk_lb_in_pee5";
280                                 nvidia,function = "sdmmc3";
281                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
282                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
283                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
284                         };
285                         sdmmc4_clk_pcc4 {
286                                 nvidia,pins = "sdmmc4_clk_pcc4";
287                                 nvidia,function = "sdmmc4";
288                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
289                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
290                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
291                         };
292                         sdmmc4_cmd_pt7 {
293                                 nvidia,pins = "sdmmc4_cmd_pt7",
294                                                 "sdmmc4_dat0_paa0",
295                                                 "sdmmc4_dat1_paa1",
296                                                 "sdmmc4_dat2_paa2",
297                                                 "sdmmc4_dat3_paa3",
298                                                 "sdmmc4_dat4_paa4",
299                                                 "sdmmc4_dat5_paa5",
300                                                 "sdmmc4_dat6_paa6",
301                                                 "sdmmc4_dat7_paa7";
302                                 nvidia,function = "sdmmc4";
303                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
304                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
305                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
306                         };
307                         clk_32k_out_pa0 {
308                                 nvidia,pins = "clk_32k_out_pa0";
309                                 nvidia,function = "blink";
310                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
311                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
312                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
313                         };
314                         kb_col0_pq0 {
315                                 nvidia,pins = "kb_col0_pq0",
316                                                 "kb_col1_pq1",
317                                                 "kb_col2_pq2",
318                                                 "kb_row0_pr0",
319                                                 "kb_row1_pr1",
320                                                 "kb_row2_pr2";
321                                 nvidia,function = "kbc";
322                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
323                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
324                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
325                         };
326                         dap3_din_pp1 {
327                                 nvidia,pins = "dap3_din_pp1",
328                                                 "dap3_sclk_pp3";
329                                 nvidia,function = "displayb";
330                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
331                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
332                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
333                         };
334                         pv0 {
335                                 nvidia,pins = "pv0";
336                                 nvidia,function = "rsvd4";
337                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
338                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
339                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
340                         };
341                         kb_row7_pr7 {
342                                 nvidia,pins = "kb_row7_pr7";
343                                 nvidia,function = "rsvd2";
344                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
345                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
346                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
347                         };
348                         kb_row10_ps2 {
349                                 nvidia,pins = "kb_row10_ps2";
350                                 nvidia,function = "uarta";
351                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
352                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
353                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
354                         };
355                         kb_row9_ps1 {
356                                 nvidia,pins = "kb_row9_ps1";
357                                 nvidia,function = "uarta";
358                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
359                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
360                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
361                         };
362                         pwr_i2c_scl_pz6 {
363                                 nvidia,pins = "pwr_i2c_scl_pz6",
364                                                 "pwr_i2c_sda_pz7";
365                                 nvidia,function = "i2cpwr";
366                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
367                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
368                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
369                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
370                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
371                         };
372                         sys_clk_req_pz5 {
373                                 nvidia,pins = "sys_clk_req_pz5";
374                                 nvidia,function = "sysclk";
375                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
376                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
377                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
378                         };
379                         core_pwr_req {
380                                 nvidia,pins = "core_pwr_req";
381                                 nvidia,function = "pwron";
382                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
383                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
384                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
385                         };
386                         cpu_pwr_req {
387                                 nvidia,pins = "cpu_pwr_req";
388                                 nvidia,function = "cpu";
389                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
390                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
391                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
392                         };
393                         pwr_int_n {
394                                 nvidia,pins = "pwr_int_n";
395                                 nvidia,function = "pmi";
396                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
397                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
398                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
399                         };
400                         reset_out_n {
401                                 nvidia,pins = "reset_out_n";
402                                 nvidia,function = "reset_out_n";
403                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
404                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
405                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
406                         };
407                         clk3_out_pee0 {
408                                 nvidia,pins = "clk3_out_pee0";
409                                 nvidia,function = "extperiph3";
410                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
411                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
412                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
413                         };
414                         gen1_i2c_scl_pc4 {
415                                 nvidia,pins = "gen1_i2c_scl_pc4",
416                                                 "gen1_i2c_sda_pc5";
417                                 nvidia,function = "i2c1";
418                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
419                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
420                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
421                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
422                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
423                         };
424                         uart2_cts_n_pj5 {
425                                 nvidia,pins = "uart2_cts_n_pj5";
426                                 nvidia,function = "uartb";
427                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
428                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
429                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
430                         };
431                         uart2_rts_n_pj6 {
432                                 nvidia,pins = "uart2_rts_n_pj6";
433                                 nvidia,function = "uartb";
434                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
435                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
436                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
437                         };
438                         uart2_rxd_pc3 {
439                                 nvidia,pins = "uart2_rxd_pc3";
440                                 nvidia,function = "irda";
441                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
442                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
443                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
444                         };
445                         uart2_txd_pc2 {
446                                 nvidia,pins = "uart2_txd_pc2";
447                                 nvidia,function = "irda";
448                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
449                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
450                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
451                         };
452                         uart3_cts_n_pa1 {
453                                 nvidia,pins = "uart3_cts_n_pa1",
454                                                 "uart3_rxd_pw7";
455                                 nvidia,function = "uartc";
456                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
457                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
458                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
459                         };
460                         uart3_rts_n_pc0 {
461                                 nvidia,pins = "uart3_rts_n_pc0",
462                                                 "uart3_txd_pw6";
463                                 nvidia,function = "uartc";
464                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
465                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
466                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
467                         };
468                         owr {
469                                 nvidia,pins = "owr";
470                                 nvidia,function = "owr";
471                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
472                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
473                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
474                         };
475                         hdmi_cec_pee3 {
476                                 nvidia,pins = "hdmi_cec_pee3";
477                                 nvidia,function = "cec";
478                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
479                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
480                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
481                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
482                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
483                         };
484                         ddc_scl_pv4 {
485                                 nvidia,pins = "ddc_scl_pv4",
486                                                 "ddc_sda_pv5";
487                                 nvidia,function = "i2c4";
488                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
489                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
490                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
491                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
492                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
493                         };
494                         spdif_in_pk6 {
495                                 nvidia,pins = "spdif_in_pk6";
496                                 nvidia,function = "usb";
497                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
498                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
499                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
500                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
501                         };
502                         usb_vbus_en0_pn4 {
503                                 nvidia,pins = "usb_vbus_en0_pn4";
504                                 nvidia,function = "usb";
505                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
506                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
507                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
508                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
509                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
510                         };
511                         gpio_x6_aud_px6 {
512                                 nvidia,pins = "gpio_x6_aud_px6";
513                                 nvidia,function = "spi6";
514                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
515                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
516                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
517                         };
518                         gpio_x4_aud_px4 {
519                                 nvidia,pins = "gpio_x4_aud_px4",
520                                                 "gpio_x7_aud_px7";
521                                 nvidia,function = "rsvd1";
522                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
523                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
524                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
525                         };
526                         gpio_x5_aud_px5 {
527                                 nvidia,pins = "gpio_x5_aud_px5";
528                                 nvidia,function = "rsvd1";
529                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
530                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
531                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
532                         };
533                         gpio_w2_aud_pw2 {
534                                 nvidia,pins = "gpio_w2_aud_pw2";
535                                 nvidia,function = "rsvd2";
536                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
537                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
538                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
539                         };
540                         gpio_w3_aud_pw3 {
541                                 nvidia,pins = "gpio_w3_aud_pw3";
542                                 nvidia,function = "spi6";
543                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
544                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
545                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
546                         };
547                         gpio_x1_aud_px1 {
548                                 nvidia,pins = "gpio_x1_aud_px1";
549                                 nvidia,function = "rsvd4";
550                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
551                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
552                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
553                         };
554                         gpio_x3_aud_px3 {
555                                 nvidia,pins = "gpio_x3_aud_px3";
556                                 nvidia,function = "rsvd4";
557                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
558                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
559                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
560                         };
561                         dap3_fs_pp0 {
562                                 nvidia,pins = "dap3_fs_pp0";
563                                 nvidia,function = "i2s2";
564                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
565                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
566                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
567                         };
568                         dap3_dout_pp2 {
569                                 nvidia,pins = "dap3_dout_pp2";
570                                 nvidia,function = "i2s2";
571                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
572                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
573                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
574                         };
575                         pv1 {
576                                 nvidia,pins = "pv1";
577                                 nvidia,function = "rsvd1";
578                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
579                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
580                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
581                         };
582                         pbb3 {
583                                 nvidia,pins = "pbb3",
584                                                 "pbb5",
585                                                 "pbb6",
586                                                 "pbb7";
587                                 nvidia,function = "rsvd4";
588                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
589                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
590                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
591                         };
592                         pcc1 {
593                                 nvidia,pins = "pcc1",
594                                                 "pcc2";
595                                 nvidia,function = "rsvd4";
596                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
597                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
598                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
599                         };
600                         gmi_ad0_pg0 {
601                                 nvidia,pins = "gmi_ad0_pg0",
602                                                 "gmi_ad1_pg1";
603                                 nvidia,function = "gmi";
604                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
605                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
606                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
607                         };
608                         gmi_ad10_ph2 {
609                                 nvidia,pins = "gmi_ad10_ph2",
610                                                 "gmi_ad11_ph3",
611                                                 "gmi_ad13_ph5",
612                                                 "gmi_ad8_ph0",
613                                                 "gmi_clk_pk1";
614                                 nvidia,function = "gmi";
615                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
616                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
617                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
618                         };
619                         gmi_ad2_pg2 {
620                                 nvidia,pins = "gmi_ad2_pg2",
621                                                 "gmi_ad3_pg3";
622                                 nvidia,function = "gmi";
623                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
624                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
625                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
626                         };
627                         gmi_adv_n_pk0 {
628                                 nvidia,pins = "gmi_adv_n_pk0",
629                                                 "gmi_cs0_n_pj0",
630                                                 "gmi_cs2_n_pk3",
631                                                 "gmi_cs4_n_pk2",
632                                                 "gmi_cs7_n_pi6",
633                                                 "gmi_dqs_p_pj3",
634                                                 "gmi_iordy_pi5",
635                                                 "gmi_wp_n_pc7";
636                                 nvidia,function = "gmi";
637                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
638                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
639                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
640                         };
641                         gmi_cs3_n_pk4 {
642                                 nvidia,pins = "gmi_cs3_n_pk4";
643                                 nvidia,function = "gmi";
644                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
645                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
646                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
647                         };
648                         clk2_req_pcc5 {
649                                 nvidia,pins = "clk2_req_pcc5";
650                                 nvidia,function = "rsvd4";
651                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
652                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
653                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
654                         };
655                         kb_col3_pq3 {
656                                 nvidia,pins = "kb_col3_pq3",
657                                                 "kb_col6_pq6",
658                                                 "kb_col7_pq7";
659                                 nvidia,function = "kbc";
660                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
661                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
662                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
663                         };
664                         kb_col5_pq5 {
665                                 nvidia,pins = "kb_col5_pq5";
666                                 nvidia,function = "kbc";
667                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
668                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
669                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
670                         };
671                         kb_row3_pr3 {
672                                 nvidia,pins = "kb_row3_pr3",
673                                                 "kb_row4_pr4",
674                                                 "kb_row6_pr6",
675                                                 "kb_row8_ps0";
676                                 nvidia,function = "kbc";
677                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
678                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
679                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
680                         };
681                         clk3_req_pee1 {
682                                 nvidia,pins = "clk3_req_pee1";
683                                 nvidia,function = "rsvd4";
684                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
685                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
686                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
687                         };
688                         pu4 {
689                                 nvidia,pins = "pu4";
690                                 nvidia,function = "displayb";
691                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
692                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
693                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
694                         };
695                         pu5 {
696                                 nvidia,pins = "pu5",
697                                                 "pu6";
698                                 nvidia,function = "displayb";
699                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
700                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
701                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
702                         };
703                         hdmi_int_pn7 {
704                                 nvidia,pins = "hdmi_int_pn7";
705                                 nvidia,function = "rsvd1";
706                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
707                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
708                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
709                         };
710                         clk1_req_pee2 {
711                                 nvidia,pins = "clk1_req_pee2",
712                                                 "usb_vbus_en1_pn5";
713                                 nvidia,function = "rsvd4";
714                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
715                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
716                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
717                         };
718
719                         drive_sdio1 {
720                                 nvidia,pins = "drive_sdio1";
721                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
722                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
723                                 nvidia,pull-down-strength = <36>;
724                                 nvidia,pull-up-strength = <20>;
725                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
726                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
727                         };
728                         drive_sdio3 {
729                                 nvidia,pins = "drive_sdio3";
730                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
731                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
732                                 nvidia,pull-down-strength = <22>;
733                                 nvidia,pull-up-strength = <36>;
734                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
735                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
736                         };
737                         drive_gma {
738                                 nvidia,pins = "drive_gma";
739                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
740                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
741                                 nvidia,pull-down-strength = <2>;
742                                 nvidia,pull-up-strength = <1>;
743                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
744                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
745                         };
746                 };
747         };
748
749         serial@70006300 {
750                 status = "okay";
751         };
752
753         pwm@7000a000 {
754                 status = "okay";
755         };
756
757         i2c@7000c000 {
758                 status = "okay";
759                 clock-frequency = <100000>;
760
761                 battery: smart-battery@b {
762                         compatible = "ti,bq20z45", "sbs,sbs-battery";
763                         reg = <0xb>;
764                         battery-name = "battery";
765                         sbs,i2c-retry-count = <2>;
766                         sbs,poll-retry-count = <100>;
767                         power-supplies = <&charger>;
768                 };
769
770                 rt5640: rt5640@1c {
771                         compatible = "realtek,rt5640";
772                         reg = <0x1c>;
773                         interrupt-parent = <&gpio>;
774                         interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
775                         realtek,ldo1-en-gpios =
776                                 <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
777                 };
778
779                 temperature-sensor@4c {
780                         compatible = "onnn,nct1008";
781                         reg = <0x4c>;
782                         vcc-supply = <&palmas_ldo6_reg>;
783                         interrupt-parent = <&gpio>;
784                         interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_LOW>;
785                 };
786         };
787
788         hdmi_ddc: i2c@7000c700 {
789                 status = "okay";
790         };
791
792         i2c@7000d000 {
793                 status = "okay";
794                 clock-frequency = <400000>;
795
796                 tps51632@43 {
797                         compatible = "ti,tps51632";
798                         reg = <0x43>;
799                         regulator-name = "vdd-cpu";
800                         regulator-min-microvolt = <500000>;
801                         regulator-max-microvolt = <1520000>;
802                         regulator-boot-on;
803                         regulator-always-on;
804                 };
805
806                 tps65090@48 {
807                         compatible = "ti,tps65090";
808                         reg = <0x48>;
809                         interrupt-parent = <&gpio>;
810                         interrupts = <TEGRA_GPIO(J, 0) IRQ_TYPE_LEVEL_HIGH>;
811
812                         vsys1-supply = <&vdd_ac_bat_reg>;
813                         vsys2-supply = <&vdd_ac_bat_reg>;
814                         vsys3-supply = <&vdd_ac_bat_reg>;
815                         infet1-supply = <&vdd_ac_bat_reg>;
816                         infet2-supply = <&vdd_ac_bat_reg>;
817                         infet3-supply = <&tps65090_dcdc2_reg>;
818                         infet4-supply = <&tps65090_dcdc2_reg>;
819                         infet5-supply = <&tps65090_dcdc2_reg>;
820                         infet6-supply = <&tps65090_dcdc2_reg>;
821                         infet7-supply = <&tps65090_dcdc2_reg>;
822                         vsys-l1-supply = <&vdd_ac_bat_reg>;
823                         vsys-l2-supply = <&vdd_ac_bat_reg>;
824
825                         charger: charger {
826                                 compatible = "ti,tps65090-charger";
827                                 ti,enable-low-current-chrg;
828                         };
829
830                         regulators {
831                                 tps65090_dcdc1_reg: dcdc1 {
832                                         regulator-name = "vdd-sys-5v0";
833                                         regulator-always-on;
834                                         regulator-boot-on;
835                                 };
836
837                                 tps65090_dcdc2_reg: dcdc2 {
838                                         regulator-name = "vdd-sys-3v3";
839                                         regulator-always-on;
840                                         regulator-boot-on;
841                                 };
842
843                                 tps65090_dcdc3_reg: dcdc3 {
844                                         regulator-name = "vdd-ao";
845                                         regulator-always-on;
846                                         regulator-boot-on;
847                                 };
848
849                                 vdd_bl_reg: fet1 {
850                                         regulator-name = "vdd-lcd-bl";
851                                 };
852
853                                 fet3 {
854                                         regulator-name = "vdd-modem-3v3";
855                                 };
856
857                                 avdd_lcd_reg: fet4 {
858                                         regulator-name = "avdd-lcd";
859                                 };
860
861                                 fet5 {
862                                         regulator-name = "vdd-lvds";
863                                 };
864
865                                 fet6 {
866                                         regulator-name = "vdd-sd-slot";
867                                         regulator-always-on;
868                                         regulator-boot-on;
869                                 };
870
871                                 fet7 {
872                                         regulator-name = "vdd-com-3v3";
873                                 };
874
875                                 ldo1 {
876                                         regulator-name = "vdd-sby-5v0";
877                                         regulator-always-on;
878                                         regulator-boot-on;
879                                 };
880
881                                 ldo2 {
882                                         regulator-name = "vdd-sby-3v3";
883                                         regulator-always-on;
884                                         regulator-boot-on;
885                                 };
886                         };
887                 };
888
889                 palmas: tps65913@58 {
890                         compatible = "ti,palmas";
891                         reg = <0x58>;
892                         interrupts = <0 86 IRQ_TYPE_LEVEL_LOW>;
893
894                         #interrupt-cells = <2>;
895                         interrupt-controller;
896
897                         ti,system-power-controller;
898
899                         palmas_gpio: gpio {
900                                 compatible = "ti,palmas-gpio";
901                                 gpio-controller;
902                                 #gpio-cells = <2>;
903                         };
904
905                         pmic {
906                                 compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
907                                 smps1-in-supply = <&tps65090_dcdc3_reg>;
908                                 smps3-in-supply = <&tps65090_dcdc3_reg>;
909                                 smps4-in-supply = <&tps65090_dcdc2_reg>;
910                                 smps7-in-supply = <&tps65090_dcdc2_reg>;
911                                 smps8-in-supply = <&tps65090_dcdc2_reg>;
912                                 smps9-in-supply = <&tps65090_dcdc2_reg>;
913                                 ldo1-in-supply = <&tps65090_dcdc2_reg>;
914                                 ldo2-in-supply = <&tps65090_dcdc2_reg>;
915                                 ldo3-in-supply = <&palmas_smps3_reg>;
916                                 ldo4-in-supply = <&tps65090_dcdc2_reg>;
917                                 ldo5-in-supply = <&vdd_ac_bat_reg>;
918                                 ldo6-in-supply = <&tps65090_dcdc2_reg>;
919                                 ldo7-in-supply = <&tps65090_dcdc2_reg>;
920                                 ldo8-in-supply = <&tps65090_dcdc3_reg>;
921                                 ldo9-in-supply = <&palmas_smps9_reg>;
922                                 ldoln-in-supply = <&tps65090_dcdc1_reg>;
923                                 ldousb-in-supply = <&tps65090_dcdc1_reg>;
924
925                                 regulators {
926                                         smps12 {
927                                                 regulator-name = "vddio-ddr";
928                                                 regulator-min-microvolt = <1350000>;
929                                                 regulator-max-microvolt = <1350000>;
930                                                 regulator-always-on;
931                                                 regulator-boot-on;
932                                         };
933
934                                         palmas_smps3_reg: smps3 {
935                                                 regulator-name = "vddio-1v8";
936                                                 regulator-min-microvolt = <1800000>;
937                                                 regulator-max-microvolt = <1800000>;
938                                                 regulator-always-on;
939                                                 regulator-boot-on;
940                                         };
941
942                                         smps45 {
943                                                 regulator-name = "vdd-core";
944                                                 regulator-min-microvolt = <900000>;
945                                                 regulator-max-microvolt = <1400000>;
946                                                 regulator-always-on;
947                                                 regulator-boot-on;
948                                         };
949
950                                         smps457 {
951                                                 regulator-name = "vdd-core";
952                                                 regulator-min-microvolt = <900000>;
953                                                 regulator-max-microvolt = <1400000>;
954                                                 regulator-always-on;
955                                                 regulator-boot-on;
956                                         };
957
958                                         smps8 {
959                                                 regulator-name = "avdd-pll";
960                                                 regulator-min-microvolt = <1050000>;
961                                                 regulator-max-microvolt = <1050000>;
962                                                 regulator-always-on;
963                                                 regulator-boot-on;
964                                         };
965
966                                         palmas_smps9_reg: smps9 {
967                                                 regulator-name = "sdhci-vdd-sd-slot";
968                                                 regulator-min-microvolt = <2800000>;
969                                                 regulator-max-microvolt = <2800000>;
970                                                 regulator-always-on;
971                                         };
972
973                                         ldo1 {
974                                                 regulator-name = "avdd-cam1";
975                                                 regulator-min-microvolt = <2800000>;
976                                                 regulator-max-microvolt = <2800000>;
977                                         };
978
979                                         ldo2 {
980                                                 regulator-name = "avdd-cam2";
981                                                 regulator-min-microvolt = <2800000>;
982                                                 regulator-max-microvolt = <2800000>;
983                                         };
984
985                                         ldo3 {
986                                                 regulator-name = "avdd-dsi-csi";
987                                                 regulator-min-microvolt = <1200000>;
988                                                 regulator-max-microvolt = <1200000>;
989                                                 regulator-always-on;
990                                                 regulator-boot-on;
991                                         };
992
993                                         ldo4 {
994                                                 regulator-name = "vpp-fuse";
995                                                 regulator-min-microvolt = <1800000>;
996                                                 regulator-max-microvolt = <1800000>;
997                                         };
998
999                                         palmas_ldo6_reg: ldo6 {
1000                                                 regulator-name = "vdd-sensor-2v85";
1001                                                 regulator-min-microvolt = <2850000>;
1002                                                 regulator-max-microvolt = <2850000>;
1003                                         };
1004
1005                                         ldo7 {
1006                                                 regulator-name = "vdd-af-cam1";
1007                                                 regulator-min-microvolt = <2800000>;
1008                                                 regulator-max-microvolt = <2800000>;
1009                                         };
1010
1011                                         ldo8 {
1012                                                 regulator-name = "vdd-rtc";
1013                                                 regulator-min-microvolt = <900000>;
1014                                                 regulator-max-microvolt = <900000>;
1015                                                 regulator-always-on;
1016                                                 regulator-boot-on;
1017                                                 ti,enable-ldo8-tracking;
1018                                         };
1019
1020                                         ldo9 {
1021                                                 regulator-name = "vddio-sdmmc-2";
1022                                                 regulator-min-microvolt = <1800000>;
1023                                                 regulator-max-microvolt = <3300000>;
1024                                                 regulator-always-on;
1025                                                 regulator-boot-on;
1026                                         };
1027
1028                                         ldoln {
1029                                                 regulator-name = "hvdd-usb";
1030                                                 regulator-min-microvolt = <3300000>;
1031                                                 regulator-max-microvolt = <3300000>;
1032                                         };
1033
1034                                         ldousb {
1035                                                 regulator-name = "avdd-usb";
1036                                                 regulator-min-microvolt = <3300000>;
1037                                                 regulator-max-microvolt = <3300000>;
1038                                                 regulator-always-on;
1039                                                 regulator-boot-on;
1040                                         };
1041
1042                                         regen1 {
1043                                                 regulator-name = "rail-3v3";
1044                                                 regulator-max-microvolt = <3300000>;
1045                                                 regulator-always-on;
1046                                                 regulator-boot-on;
1047                                         };
1048
1049                                         regen2 {
1050                                                 regulator-name = "rail-5v0";
1051                                                 regulator-max-microvolt = <5000000>;
1052                                                 regulator-always-on;
1053                                                 regulator-boot-on;
1054                                         };
1055                                 };
1056                         };
1057
1058                         rtc {
1059                                 compatible = "ti,palmas-rtc";
1060                                 interrupt-parent = <&palmas>;
1061                                 interrupts = <8 0>;
1062                         };
1063
1064                         pinmux {
1065                                 compatible = "ti,tps65913-pinctrl";
1066                                 pinctrl-names = "default";
1067                                 pinctrl-0 = <&palmas_default>;
1068
1069                                 palmas_default: pinmux {
1070                                         pin_gpio6 {
1071                                                 pins = "gpio6";
1072                                                 function = "gpio";
1073                                         };
1074                                 };
1075                         };
1076                 };
1077         };
1078
1079         spi@7000da00 {
1080                 status = "okay";
1081                 spi-max-frequency = <25000000>;
1082                 spi-flash@0 {
1083                         compatible = "winbond,w25q32dw";
1084                         reg = <0>;
1085                         spi-max-frequency = <20000000>;
1086                 };
1087         };
1088
1089         pmc@7000e400 {
1090                 nvidia,invert-interrupt;
1091                 nvidia,suspend-mode = <1>;
1092                 nvidia,cpu-pwr-good-time = <500>;
1093                 nvidia,cpu-pwr-off-time = <300>;
1094                 nvidia,core-pwr-good-time = <641 3845>;
1095                 nvidia,core-pwr-off-time = <61036>;
1096                 nvidia,core-power-req-active-high;
1097                 nvidia,sys-clock-req-active-high;
1098         };
1099
1100         ahub@70080000 {
1101                 i2s@70080400 {
1102                         status = "okay";
1103                 };
1104         };
1105
1106         sdhci@78000400 {
1107                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1108                 bus-width = <4>;
1109                 status = "okay";
1110         };
1111
1112         sdhci@78000600 {
1113                 bus-width = <8>;
1114                 status = "okay";
1115                 non-removable;
1116         };
1117
1118         usb@7d008000 {
1119                 status = "okay";
1120         };
1121
1122         usb-phy@7d008000 {
1123                 status = "okay";
1124                 vbus-supply = <&usb3_vbus_reg>;
1125         };
1126
1127         backlight: backlight {
1128                 compatible = "pwm-backlight";
1129
1130                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1131                 power-supply = <&vdd_bl_reg>;
1132                 pwms = <&pwm 1 1000000>;
1133
1134                 brightness-levels = <0 4 8 16 32 64 128 255>;
1135                 default-brightness-level = <6>;
1136         };
1137
1138         clocks {
1139                 compatible = "simple-bus";
1140                 #address-cells = <1>;
1141                 #size-cells = <0>;
1142
1143                 clk32k_in: clock@0 {
1144                         compatible = "fixed-clock";
1145                         reg=<0>;
1146                         #clock-cells = <0>;
1147                         clock-frequency = <32768>;
1148                 };
1149         };
1150
1151         gpio-keys {
1152                 compatible = "gpio-keys";
1153
1154                 home {
1155                         label = "Home";
1156                         gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1157                         linux,code = <KEY_HOME>;
1158                 };
1159
1160                 power {
1161                         label = "Power";
1162                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1163                         linux,code = <KEY_POWER>;
1164                         gpio-key,wakeup;
1165                 };
1166
1167                 volume_down {
1168                         label = "Volume Down";
1169                         gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1170                         linux,code = <KEY_VOLUMEDOWN>;
1171                 };
1172
1173                 volume_up {
1174                         label = "Volume Up";
1175                         gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1176                         linux,code = <KEY_VOLUMEUP>;
1177                 };
1178         };
1179
1180         regulators {
1181                 compatible = "simple-bus";
1182                 #address-cells = <1>;
1183                 #size-cells = <0>;
1184
1185                 vdd_ac_bat_reg: regulator@0 {
1186                         compatible = "regulator-fixed";
1187                         reg = <0>;
1188                         regulator-name = "vdd_ac_bat";
1189                         regulator-min-microvolt = <5000000>;
1190                         regulator-max-microvolt = <5000000>;
1191                         regulator-always-on;
1192                 };
1193
1194                 dvdd_ts_reg: regulator@1 {
1195                         compatible = "regulator-fixed";
1196                         reg = <1>;
1197                         regulator-name = "dvdd_ts";
1198                         regulator-min-microvolt = <1800000>;
1199                         regulator-max-microvolt = <1800000>;
1200                         enable-active-high;
1201                         gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1202                 };
1203
1204                 usb1_vbus_reg: regulator@3 {
1205                         compatible = "regulator-fixed";
1206                         reg = <3>;
1207                         regulator-name = "usb1_vbus";
1208                         regulator-min-microvolt = <5000000>;
1209                         regulator-max-microvolt = <5000000>;
1210                         enable-active-high;
1211                         gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1212                         gpio-open-drain;
1213                         vin-supply = <&tps65090_dcdc1_reg>;
1214                 };
1215
1216                 usb3_vbus_reg: regulator@4 {
1217                         compatible = "regulator-fixed";
1218                         reg = <4>;
1219                         regulator-name = "usb2_vbus";
1220                         regulator-min-microvolt = <5000000>;
1221                         regulator-max-microvolt = <5000000>;
1222                         enable-active-high;
1223                         gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1224                         gpio-open-drain;
1225                         vin-supply = <&tps65090_dcdc1_reg>;
1226                 };
1227
1228                 vdd_hdmi_reg: regulator@5 {
1229                         compatible = "regulator-fixed";
1230                         reg = <5>;
1231                         regulator-name = "vdd_hdmi_5v0";
1232                         regulator-min-microvolt = <5000000>;
1233                         regulator-max-microvolt = <5000000>;
1234                         enable-active-high;
1235                         gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1236                         vin-supply = <&tps65090_dcdc1_reg>;
1237                 };
1238
1239                 vdd_cam_1v8_reg: regulator@6 {
1240                         compatible = "regulator-fixed";
1241                         reg = <6>;
1242                         regulator-name = "vdd_cam_1v8_reg";
1243                         regulator-min-microvolt = <1800000>;
1244                         regulator-max-microvolt = <1800000>;
1245                         enable-active-high;
1246                         gpio = <&palmas_gpio 6 0>;
1247                 };
1248         };
1249
1250         sound {
1251                 compatible = "nvidia,tegra-audio-rt5640-dalmore",
1252                              "nvidia,tegra-audio-rt5640";
1253                 nvidia,model = "NVIDIA Tegra Dalmore";
1254
1255                 nvidia,audio-routing =
1256                         "Headphones", "HPOR",
1257                         "Headphones", "HPOL",
1258                         "Speakers", "SPORP",
1259                         "Speakers", "SPORN",
1260                         "Speakers", "SPOLP",
1261                         "Speakers", "SPOLN",
1262                         "Mic Jack", "MICBIAS1",
1263                         "IN2P", "Mic Jack";
1264
1265                 nvidia,i2s-controller = <&tegra_i2s1>;
1266                 nvidia,audio-codec = <&rt5640>;
1267
1268                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
1269
1270                 clocks = <&tegra_car TEGRA114_CLK_PLL_A>,
1271                          <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1272                          <&tegra_car TEGRA114_CLK_EXTERN1>;
1273                 clock-names = "pll_a", "pll_a_out0", "mclk";
1274         };
1275 };