arch/arm/boot/dts/stih416-clock.dtsi

   1 /*
   2  * Copyright (C) 2013 STMicroelectronics R&D Limited
   3  * <stlinux-devel@stlinux.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9 / {
  10         clocks {
  11                 /*
  12                  * Fixed 30MHz oscillator inputs to SoC
  13                  */
  14                 CLK_SYSIN: CLK_SYSIN {
  15                         #clock-cells = <0>;
  16                         compatible = "fixed-clock";
  17                         clock-frequency = <30000000>;
  18                         clock-output-names = "CLK_SYSIN";
  19                 };
  20
  21                 /*
  22                  * ARM Peripheral clock for timers
  23                  */
  24                 arm_periph_clk: arm_periph_clk {
  25                         #clock-cells = <0>;
  26                         compatible = "fixed-clock";
  27                         clock-frequency = <600000000>;
  28                 };
  29
  30                 /*
  31                  * Bootloader initialized system infrastructure clock for
  32                  * serial devices.
  33                  */
  34                 CLK_S_ICN_REG_0: clockgenA0@4 {
  35                         #clock-cells = <0>;
  36                         compatible = "fixed-clock";
  37                         clock-frequency = <100000000>;
  38                         clock-output-names = "CLK_S_ICN_REG_0";
  39                 };
  40
  41                 CLK_S_GMAC0_PHY: clockgenA1@7 {
  42                         #clock-cells = <0>;
  43                         compatible = "fixed-clock";
  44                         clock-frequency = <25000000>;
  45                         clock-output-names = "CLK_S_GMAC0_PHY";
  46                 };
  47
  48                 CLK_S_ETH1_PHY: clockgenA0@7 {
  49                         #clock-cells = <0>;
  50                         compatible = "fixed-clock";
  51                         clock-frequency = <25000000>;
  52                         clock-output-names = "CLK_S_ETH1_PHY";
  53                 };
  54         };
  55 };