arch/arm/boot/dts/omap3-lilly-a83x.dtsi

   1 /*
   2  * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include "omap36xx.dtsi"
  11
  12 / {
  13         model = "INCOstartec LILLY-A83X module (DM3730)";
  14         compatible = "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
  15
  16         chosen {
  17                         bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
  18         };
  19
  20         memory {
  21                 device_type = "memory";
  22                 reg = <0x80000000 0x8000000>;   /* 128 MB */
  23         };
  24
  25         leds {
  26                 compatible = "gpio-leds";
  27
  28                 led1 {
  29                         label = "lilly-a83x::led1";
  30                         gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
  31                         linux,default-trigger = "default-on";
  32                 };
  33
  34         };
  35
  36         sound {
  37                 compatible = "ti,omap-twl4030";
  38                 ti,model = "lilly-a83x";
  39
  40                 ti,mcbsp = <&mcbsp2>;
  41                 ti,codec = <&twl_audio>;
  42         };
  43
  44         reg_vcc3: vcc3 {
  45                 compatible = "regulator-fixed";
  46                 regulator-name = "VCC3";
  47                 regulator-min-microvolt = <3300000>;
  48                 regulator-max-microvolt = <3300000>;
  49                 regulator-always-on;
  50         };
  51
  52         hsusb1_phy: hsusb1_phy {
  53                 compatible = "usb-nop-xceiv";
  54                 vcc-supply = <&reg_vcc3>;
  55         };
  56 };
  57
  58 &omap3_pmx_wkup {
  59         pinctrl-names = "default";
  60
  61         lan9221_pins: pinmux_lan9221_pins {
  62                 pinctrl-single,pins = <
  63                         OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4)   /* reserved.gpio_129 */
  64                 >;
  65         };
  66
  67         tsc2048_pins: pinmux_tsc2048_pins {
  68                 pinctrl-single,pins = <
  69                         OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4)   /* sys_boot6.gpio_8 */
  70                 >;
  71         };
  72
  73         mmc1cd_pins: pinmux_mmc1cd_pins {
  74                 pinctrl-single,pins = <
  75                         OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4)   /* reserved.gpio_126 */
  76                 >;
  77         };
  78 };
  79
  80 &omap3_pmx_core {
  81         pinctrl-names = "default";
  82
  83         uart1_pins: pinmux_uart1_pins {
  84                 pinctrl-single,pins = <
  85                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)   /* uart1_tx.uart1_tx */
  86                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0)   /* uart1_rts.uart1_rts */
  87                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0)    /* uart1_cts.uart1_cts */
  88                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)    /* uart1_rx.uart1_rx */
  89                 >;
  90         };
  91
  92         uart2_pins: pinmux_uart2_pins {
  93                 pinctrl-single,pins = <
  94                         OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1)   /* mcbsp3_clkx.uart2_tx */
  95                         OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1)    /* mcbsp3_fsx.uart2_rx */
  96                 >;
  97         };
  98
  99         uart3_pins: pinmux_uart3_pins {
 100                 pinctrl-single,pins = <
 101                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)    /* uart3_rx_irrx.uart3_rx_irrx */
 102                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)   /* uart3_tx_irtx.uart3_tx_irtx */
 103                 >;
 104         };
 105
 106         i2c1_pins: pinmux_i2c1_pins {
 107                 pinctrl-single,pins = <
 108                         OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_scl.i2c1_scl */
 109                         OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_sda.i2c1_sda */
 110                 >;
 111         };
 112
 113         i2c2_pins: pinmux_i2c2_pins {
 114                 pinctrl-single,pins = <
 115                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)   /* i2c2_scl.i2c2_scl */
 116                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)   /* i2c2_sda.i2c2_sda */
 117                 >;
 118         };
 119
 120         i2c3_pins: pinmux_i2c3_pins {
 121                 pinctrl-single,pins = <
 122                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)   /* i2c3_scl.i2c3_scl */
 123                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)   /* i2c3_sda.i2c3_sda */
 124                 >;
 125         };
 126
 127         hsusb1_pins: pinmux_hsusb1_pins {
 128                 pinctrl-single,pins = <
 129
 130                         /* GPIO 182 controls USB-Hub reset. But USB-Phy its
 131                          * reset can't be controlled. So we clamp this GPIO to
 132                          * high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub.
 133                          */
 134
 135                         OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4)   /* mcspi2_cs1.gpio_182 */
 136                 >;
 137         };
 138
 139         hsusb_otg_pins: pinmux_hsusb_otg_pins {
 140                 pinctrl-single,pins = <
 141                         OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)   /* hsusb0_clk.hsusb0_clk */
 142                         OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)  /* hsusb0_stp.hsusb0_stp */
 143                         OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)   /* hsusb0_dir.hsusb0_dir */
 144                         OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)   /* hsusb0_nxt.hsusb0_nxt */
 145                         OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)   /* hsusb0_data0.hsusb0_data0 */
 146                         OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)   /* hsusb0_data1.hsusb0_data1 */
 147                         OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)   /* hsusb0_data2.hsusb0_data2 */
 148                         OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)   /* hsusb0_data3.hsusb0_data3 */
 149                         OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)   /* hsusb0_data4.hsusb0_data4 */
 150                         OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)   /* hsusb0_data5.hsusb0_data5 */
 151                         OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)   /* hsusb0_data6.hsusb0_data6 */
 152                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)   /* hsusb0_data7.hsusb0_data7 */
 153                 >;
 154         };
 155
 156         mmc1_pins: pinmux_mmc1_pins {
 157                 pinctrl-single,pins = <
 158                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_clk.sdmmc1_clk */
 159                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_cmd.sdmmc1_cmd */
 160                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat0.sdmmc1_dat0 */
 161                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat1.sdmmc1_dat1 */
 162                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat2.sdmmc1_dat2 */
 163                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat3.sdmmc1_dat3 */
 164                 >;
 165         };
 166
 167         spi2_pins: pinmux_spi2_pins {
 168                 pinctrl-single,pins = <
 169                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_clk.mcspi2_clk */
 170                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_simo.mcspi2_simo */
 171                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_somi.mcspi2_somi */
 172                         OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0)   /* mcspi2_cs0.mcspi2_cs0 */
 173                 >;
 174         };
 175 };
 176
 177 &omap3_pmx_core2 {
 178         pinctrl-names = "default";
 179         pinctrl-0 = <
 180                         &hsusb1_2_pins
 181         >;
 182
 183         hsusb1_2_pins: pinmux_hsusb1_2_pins {
 184                 pinctrl-single,pins = <
 185                         OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3)  /* etk_clk.hsusb1_stp */
 186                         OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3)   /* etk_ctl.hsusb1_clk */
 187                         OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3)   /* etk_d0.hsusb1_data0 */
 188                         OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3)   /* etk_d1.hsusb1_data1 */
 189                         OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3)   /* etk_d2.hsusb1_data2 */
 190                         OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3)   /* etk_d3.hsusb1_data7 */
 191                         OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3)   /* etk_d4.hsusb1_data4 */
 192                         OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3)   /* etk_d5.hsusb1_data5 */
 193                         OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3)   /* etk_d6.hsusb1_data6 */
 194                         OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3)   /* etk_d7.hsusb1_data3 */
 195                         OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3)   /* etk_d8.hsusb1_dir */
 196                         OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3)   /* etk_d9.hsusb1_nxt */
 197                 >;
 198         };
 199
 200         gpio1_pins: pinmux_gpio1_pins {
 201                 pinctrl-single,pins = <
 202                         OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4)   /* etk_d15.gpio_29 */
 203                 >;
 204         };
 205
 206 };
 207
 208 &gpio1 {
 209         pinctrl-names = "default";
 210         pinctrl-0 = <&gpio1_pins>;
 211 };
 212
 213 &gpio6 {
 214         pinctrl-names = "default";
 215         pinctrl-0 = <&hsusb1_pins>;
 216 };
 217
 218 &i2c1 {
 219         clock-frequency = <2600000>;
 220         pinctrl-names = "default";
 221         pinctrl-0 = <&i2c1_pins>;
 222
 223         twl: twl@48 {
 224                 reg = <0x48>;
 225                 interrupts = <7>;   /* SYS_NIRQ cascaded to intc */
 226                 interrupt-parent = <&intc>;
 227
 228                 twl_audio: audio {
 229                         compatible = "ti,twl4030-audio";
 230                         codec {
 231                         };
 232                 };
 233         };
 234 };
 235
 236 #include "twl4030.dtsi"
 237 #include "twl4030_omap3.dtsi"
 238
 239 &twl {
 240         vmmc1: regulator-vmmc1 {
 241                 regulator-always-on;
 242         };
 243
 244         vdd1: regulator-vdd1 {
 245                 regulator-always-on;
 246         };
 247
 248         vdd2: regulator-vdd2 {
 249                 regulator-always-on;
 250         };
 251 };
 252
 253 &i2c2 {
 254         clock-frequency = <2600000>;
 255         pinctrl-names = "default";
 256         pinctrl-0 = <&i2c2_pins>;
 257 };
 258
 259 &i2c3 {
 260         clock-frequency = <2600000>;
 261         pinctrl-names = "default";
 262         pinctrl-0 = <&i2c3_pins>;
 263                 gpiom1: gpio@20 {
 264                         compatible = "mcp,mcp23017";
 265                         gpio-controller;
 266                         #gpio-cells = <2>;
 267                         reg = <0x20>;
 268                 };
 269 };
 270
 271 &uart1 {
 272         pinctrl-names = "default";
 273         pinctrl-0 = <&uart1_pins>;
 274 };
 275
 276 &uart2 {
 277         pinctrl-names = "default";
 278         pinctrl-0 = <&uart2_pins>;
 279 };
 280
 281 &uart3 {
 282         pinctrl-names = "default";
 283         pinctrl-0 = <&uart3_pins>;
 284 };
 285
 286 &uart4 {
 287         status = "disabled";
 288 };
 289
 290 &mmc1 {
 291         cd-gpios = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
 292         cd-inverted;
 293         vmmc-supply = <&vmmc1>;
 294         bus-width = <4>;
 295         pinctrl-names = "default";
 296         pinctrl-0 = <&mmc1_pins &mmc1cd_pins>;
 297         cap-sdio-irq;
 298         cap-sd-highspeed;
 299         cap-mmc-highspeed;
 300 };
 301
 302 &mmc2 {
 303         status = "disabled";
 304 };
 305
 306 &mmc3 {
 307         status = "disabled";
 308 };
 309
 310 &mcspi2 {
 311         status = "okay";
 312         pinctrl-names = "default";
 313         pinctrl-0 = <&spi2_pins>;
 314
 315         tsc2046@0 {
 316                 reg = <0>;   /* CS0 */
 317                 compatible = "ti,tsc2046";
 318                 interrupt-parent = <&gpio1>;
 319                 interrupts = <8 0>;   /* boot6 / gpio_8 */
 320                 spi-max-frequency = <1000000>;
 321                 pendown-gpio = <&gpio1 8 0>;
 322                 vcc-supply = <&reg_vcc3>;
 323                 pinctrl-names = "default";
 324                 pinctrl-0 = <&tsc2048_pins>;
 325
 326                 ti,x-min = <300>;
 327                 ti,x-max = <3000>;
 328                 ti,y-min = <600>;
 329                 ti,y-max = <3600>;
 330                 ti,x-plate-ohms = <80>;
 331                 ti,pressure-max = <255>;
 332                 ti,swap-xy;
 333
 334                 linux,wakeup;
 335         };
 336 };
 337
 338 &usbhsehci {
 339         phys = <&hsusb1_phy>;
 340 };
 341
 342 &usbhshost {
 343         pinctrl-names = "default";
 344         pinctrl-0 = <&hsusb1_2_pins>;
 345         num-ports = <2>;
 346         port1-mode = "ehci-phy";
 347 };
 348
 349 &usb_otg_hs {
 350         pinctrl-names = "default";
 351         pinctrl-0 = <&hsusb_otg_pins>;
 352         interface-type = <0>;
 353         usb-phy = <&usb2_phy>;
 354         phys = <&usb2_phy>;
 355         phy-names = "usb2-phy";
 356         mode = <3>;
 357         power = <50>;
 358 };
 359
 360 &gpmc {
 361         ranges = <0 0 0x30000000 0x1000000>,
 362                 <7 0 0x15000000 0x01000000>;
 363
 364         nand@0,0 {
 365                 reg = <0 0 0x1000000>;
 366                 nand-bus-width = <16>;
 367                 ti,nand-ecc-opt = "bch8";
 368                 /* no elm on omap3 */
 369
 370                 gpmc,mux-add-data = <0>;
 371                 gpmc,device-nand;
 372                 gpmc,device-width = <2>;
 373                 gpmc,wait-pin = <0>;
 374                 gpmc,wait-monitoring-ns = <0>;
 375                 gpmc,burst-length= <4>;
 376                 gpmc,cs-on-ns = <0>;
 377                 gpmc,cs-rd-off-ns = <100>;
 378                 gpmc,cs-wr-off-ns = <100>;
 379                 gpmc,adv-on-ns = <0>;
 380                 gpmc,adv-rd-off-ns = <100>;
 381                 gpmc,adv-wr-off-ns = <100>;
 382                 gpmc,oe-on-ns = <5>;
 383                 gpmc,oe-off-ns = <75>;
 384                 gpmc,we-on-ns = <5>;
 385                 gpmc,we-off-ns = <75>;
 386                 gpmc,rd-cycle-ns = <100>;
 387                 gpmc,wr-cycle-ns = <100>;
 388                 gpmc,access-ns = <60>;
 389                 gpmc,page-burst-access-ns = <5>;
 390                 gpmc,bus-turnaround-ns = <0>;
 391                 gpmc,cycle2cycle-samecsen;
 392                 gpmc,cycle2cycle-delay-ns = <50>;
 393                 gpmc,wr-data-mux-bus-ns = <75>;
 394                 gpmc,wr-access-ns = <155>;
 395
 396                 #address-cells = <1>;
 397                 #size-cells = <1>;
 398
 399                 partition@0 {
 400                         label = "MLO";
 401                         reg = <0 0x80000>;
 402                 };
 403
 404                 partition@0x80000 {
 405                         label = "u-boot";
 406                         reg = <0x80000 0x1e0000>;
 407                 };
 408
 409                 partition@0x260000 {
 410                         label = "u-boot-environment";
 411                         reg = <0x260000 0x20000>;
 412                 };
 413
 414                 partition@0x280000 {
 415                         label = "kernel";
 416                         reg = <0x280000 0x500000>;
 417                 };
 418
 419                 partition@0x780000 {
 420                         label = "filesystem";
 421                         reg = <0x780000 0xf880000>;
 422                 };
 423         };
 424
 425         ethernet@7,0 {
 426                 compatible = "smsc,lan9221", "smsc,lan9115";
 427                 bank-width = <2>;
 428                 gpmc,mux-add-data = <2>;
 429                 gpmc,cs-on-ns = <10>;
 430                 gpmc,cs-rd-off-ns = <60>;
 431                 gpmc,cs-wr-off-ns = <60>;
 432                 gpmc,adv-on-ns = <0>;
 433                 gpmc,adv-rd-off-ns = <10>;
 434                 gpmc,adv-wr-off-ns = <10>;
 435                 gpmc,oe-on-ns = <10>;
 436                 gpmc,oe-off-ns = <60>;
 437                 gpmc,we-on-ns = <10>;
 438                 gpmc,we-off-ns = <60>;
 439                 gpmc,rd-cycle-ns = <100>;
 440                 gpmc,wr-cycle-ns = <100>;
 441                 gpmc,access-ns = <50>;
 442                 gpmc,page-burst-access-ns = <5>;
 443                 gpmc,bus-turnaround-ns = <0>;
 444                 gpmc,cycle2cycle-delay-ns = <75>;
 445                 gpmc,wr-data-mux-bus-ns = <15>;
 446                 gpmc,wr-access-ns = <75>;
 447                 gpmc,cycle2cycle-samecsen;
 448                 gpmc,cycle2cycle-diffcsen;
 449                 vddvario-supply = <&reg_vcc3>;
 450                 vdd33a-supply = <&reg_vcc3>;
 451                 reg-io-width = <4>;
 452                 interrupt-parent = <&gpio5>;
 453                 interrupts = <1 0x2>;
 454                 reg = <7 0 0xff>;
 455                 pinctrl-names = "default";
 456                 pinctrl-0 = <&lan9221_pins>;
 457                 phy-mode = "mii";
 458         };
 459 };