arch/arm/boot/dts/keystone.dtsi

   1 /*
   2  * Copyright 2013 Texas Instruments, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/gpio/gpio.h>
  11
  12 #include "skeleton.dtsi"
  13
  14 / {
  15         model = "Texas Instruments Keystone 2 SoC";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18         interrupt-parent = <&gic>;
  19
  20         aliases {
  21                 serial0 = &uart0;
  22         };
  23
  24         memory {
  25                 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
  26         };
  27
  28         gic: interrupt-controller {
  29                 compatible = "arm,cortex-a15-gic";
  30                 #interrupt-cells = <3>;
  31                 #size-cells = <0>;
  32                 #address-cells = <1>;
  33                 interrupt-controller;
  34                 reg = <0x0 0x02561000 0x0 0x1000>,
  35                       <0x0 0x02562000 0x0 0x2000>,
  36                       <0x0 0x02564000 0x0 0x1000>,
  37                       <0x0 0x02566000 0x0 0x2000>;
  38                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  39                                 IRQ_TYPE_LEVEL_HIGH)>;
  40         };
  41
  42         timer {
  43                 compatible = "arm,armv7-timer";
  44                 interrupts =
  45                         <GIC_PPI 13
  46                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  47                         <GIC_PPI 14
  48                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  49                         <GIC_PPI 11
  50                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  51                         <GIC_PPI 10
  52                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  53         };
  54
  55         pmu {
  56                 compatible = "arm,cortex-a15-pmu";
  57                 interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
  58                              <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
  59                              <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
  60                              <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
  61         };
  62
  63         soc {
  64                 #address-cells = <1>;
  65                 #size-cells = <1>;
  66                 compatible = "ti,keystone","simple-bus";
  67                 interrupt-parent = <&gic>;
  68                 ranges = <0x0 0x0 0x0 0xc0000000>;
  69
  70                 rstctrl: reset-controller {
  71                         compatible = "ti,keystone-reset";
  72                         reg = <0x023100e8 4>;   /* pll reset control reg */
  73                 };
  74
  75                 /include/ "keystone-clocks.dtsi"
  76
  77                 uart0: serial@02530c00 {
  78                         compatible = "ns16550a";
  79                         current-speed = <115200>;
  80                         reg-shift = <2>;
  81                         reg-io-width = <4>;
  82                         reg = <0x02530c00 0x100>;
  83                         clocks  = <&clkuart0>;
  84                         interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
  85                 };
  86
  87                 uart1:  serial@02531000 {
  88                         compatible = "ns16550a";
  89                         current-speed = <115200>;
  90                         reg-shift = <2>;
  91                         reg-io-width = <4>;
  92                         reg = <0x02531000 0x100>;
  93                         clocks  = <&clkuart1>;
  94                         interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
  95                 };
  96
  97                 i2c0: i2c@2530000 {
  98                         compatible = "ti,davinci-i2c";
  99                         reg = <0x02530000 0x400>;
 100                         clock-frequency = <100000>;
 101                         clocks = <&clki2c>;
 102                         interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
 103                         #address-cells = <1>;
 104                         #size-cells = <0>;
 105
 106                         dtt@50 {
 107                                 compatible = "at,24c1024";
 108                                 reg = <0x50>;
 109                         };
 110                 };
 111
 112                 i2c1: i2c@2530400 {
 113                         compatible = "ti,davinci-i2c";
 114                         reg = <0x02530400 0x400>;
 115                         clock-frequency = <100000>;
 116                         clocks = <&clki2c>;
 117                         interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
 118                 };
 119
 120                 i2c2: i2c@2530800 {
 121                         compatible = "ti,davinci-i2c";
 122                         reg = <0x02530800 0x400>;
 123                         clock-frequency = <100000>;
 124                         clocks = <&clki2c>;
 125                         interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
 126                 };
 127
 128                 spi0: spi@21000400 {
 129                         compatible = "ti,dm6441-spi";
 130                         reg = <0x21000400 0x200>;
 131                         num-cs = <4>;
 132                         ti,davinci-spi-intr-line = <0>;
 133                         interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
 134                         clocks = <&clkspi>;
 135                 };
 136
 137                 spi1: spi@21000600 {
 138                         compatible = "ti,dm6441-spi";
 139                         reg = <0x21000600 0x200>;
 140                         num-cs = <4>;
 141                         ti,davinci-spi-intr-line = <0>;
 142                         interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
 143                         clocks = <&clkspi>;
 144                 };
 145
 146                 spi2: spi@21000800 {
 147                         compatible = "ti,dm6441-spi";
 148                         reg = <0x21000800 0x200>;
 149                         num-cs = <4>;
 150                         ti,davinci-spi-intr-line = <0>;
 151                         interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
 152                         clocks = <&clkspi>;
 153                 };
 154
 155                 usb_phy: usb_phy@2620738 {
 156                         compatible = "ti,keystone-usbphy";
 157                         #address-cells = <1>;
 158                         #size-cells = <1>;
 159                         reg = <0x2620738 32>;
 160                         status = "disabled";
 161                 };
 162
 163                 usb: usb@2680000 {
 164                         compatible = "ti,keystone-dwc3";
 165                         #address-cells = <1>;
 166                         #size-cells = <1>;
 167                         reg = <0x2680000 0x10000>;
 168                         clocks = <&clkusb>;
 169                         clock-names = "usb";
 170                         interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
 171                         ranges;
 172                         status = "disabled";
 173
 174                         dwc3@2690000 {
 175                                 compatible = "synopsys,dwc3";
 176                                 reg = <0x2690000 0x70000>;
 177                                 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
 178                                 usb-phy = <&usb_phy>, <&usb_phy>;
 179                         };
 180                 };
 181
 182                 wdt: wdt@022f0080 {
 183                         compatible = "ti,keystone-wdt","ti,davinci-wdt";
 184                         reg = <0x022f0080 0x80>;
 185                         clocks = <&clkwdtimer0>;
 186                 };
 187
 188                 clock_event: timer@22f0000 {
 189                         compatible = "ti,keystone-timer";
 190                         reg = <0x022f0000 0x80>;
 191                         interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
 192                         clocks = <&clktimer15>;
 193                 };
 194
 195                 gpio0: gpio@260bf00 {
 196                         compatible = "ti,keystone-gpio";
 197                         reg = <0x0260bf00 0x100>;
 198                         gpio-controller;
 199                         #gpio-cells = <2>;
 200                         /* HW Interrupts mapped to GPIO pins */
 201                         interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
 202                                         <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
 203                                         <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
 204                                         <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
 205                                         <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
 206                                         <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
 207                                         <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
 208                                         <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
 209                                         <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
 210                                         <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
 211                                         <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
 212                                         <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
 213                                         <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
 214                                         <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
 215                                         <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
 216                                         <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
 217                                         <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
 218                                         <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
 219                                         <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
 220                                         <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
 221                                         <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
 222                                         <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
 223                                         <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
 224                                         <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
 225                                         <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
 226                                         <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
 227                                         <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
 228                                         <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
 229                                         <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
 230                                         <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
 231                                         <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
 232                                         <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
 233                         clocks = <&clkgpio>;
 234                         clock-names = "gpio";
 235                         ti,ngpio = <32>;
 236                         ti,davinci-gpio-unbanked = <32>;
 237                 };
 238
 239                 aemif: aemif@21000A00 {
 240                         compatible = "ti,keystone-aemif", "ti,davinci-aemif";
 241                         #address-cells = <2>;
 242                         #size-cells = <1>;
 243                         clocks = <&clkaemif>;
 244                         clock-names = "aemif";
 245                         clock-ranges;
 246
 247                         reg = <0x21000A00 0x00000100>;
 248                         ranges = <0 0 0x30000000 0x10000000
 249                                   1 0 0x21000A00 0x00000100>;
 250                 };
 251         };
 252 };