arch/arm/boot/dts/imx6qdl-gw54xx.dtsi

   1 /*
   2  * Copyright 2013 Gateworks Corporation
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 / {
  13         /* these are used by bootloader for disabling nodes */
  14         aliases {
  15                 can0 = &can1;
  16                 ethernet0 = &fec;
  17                 ethernet1 = &eth1;
  18                 led0 = &led0;
  19                 led1 = &led1;
  20                 led2 = &led2;
  21                 nand = &gpmi;
  22                 sky2 = &eth1;
  23                 ssi0 = &ssi1;
  24                 usb0 = &usbh1;
  25                 usb1 = &usbotg;
  26                 usdhc2 = &usdhc3;
  27         };
  28
  29         chosen {
  30                 bootargs = "console=ttymxc1,115200";
  31         };
  32
  33         leds {
  34                 compatible = "gpio-leds";
  35
  36                 led0: user1 {
  37                         label = "user1";
  38                         gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
  39                         default-state = "on";
  40                         linux,default-trigger = "heartbeat";
  41                 };
  42
  43                 led1: user2 {
  44                         label = "user2";
  45                         gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
  46                         default-state = "off";
  47                 };
  48
  49                 led2: user3 {
  50                         label = "user3";
  51                         gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
  52                         default-state = "off";
  53                 };
  54         };
  55
  56         memory {
  57                 reg = <0x10000000 0x40000000>;
  58         };
  59
  60         pps {
  61                 compatible = "pps-gpio";
  62                 gpios = <&gpio1 26 0>;
  63                 status = "okay";
  64         };
  65
  66         regulators {
  67                 compatible = "simple-bus";
  68                 #address-cells = <1>;
  69                 #size-cells = <0>;
  70
  71                 reg_1p0v: regulator@0 {
  72                         compatible = "regulator-fixed";
  73                         reg = <0>;
  74                         regulator-name = "1P0V";
  75                         regulator-min-microvolt = <1000000>;
  76                         regulator-max-microvolt = <1000000>;
  77                         regulator-always-on;
  78                 };
  79
  80                 reg_3p3v: regulator@1 {
  81                         compatible = "regulator-fixed";
  82                         reg = <1>;
  83                         regulator-name = "3P3V";
  84                         regulator-min-microvolt = <3300000>;
  85                         regulator-max-microvolt = <3300000>;
  86                         regulator-always-on;
  87                 };
  88
  89                 reg_usb_h1_vbus: regulator@2 {
  90                         compatible = "regulator-fixed";
  91                         reg = <2>;
  92                         regulator-name = "usb_h1_vbus";
  93                         regulator-min-microvolt = <5000000>;
  94                         regulator-max-microvolt = <5000000>;
  95                         regulator-always-on;
  96                 };
  97
  98                 reg_usb_otg_vbus: regulator@3 {
  99                         compatible = "regulator-fixed";
 100                         reg = <3>;
 101                         regulator-name = "usb_otg_vbus";
 102                         regulator-min-microvolt = <5000000>;
 103                         regulator-max-microvolt = <5000000>;
 104                         gpio = <&gpio3 22 0>;
 105                         enable-active-high;
 106                 };
 107         };
 108
 109         sound {
 110                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
 111                              "fsl,imx-audio-sgtl5000";
 112                 model = "imx6q-sabrelite-sgtl5000";
 113                 ssi-controller = <&ssi1>;
 114                 audio-codec = <&codec>;
 115                 audio-routing =
 116                         "MIC_IN", "Mic Jack",
 117                         "Mic Jack", "Mic Bias",
 118                         "Headphone Jack", "HP_OUT";
 119                 mux-int-port = <1>;
 120                 mux-ext-port = <4>;
 121         };
 122 };
 123
 124 &audmux {
 125         pinctrl-names = "default";
 126         pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
 127         status = "okay";
 128 };
 129
 130 &can1 {
 131         pinctrl-names = "default";
 132         pinctrl-0 = <&pinctrl_flexcan1>;
 133         status = "okay";
 134 };
 135
 136 &fec {
 137         pinctrl-names = "default";
 138         pinctrl-0 = <&pinctrl_enet>;
 139         phy-mode = "rgmii";
 140         phy-reset-gpios = <&gpio1 30 0>;
 141         status = "okay";
 142 };
 143
 144 &gpmi {
 145         pinctrl-names = "default";
 146         pinctrl-0 = <&pinctrl_gpmi_nand>;
 147         status = "okay";
 148 };
 149
 150 &i2c1 {
 151         clock-frequency = <100000>;
 152         pinctrl-names = "default";
 153         pinctrl-0 = <&pinctrl_i2c1>;
 154         status = "okay";
 155
 156         eeprom1: eeprom@50 {
 157                 compatible = "atmel,24c02";
 158                 reg = <0x50>;
 159                 pagesize = <16>;
 160         };
 161
 162         eeprom2: eeprom@51 {
 163                 compatible = "atmel,24c02";
 164                 reg = <0x51>;
 165                 pagesize = <16>;
 166         };
 167
 168         eeprom3: eeprom@52 {
 169                 compatible = "atmel,24c02";
 170                 reg = <0x52>;
 171                 pagesize = <16>;
 172         };
 173
 174         eeprom4: eeprom@53 {
 175                 compatible = "atmel,24c02";
 176                 reg = <0x53>;
 177                 pagesize = <16>;
 178         };
 179
 180         gpio: pca9555@23 {
 181                 compatible = "nxp,pca9555";
 182                 reg = <0x23>;
 183                 gpio-controller;
 184                 #gpio-cells = <2>;
 185         };
 186
 187         hwmon: gsc@29 {
 188                 compatible = "gw,gsp";
 189                 reg = <0x29>;
 190         };
 191
 192         rtc: ds1672@68 {
 193                 compatible = "dallas,ds1672";
 194                 reg = <0x68>;
 195         };
 196 };
 197
 198 &i2c2 {
 199         clock-frequency = <100000>;
 200         pinctrl-names = "default";
 201         pinctrl-0 = <&pinctrl_i2c2>;
 202         status = "okay";
 203
 204         pmic: pfuze100@08 {
 205                 compatible = "fsl,pfuze100";
 206                 reg = <0x08>;
 207
 208                 regulators {
 209                         sw1a_reg: sw1ab {
 210                                 regulator-min-microvolt = <300000>;
 211                                 regulator-max-microvolt = <1875000>;
 212                                 regulator-boot-on;
 213                                 regulator-always-on;
 214                                 regulator-ramp-delay = <6250>;
 215                         };
 216
 217                         sw1c_reg: sw1c {
 218                                 regulator-min-microvolt = <300000>;
 219                                 regulator-max-microvolt = <1875000>;
 220                                 regulator-boot-on;
 221                                 regulator-always-on;
 222                                 regulator-ramp-delay = <6250>;
 223                         };
 224
 225                         sw2_reg: sw2 {
 226                                 regulator-min-microvolt = <800000>;
 227                                 regulator-max-microvolt = <3950000>;
 228                                 regulator-boot-on;
 229                                 regulator-always-on;
 230                         };
 231
 232                         sw3a_reg: sw3a {
 233                                 regulator-min-microvolt = <400000>;
 234                                 regulator-max-microvolt = <1975000>;
 235                                 regulator-boot-on;
 236                                 regulator-always-on;
 237                         };
 238
 239                         sw3b_reg: sw3b {
 240                                 regulator-min-microvolt = <400000>;
 241                                 regulator-max-microvolt = <1975000>;
 242                                 regulator-boot-on;
 243                                 regulator-always-on;
 244                         };
 245
 246                         sw4_reg: sw4 {
 247                                 regulator-min-microvolt = <800000>;
 248                                 regulator-max-microvolt = <3300000>;
 249                         };
 250
 251                         swbst_reg: swbst {
 252                                 regulator-min-microvolt = <5000000>;
 253                                 regulator-max-microvolt = <5150000>;
 254                         };
 255
 256                         snvs_reg: vsnvs {
 257                                 regulator-min-microvolt = <1000000>;
 258                                 regulator-max-microvolt = <3000000>;
 259                                 regulator-boot-on;
 260                                 regulator-always-on;
 261                         };
 262
 263                         vref_reg: vrefddr {
 264                                 regulator-boot-on;
 265                                 regulator-always-on;
 266                         };
 267
 268                         vgen1_reg: vgen1 {
 269                                 regulator-min-microvolt = <800000>;
 270                                 regulator-max-microvolt = <1550000>;
 271                         };
 272
 273                         vgen2_reg: vgen2 {
 274                                 regulator-min-microvolt = <800000>;
 275                                 regulator-max-microvolt = <1550000>;
 276                         };
 277
 278                         vgen3_reg: vgen3 {
 279                                 regulator-min-microvolt = <1800000>;
 280                                 regulator-max-microvolt = <3300000>;
 281                         };
 282
 283                         vgen4_reg: vgen4 {
 284                                 regulator-min-microvolt = <1800000>;
 285                                 regulator-max-microvolt = <3300000>;
 286                                 regulator-always-on;
 287                         };
 288
 289                         vgen5_reg: vgen5 {
 290                                 regulator-min-microvolt = <1800000>;
 291                                 regulator-max-microvolt = <3300000>;
 292                                 regulator-always-on;
 293                         };
 294
 295                         vgen6_reg: vgen6 {
 296                                 regulator-min-microvolt = <1800000>;
 297                                 regulator-max-microvolt = <3300000>;
 298                                 regulator-always-on;
 299                         };
 300                 };
 301         };
 302
 303         pciswitch: pex8609@3f {
 304                 compatible = "plx,pex8609";
 305                 reg = <0x3f>;
 306         };
 307
 308         pciclkgen: si52147@6b {
 309                 compatible = "sil,si52147";
 310                 reg = <0x6b>;
 311         };
 312 };
 313
 314 &i2c3 {
 315         clock-frequency = <100000>;
 316         pinctrl-names = "default";
 317         pinctrl-0 = <&pinctrl_i2c3>;
 318         status = "okay";
 319
 320         accelerometer: fxos8700@1e {
 321                 compatible = "fsl,fxos8700";
 322                 reg = <0x1e>;
 323         };
 324
 325         codec: sgtl5000@0a {
 326                 compatible = "fsl,sgtl5000";
 327                 reg = <0x0a>;
 328                 clocks = <&clks 201>;
 329                 VDDA-supply = <&sw4_reg>;
 330                 VDDIO-supply = <&reg_3p3v>;
 331         };
 332
 333         hdmiin: adv7611@4c {
 334                 compatible = "adi,adv7611";
 335                 reg = <0x4c>;
 336         };
 337
 338         touchscreen: egalax_ts@04 {
 339                 compatible = "eeti,egalax_ts";
 340                 reg = <0x04>;
 341                 interrupt-parent = <&gpio7>;
 342                 interrupts = <12 2>; /* gpio7_12 active low */
 343                 wakeup-gpios = <&gpio7 12 0>;
 344         };
 345
 346         videoout: adv7393@2a {
 347                 compatible = "adi,adv7393";
 348                 reg = <0x2a>;
 349         };
 350
 351         videoin: adv7180@20 {
 352                 compatible = "adi,adv7180";
 353                 reg = <0x20>;
 354         };
 355 };
 356
 357 &iomuxc {
 358         pinctrl-names = "default";
 359         pinctrl-0 = <&pinctrl_hog>;
 360
 361         imx6qdl-gw54xx {
 362                 pinctrl_hog: hoggrp {
 363                         fsl,pins = <
 364                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22    0x80000000 /* OTG_PWR_EN */
 365                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19    0x80000000 /* SPINOR_CS0# */
 366                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26  0x80000000 /* GPS_PPS */
 367                                 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
 368                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE RST */
 369                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1      0x000130b0 /* AUD4_MCK */
 370                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02     0x80000000 /* CAN_STBY */
 371                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* TOUCH_IRQ# */
 372                                 MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
 373                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
 374                                 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
 375                                 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16   0x80000000 /* USBHUB_RST# */
 376                                 MX6QDL_PAD_SD1_DAT3__GPIO1_IO21   0x80000000 /* MIPI_DIO */
 377                          >;
 378                 };
 379
 380                 pinctrl_audmux: audmuxgrp {
 381                         fsl,pins = <
 382                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 383                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 384                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 385                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 386                         >;
 387                 };
 388
 389                 pinctrl_enet: enetgrp {
 390                         fsl,pins = <
 391                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 392                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 393                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 394                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 395                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 396                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 397                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 398                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 399                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 400                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 401                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 402                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 403                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 404                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 405                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 406                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 407                         >;
 408                 };
 409
 410                 pinctrl_flexcan1: flexcan1grp {
 411                         fsl,pins = <
 412                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x80000000
 413                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x80000000
 414                         >;
 415                 };
 416
 417                 pinctrl_gpmi_nand: gpminandgrp {
 418                         fsl,pins = <
 419                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
 420                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
 421                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
 422                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
 423                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
 424                                 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
 425                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
 426                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
 427                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
 428                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
 429                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
 430                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
 431                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
 432                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
 433                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
 434                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
 435                         >;
 436                 };
 437
 438                 pinctrl_i2c1: i2c1grp {
 439                         fsl,pins = <
 440                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 441                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 442                         >;
 443                 };
 444
 445                 pinctrl_i2c2: i2c2grp {
 446                         fsl,pins = <
 447                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 448                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 449                         >;
 450                 };
 451
 452                 pinctrl_i2c3: i2c3grp {
 453                         fsl,pins = <
 454                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 455                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 456                         >;
 457                 };
 458
 459                 pinctrl_uart1: uart1grp {
 460                         fsl,pins = <
 461                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 462                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 463                         >;
 464                 };
 465
 466                 pinctrl_uart2: uart2grp {
 467                         fsl,pins = <
 468                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 469                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 470                         >;
 471                 };
 472
 473                 pinctrl_uart5: uart5grp {
 474                         fsl,pins = <
 475                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 476                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 477                         >;
 478                 };
 479
 480                 pinctrl_usbotg: usbotggrp {
 481                         fsl,pins = <
 482                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 483                         >;
 484                 };
 485
 486                 pinctrl_usdhc3: usdhc3grp {
 487                         fsl,pins = <
 488                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 489                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 490                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 491                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 492                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 493                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 494                         >;
 495                 };
 496         };
 497 };
 498
 499 &ldb {
 500         status = "okay";
 501
 502         lvds-channel@1 {
 503                 fsl,data-mapping = "spwg";
 504                 fsl,data-width = <18>;
 505                 status = "okay";
 506
 507                 display-timings {
 508                         native-mode = <&timing0>;
 509                         timing0: hsd100pxn1 {
 510                                 clock-frequency = <65000000>;
 511                                 hactive = <1024>;
 512                                 vactive = <768>;
 513                                 hback-porch = <220>;
 514                                 hfront-porch = <40>;
 515                                 vback-porch = <21>;
 516                                 vfront-porch = <7>;
 517                                 hsync-len = <60>;
 518                                 vsync-len = <10>;
 519                         };
 520                 };
 521         };
 522 };
 523
 524 &pcie {
 525         reset-gpio = <&gpio1 29 0>;
 526         status = "okay";
 527
 528         eth1: sky2@8 { /* MAC/PHY on bus 8 */
 529                 compatible = "marvell,sky2";
 530         };
 531 };
 532
 533 &ssi1 {
 534         fsl,mode = "i2s-slave";
 535         status = "okay";
 536 };
 537
 538 &ssi2 {
 539         fsl,mode = "i2s-slave";
 540         status = "okay";
 541 };
 542
 543 &uart1 {
 544         pinctrl-names = "default";
 545         pinctrl-0 = <&pinctrl_uart1>;
 546         status = "okay";
 547 };
 548
 549 &uart2 {
 550         pinctrl-names = "default";
 551         pinctrl-0 = <&pinctrl_uart2>;
 552         status = "okay";
 553 };
 554
 555 &uart5 {
 556         pinctrl-names = "default";
 557         pinctrl-0 = <&pinctrl_uart5>;
 558         status = "okay";
 559 };
 560
 561 &usbotg {
 562         vbus-supply = <&reg_usb_otg_vbus>;
 563         pinctrl-names = "default";
 564         pinctrl-0 = <&pinctrl_usbotg>;
 565         disable-over-current;
 566         status = "okay";
 567 };
 568
 569 &usbh1 {
 570         vbus-supply = <&reg_usb_h1_vbus>;
 571         status = "okay";
 572 };
 573
 574 &usdhc3 {
 575         pinctrl-names = "default";
 576         pinctrl-0 = <&pinctrl_usdhc3>;
 577         cd-gpios = <&gpio7 0 0>;
 578         vmmc-supply = <&reg_3p3v>;
 579         status = "okay";
 580 };