arch/arm/boot/dts/imx27.dtsi

   1 /*
   2  * Copyright 2012 Sascha Hauer, Pengutronix
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "skeleton.dtsi"
  13 #include "imx27-pinfunc.h"
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16
  17 / {
  18         aliases {
  19                 gpio0 = &gpio1;
  20                 gpio1 = &gpio2;
  21                 gpio2 = &gpio3;
  22                 gpio3 = &gpio4;
  23                 gpio4 = &gpio5;
  24                 gpio5 = &gpio6;
  25                 i2c0 = &i2c1;
  26                 i2c1 = &i2c2;
  27                 serial0 = &uart1;
  28                 serial1 = &uart2;
  29                 serial2 = &uart3;
  30                 serial3 = &uart4;
  31                 serial4 = &uart5;
  32                 serial5 = &uart6;
  33                 spi0 = &cspi1;
  34                 spi1 = &cspi2;
  35                 spi2 = &cspi3;
  36         };
  37
  38         aitc: aitc-interrupt-controller@e0000000 {
  39                 compatible = "fsl,imx27-aitc", "fsl,avic";
  40                 interrupt-controller;
  41                 #interrupt-cells = <1>;
  42                 reg = <0x10040000 0x1000>;
  43         };
  44
  45         clocks {
  46                 #address-cells = <1>;
  47                 #size-cells = <0>;
  48
  49                 osc26m {
  50                         compatible = "fsl,imx-osc26m", "fixed-clock";
  51                         clock-frequency = <26000000>;
  52                 };
  53         };
  54
  55         cpus {
  56                 #size-cells = <0>;
  57                 #address-cells = <1>;
  58
  59                 cpu: cpu@0 {
  60                         device_type = "cpu";
  61                         compatible = "arm,arm926ej-s";
  62                         operating-points = <
  63                                 /* kHz uV */
  64                                 266000 1300000
  65                                 399000 1450000
  66                         >;
  67                         clock-latency = <62500>;
  68                         clocks = <&clks 18>;
  69                         voltage-tolerance = <5>;
  70                 };
  71         };
  72
  73         usbphy {
  74                 compatible = "simple-bus";
  75                 #address-cells = <1>;
  76                 #size-cells = <0>;
  77
  78                 usbphy0: usbphy@0 {
  79                         compatible = "usb-nop-xceiv";
  80                         reg = <0>;
  81                         clocks = <&clks 75>;
  82                         clock-names = "main_clk";
  83                 };
  84
  85                 usbphy2: usbphy@2 {
  86                         compatible = "usb-nop-xceiv";
  87                         reg = <2>;
  88                         clocks = <&clks 75>;
  89                         clock-names = "main_clk";
  90                 };
  91         };
  92
  93         soc {
  94                 #address-cells = <1>;
  95                 #size-cells = <1>;
  96                 compatible = "simple-bus";
  97                 interrupt-parent = <&aitc>;
  98                 ranges;
  99
 100                 aipi@10000000 { /* AIPI1 */
 101                         compatible = "fsl,aipi-bus", "simple-bus";
 102                         #address-cells = <1>;
 103                         #size-cells = <1>;
 104                         reg = <0x10000000 0x20000>;
 105                         ranges;
 106
 107                         dma: dma@10001000 {
 108                                 compatible = "fsl,imx27-dma";
 109                                 reg = <0x10001000 0x1000>;
 110                                 interrupts = <32>;
 111                                 clocks = <&clks 50>, <&clks 70>;
 112                                 clock-names = "ipg", "ahb";
 113                                 #dma-cells = <1>;
 114                                 #dma-channels = <16>;
 115                         };
 116
 117                         wdog: wdog@10002000 {
 118                                 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
 119                                 reg = <0x10002000 0x1000>;
 120                                 interrupts = <27>;
 121                                 clocks = <&clks 74>;
 122                         };
 123
 124                         gpt1: timer@10003000 {
 125                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 126                                 reg = <0x10003000 0x1000>;
 127                                 interrupts = <26>;
 128                                 clocks = <&clks 46>, <&clks 61>;
 129                                 clock-names = "ipg", "per";
 130                         };
 131
 132                         gpt2: timer@10004000 {
 133                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 134                                 reg = <0x10004000 0x1000>;
 135                                 interrupts = <25>;
 136                                 clocks = <&clks 45>, <&clks 61>;
 137                                 clock-names = "ipg", "per";
 138                         };
 139
 140                         gpt3: timer@10005000 {
 141                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 142                                 reg = <0x10005000 0x1000>;
 143                                 interrupts = <24>;
 144                                 clocks = <&clks 44>, <&clks 61>;
 145                                 clock-names = "ipg", "per";
 146                         };
 147
 148                         pwm: pwm@10006000 {
 149                                 #pwm-cells = <2>;
 150                                 compatible = "fsl,imx27-pwm";
 151                                 reg = <0x10006000 0x1000>;
 152                                 interrupts = <23>;
 153                                 clocks = <&clks 34>, <&clks 61>;
 154                                 clock-names = "ipg", "per";
 155                         };
 156
 157                         kpp: kpp@10008000 {
 158                                 compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
 159                                 reg = <0x10008000 0x1000>;
 160                                 interrupts = <21>;
 161                                 clocks = <&clks 37>;
 162                                 status = "disabled";
 163                         };
 164
 165                         owire: owire@10009000 {
 166                                 compatible = "fsl,imx27-owire", "fsl,imx21-owire";
 167                                 reg = <0x10009000 0x1000>;
 168                                 clocks = <&clks 35>;
 169                                 status = "disabled";
 170                         };
 171
 172                         uart1: serial@1000a000 {
 173                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 174                                 reg = <0x1000a000 0x1000>;
 175                                 interrupts = <20>;
 176                                 clocks = <&clks 81>, <&clks 61>;
 177                                 clock-names = "ipg", "per";
 178                                 status = "disabled";
 179                         };
 180
 181                         uart2: serial@1000b000 {
 182                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 183                                 reg = <0x1000b000 0x1000>;
 184                                 interrupts = <19>;
 185                                 clocks = <&clks 80>, <&clks 61>;
 186                                 clock-names = "ipg", "per";
 187                                 status = "disabled";
 188                         };
 189
 190                         uart3: serial@1000c000 {
 191                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 192                                 reg = <0x1000c000 0x1000>;
 193                                 interrupts = <18>;
 194                                 clocks = <&clks 79>, <&clks 61>;
 195                                 clock-names = "ipg", "per";
 196                                 status = "disabled";
 197                         };
 198
 199                         uart4: serial@1000d000 {
 200                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 201                                 reg = <0x1000d000 0x1000>;
 202                                 interrupts = <17>;
 203                                 clocks = <&clks 78>, <&clks 61>;
 204                                 clock-names = "ipg", "per";
 205                                 status = "disabled";
 206                         };
 207
 208                         cspi1: cspi@1000e000 {
 209                                 #address-cells = <1>;
 210                                 #size-cells = <0>;
 211                                 compatible = "fsl,imx27-cspi";
 212                                 reg = <0x1000e000 0x1000>;
 213                                 interrupts = <16>;
 214                                 clocks = <&clks 53>, <&clks 60>;
 215                                 clock-names = "ipg", "per";
 216                                 status = "disabled";
 217                         };
 218
 219                         cspi2: cspi@1000f000 {
 220                                 #address-cells = <1>;
 221                                 #size-cells = <0>;
 222                                 compatible = "fsl,imx27-cspi";
 223                                 reg = <0x1000f000 0x1000>;
 224                                 interrupts = <15>;
 225                                 clocks = <&clks 52>, <&clks 60>;
 226                                 clock-names = "ipg", "per";
 227                                 status = "disabled";
 228                         };
 229
 230                         ssi1: ssi@10010000 {
 231                                 #sound-dai-cells = <0>;
 232                                 compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
 233                                 reg = <0x10010000 0x1000>;
 234                                 interrupts = <14>;
 235                                 clocks = <&clks 26>;
 236                                 dmas = <&dma 12>, <&dma 13>, <&dma 14>, <&dma 15>;
 237                                 dma-names = "rx0", "tx0", "rx1", "tx1";
 238                                 fsl,fifo-depth = <8>;
 239                                 status = "disabled";
 240                         };
 241
 242                         ssi2: ssi@10011000 {
 243                                 #sound-dai-cells = <0>;
 244                                 compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
 245                                 reg = <0x10011000 0x1000>;
 246                                 interrupts = <13>;
 247                                 clocks = <&clks 25>;
 248                                 dmas = <&dma 8>, <&dma 9>, <&dma 10>, <&dma 11>;
 249                                 dma-names = "rx0", "tx0", "rx1", "tx1";
 250                                 fsl,fifo-depth = <8>;
 251                                 status = "disabled";
 252                         };
 253
 254                         i2c1: i2c@10012000 {
 255                                 #address-cells = <1>;
 256                                 #size-cells = <0>;
 257                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 258                                 reg = <0x10012000 0x1000>;
 259                                 interrupts = <12>;
 260                                 clocks = <&clks 40>;
 261                                 status = "disabled";
 262                         };
 263
 264                         sdhci1: sdhci@10013000 {
 265                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 266                                 reg = <0x10013000 0x1000>;
 267                                 interrupts = <11>;
 268                                 clocks = <&clks 30>, <&clks 60>;
 269                                 clock-names = "ipg", "per";
 270                                 dmas = <&dma 7>;
 271                                 dma-names = "rx-tx";
 272                                 status = "disabled";
 273                         };
 274
 275                         sdhci2: sdhci@10014000 {
 276                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 277                                 reg = <0x10014000 0x1000>;
 278                                 interrupts = <10>;
 279                                 clocks = <&clks 29>, <&clks 60>;
 280                                 clock-names = "ipg", "per";
 281                                 dmas = <&dma 6>;
 282                                 dma-names = "rx-tx";
 283                                 status = "disabled";
 284                         };
 285
 286                         iomuxc: iomuxc@10015000 {
 287                                 compatible = "fsl,imx27-iomuxc";
 288                                 reg = <0x10015000 0x600>;
 289                                 #address-cells = <1>;
 290                                 #size-cells = <1>;
 291                                 ranges;
 292
 293                                 gpio1: gpio@10015000 {
 294                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 295                                         reg = <0x10015000 0x100>;
 296                                         interrupts = <8>;
 297                                         gpio-controller;
 298                                         #gpio-cells = <2>;
 299                                         interrupt-controller;
 300                                         #interrupt-cells = <2>;
 301                                 };
 302
 303                                 gpio2: gpio@10015100 {
 304                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 305                                         reg = <0x10015100 0x100>;
 306                                         interrupts = <8>;
 307                                         gpio-controller;
 308                                         #gpio-cells = <2>;
 309                                         interrupt-controller;
 310                                         #interrupt-cells = <2>;
 311                                 };
 312
 313                                 gpio3: gpio@10015200 {
 314                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 315                                         reg = <0x10015200 0x100>;
 316                                         interrupts = <8>;
 317                                         gpio-controller;
 318                                         #gpio-cells = <2>;
 319                                         interrupt-controller;
 320                                         #interrupt-cells = <2>;
 321                                 };
 322
 323                                 gpio4: gpio@10015300 {
 324                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 325                                         reg = <0x10015300 0x100>;
 326                                         interrupts = <8>;
 327                                         gpio-controller;
 328                                         #gpio-cells = <2>;
 329                                         interrupt-controller;
 330                                         #interrupt-cells = <2>;
 331                                 };
 332
 333                                 gpio5: gpio@10015400 {
 334                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 335                                         reg = <0x10015400 0x100>;
 336                                         interrupts = <8>;
 337                                         gpio-controller;
 338                                         #gpio-cells = <2>;
 339                                         interrupt-controller;
 340                                         #interrupt-cells = <2>;
 341                                 };
 342
 343                                 gpio6: gpio@10015500 {
 344                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 345                                         reg = <0x10015500 0x100>;
 346                                         interrupts = <8>;
 347                                         gpio-controller;
 348                                         #gpio-cells = <2>;
 349                                         interrupt-controller;
 350                                         #interrupt-cells = <2>;
 351                                 };
 352                         };
 353
 354                         audmux: audmux@10016000 {
 355                                 compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
 356                                 reg = <0x10016000 0x1000>;
 357                                 clocks = <&clks 0>;
 358                                 clock-names = "audmux";
 359                                 status = "disabled";
 360                         };
 361
 362                         cspi3: cspi@10017000 {
 363                                 #address-cells = <1>;
 364                                 #size-cells = <0>;
 365                                 compatible = "fsl,imx27-cspi";
 366                                 reg = <0x10017000 0x1000>;
 367                                 interrupts = <6>;
 368                                 clocks = <&clks 51>, <&clks 60>;
 369                                 clock-names = "ipg", "per";
 370                                 status = "disabled";
 371                         };
 372
 373                         gpt4: timer@10019000 {
 374                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 375                                 reg = <0x10019000 0x1000>;
 376                                 interrupts = <4>;
 377                                 clocks = <&clks 43>, <&clks 61>;
 378                                 clock-names = "ipg", "per";
 379                         };
 380
 381                         gpt5: timer@1001a000 {
 382                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 383                                 reg = <0x1001a000 0x1000>;
 384                                 interrupts = <3>;
 385                                 clocks = <&clks 42>, <&clks 61>;
 386                                 clock-names = "ipg", "per";
 387                         };
 388
 389                         uart5: serial@1001b000 {
 390                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 391                                 reg = <0x1001b000 0x1000>;
 392                                 interrupts = <49>;
 393                                 clocks = <&clks 77>, <&clks 61>;
 394                                 clock-names = "ipg", "per";
 395                                 status = "disabled";
 396                         };
 397
 398                         uart6: serial@1001c000 {
 399                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 400                                 reg = <0x1001c000 0x1000>;
 401                                 interrupts = <48>;
 402                                 clocks = <&clks 78>, <&clks 61>;
 403                                 clock-names = "ipg", "per";
 404                                 status = "disabled";
 405                         };
 406
 407                         i2c2: i2c@1001d000 {
 408                                 #address-cells = <1>;
 409                                 #size-cells = <0>;
 410                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 411                                 reg = <0x1001d000 0x1000>;
 412                                 interrupts = <1>;
 413                                 clocks = <&clks 39>;
 414                                 status = "disabled";
 415                         };
 416
 417                         sdhci3: sdhci@1001e000 {
 418                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 419                                 reg = <0x1001e000 0x1000>;
 420                                 interrupts = <9>;
 421                                 clocks = <&clks 28>, <&clks 60>;
 422                                 clock-names = "ipg", "per";
 423                                 dmas = <&dma 36>;
 424                                 dma-names = "rx-tx";
 425                                 status = "disabled";
 426                         };
 427
 428                         gpt6: timer@1001f000 {
 429                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 430                                 reg = <0x1001f000 0x1000>;
 431                                 interrupts = <2>;
 432                                 clocks = <&clks 41>, <&clks 61>;
 433                                 clock-names = "ipg", "per";
 434                         };
 435                 };
 436
 437                 aipi@10020000 { /* AIPI2 */
 438                         compatible = "fsl,aipi-bus", "simple-bus";
 439                         #address-cells = <1>;
 440                         #size-cells = <1>;
 441                         reg = <0x10020000 0x20000>;
 442                         ranges;
 443
 444                         fb: fb@10021000 {
 445                                 compatible = "fsl,imx27-fb", "fsl,imx21-fb";
 446                                 interrupts = <61>;
 447                                 reg = <0x10021000 0x1000>;
 448                                 clocks = <&clks 36>, <&clks 65>, <&clks 59>;
 449                                 clock-names = "ipg", "ahb", "per";
 450                                 status = "disabled";
 451                         };
 452
 453                         coda: coda@10023000 {
 454                                 compatible = "fsl,imx27-vpu";
 455                                 reg = <0x10023000 0x0200>;
 456                                 interrupts = <53>;
 457                                 clocks = <&clks 57>, <&clks 66>;
 458                                 clock-names = "per", "ahb";
 459                                 iram = <&iram>;
 460                         };
 461
 462                         usbotg: usb@10024000 {
 463                                 compatible = "fsl,imx27-usb";
 464                                 reg = <0x10024000 0x200>;
 465                                 interrupts = <56>;
 466                                 clocks = <&clks 15>;
 467                                 fsl,usbmisc = <&usbmisc 0>;
 468                                 fsl,usbphy = <&usbphy0>;
 469                                 status = "disabled";
 470                         };
 471
 472                         usbh1: usb@10024200 {
 473                                 compatible = "fsl,imx27-usb";
 474                                 reg = <0x10024200 0x200>;
 475                                 interrupts = <54>;
 476                                 clocks = <&clks 15>;
 477                                 fsl,usbmisc = <&usbmisc 1>;
 478                                 status = "disabled";
 479                         };
 480
 481                         usbh2: usb@10024400 {
 482                                 compatible = "fsl,imx27-usb";
 483                                 reg = <0x10024400 0x200>;
 484                                 interrupts = <55>;
 485                                 clocks = <&clks 15>;
 486                                 fsl,usbmisc = <&usbmisc 2>;
 487                                 fsl,usbphy = <&usbphy2>;
 488                                 status = "disabled";
 489                         };
 490
 491                         usbmisc: usbmisc@10024600 {
 492                                 #index-cells = <1>;
 493                                 compatible = "fsl,imx27-usbmisc";
 494                                 reg = <0x10024600 0x200>;
 495                                 clocks = <&clks 62>;
 496                         };
 497
 498                         sahara2: sahara@10025000 {
 499                                 compatible = "fsl,imx27-sahara";
 500                                 reg = <0x10025000 0x1000>;
 501                                 interrupts = <59>;
 502                                 clocks = <&clks 32>, <&clks 64>;
 503                                 clock-names = "ipg", "ahb";
 504                         };
 505
 506                         clks: ccm@10027000{
 507                                 compatible = "fsl,imx27-ccm";
 508                                 reg = <0x10027000 0x1000>;
 509                                 #clock-cells = <1>;
 510                         };
 511
 512                         iim: iim@10028000 {
 513                                 compatible = "fsl,imx27-iim";
 514                                 reg = <0x10028000 0x1000>;
 515                                 interrupts = <62>;
 516                                 clocks = <&clks 38>;
 517                         };
 518
 519                         fec: ethernet@1002b000 {
 520                                 compatible = "fsl,imx27-fec";
 521                                 reg = <0x1002b000 0x4000>;
 522                                 interrupts = <50>;
 523                                 clocks = <&clks 48>, <&clks 67>;
 524                                 clock-names = "ipg", "ahb";
 525                                 status = "disabled";
 526                         };
 527                 };
 528
 529                 nfc: nand@d8000000 {
 530                         #address-cells = <1>;
 531                         #size-cells = <1>;
 532                         compatible = "fsl,imx27-nand";
 533                         reg = <0xd8000000 0x1000>;
 534                         interrupts = <29>;
 535                         clocks = <&clks 54>;
 536                         status = "disabled";
 537                 };
 538
 539                 weim: weim@d8002000 {
 540                         #address-cells = <2>;
 541                         #size-cells = <1>;
 542                         compatible = "fsl,imx27-weim";
 543                         reg = <0xd8002000 0x1000>;
 544                         clocks = <&clks 0>;
 545                         ranges = <
 546                                 0 0 0xc0000000 0x08000000
 547                                 1 0 0xc8000000 0x08000000
 548                                 2 0 0xd0000000 0x02000000
 549                                 3 0 0xd2000000 0x02000000
 550                                 4 0 0xd4000000 0x02000000
 551                                 5 0 0xd6000000 0x02000000
 552                         >;
 553                         status = "disabled";
 554                 };
 555
 556                 iram: iram@ffff4c00 {
 557                         compatible = "mmio-sram";
 558                         reg = <0xffff4c00 0xb400>;
 559                 };
 560         };
 561 };