MIPS: Use dedicated exception handler if CPU supports RI/XI exceptions
authorLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Tue, 15 Jul 2014 13:09:56 +0000 (14:09 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 1 Aug 2014 22:06:39 +0000 (00:06 +0200)
commit5890f70f15c52d0204a578422f8da828a0ba1096
tree433c553c87e4e9150fdffbbc8d8026f747e21f5f
parent6ee729aa6c06c9bc2bc1dd27e809e8fe976a9e04
MIPS: Use dedicated exception handler if CPU supports RI/XI exceptions

Use the regular tlb_do_page_fault_0 (no write) handler to handle
the RI and XI exceptions. Also skip the RI/XI validation check
on TLB load handler since it's redundant when the CPU has
unique RI/XI exceptions.

Singed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7339/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/traps.c
arch/mips/mm/tlbex.c