ath9k: Update BaseExtension_1 eeprom structure
authorSujith Manoharan <c_manoha@qca.qualcomm.com>
Wed, 18 Dec 2013 04:23:22 +0000 (09:53 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Wed, 18 Dec 2013 20:23:44 +0000 (15:23 -0500)
* Add a new field "misc_enable"
* Use int_8 for tempslopextension.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
drivers/net/wireless/ath/ath9k/ar9003_eeprom.h

index 86baa20a68485204375518d4748c1e75dcc2bd37..d9e09bf178aab9ff73e610f1c379586cf6d9da05 100644 (file)
@@ -139,7 +139,7 @@ static const struct ar9300_eeprom ar9300_default = {
         },
        .base_ext1 = {
                .ant_div_control = 0,
-               .future = {0, 0, 0},
+               .future = {0, 0},
                .tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}
        },
        .calFreqPier2G = {
@@ -717,7 +717,7 @@ static const struct ar9300_eeprom ar9300_x113 = {
         },
         .base_ext1 = {
                .ant_div_control = 0,
-               .future = {0, 0, 0},
+               .future = {0, 0},
                .tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}
         },
        .calFreqPier2G = {
@@ -1296,7 +1296,7 @@ static const struct ar9300_eeprom ar9300_h112 = {
        },
        .base_ext1 = {
                .ant_div_control = 0,
-               .future = {0, 0, 0},
+               .future = {0, 0},
                .tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}
        },
        .calFreqPier2G = {
@@ -1875,7 +1875,7 @@ static const struct ar9300_eeprom ar9300_x112 = {
        },
        .base_ext1 = {
                .ant_div_control = 0,
-               .future = {0, 0, 0},
+               .future = {0, 0},
                .tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}
        },
        .calFreqPier2G = {
@@ -2453,7 +2453,7 @@ static const struct ar9300_eeprom ar9300_h116 = {
         },
         .base_ext1 = {
                .ant_div_control = 0,
-               .future = {0, 0, 0},
+               .future = {0, 0},
                .tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}
         },
        .calFreqPier2G = {
index 0e5daa58a4fc14371d360bdc5aa22937902bc824..694ca2e680e5d5a7d45eba015216c395026ef94a 100644 (file)
@@ -270,10 +270,20 @@ struct cal_ctl_data_5g {
        u8 ctlEdges[AR9300_NUM_BAND_EDGES_5G];
 } __packed;
 
+#define MAX_BASE_EXTENSION_FUTURE 2
+
 struct ar9300_BaseExtension_1 {
        u8 ant_div_control;
-       u8 future[3];
-       u8 tempslopextension[8];
+       u8 future[MAX_BASE_EXTENSION_FUTURE];
+       /*
+        * misc_enable:
+        *
+        * BIT 0   - TX Gain Cap enable.
+        * BIT 1   - Uncompressed Checksum enable.
+        * BIT 2/3 - MinCCApwr enable 2g/5g.
+        */
+       u8 misc_enable;
+       int8_t tempslopextension[8];
        int8_t quick_drop_low;
        int8_t quick_drop_high;
 } __packed;