[ACPI] acpi_register_gsi() fix needed for ACPICA 20051021
authorLen Brown <len.brown@intel.com>
Wed, 28 Dec 2005 07:43:51 +0000 (02:43 -0500)
committerLen Brown <len.brown@intel.com>
Wed, 28 Dec 2005 07:50:44 +0000 (02:50 -0500)
Use the #define for ACPI_LEVEL_SENSITIVE instead of assuming
non-zero, because ACPICA 20051021 changes its value to zero.

Also, use uniform variable names:
edge_level -> triggering
active_high_low -> polarity

Signed-off-by: Len Brown <len.brown@intel.com>
arch/i386/kernel/acpi/boot.c
arch/i386/kernel/mpparse.c
arch/ia64/kernel/acpi.c
arch/x86_64/kernel/mpparse.c

index 447fa9e33ffbeaaca7bbee58621900cbf0ba2b1e..1f378df14f34738d1b17dd731132727b0641ae7f 100644 (file)
@@ -464,7 +464,7 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
  * success: return IRQ number (>=0)
  * failure: return < 0
  */
-int acpi_register_gsi(u32 gsi, int edge_level, int active_high_low)
+int acpi_register_gsi(u32 gsi, int triggering, int polarity)
 {
        unsigned int irq;
        unsigned int plat_gsi = gsi;
@@ -476,14 +476,14 @@ int acpi_register_gsi(u32 gsi, int edge_level, int active_high_low)
        if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
                extern void eisa_set_level_irq(unsigned int irq);
 
-               if (edge_level == ACPI_LEVEL_SENSITIVE)
+               if (triggering == ACPI_LEVEL_SENSITIVE)
                        eisa_set_level_irq(gsi);
        }
 #endif
 
 #ifdef CONFIG_X86_IO_APIC
        if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) {
-               plat_gsi = mp_register_gsi(gsi, edge_level, active_high_low);
+               plat_gsi = mp_register_gsi(gsi, triggering, polarity);
        }
 #endif
        acpi_gsi_to_irq(plat_gsi, &irq);
index 1ca5269b1e863c8d9b7d9792e1b796a6cb7d8b4e..d7cede83ba2e63fc068c410e90018ef75272f43d 100644 (file)
@@ -1070,7 +1070,7 @@ void __init mp_config_acpi_legacy_irqs (void)
 
 #define MAX_GSI_NUM    4096
 
-int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
+int mp_register_gsi (u32 gsi, int triggering, int polarity)
 {
        int                     ioapic = -1;
        int                     ioapic_pin = 0;
@@ -1119,7 +1119,7 @@ int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
 
        mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
 
-       if (edge_level) {
+       if (triggering == ACPI_LEVEL_SENSITIVE) {
                /*
                 * For PCI devices assign IRQs in order, avoiding gaps
                 * due to unused I/O APIC pins.
@@ -1141,8 +1141,8 @@ int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
        }
 
        io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
-                   edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,
-                   active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1);
+                   triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
+                   polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
        return gsi;
 }
 
index 9ad94ddf668776c14092993335fc171ce5ed0664..d2702c419cf830450ad63621bccec1e50842e718 100644 (file)
@@ -567,16 +567,16 @@ void __init acpi_numa_arch_fixup(void)
  * success: return IRQ number (>=0)
  * failure: return < 0
  */
-int acpi_register_gsi(u32 gsi, int edge_level, int active_high_low)
+int acpi_register_gsi(u32 gsi, int triggering, int polarity)
 {
        if (has_8259 && gsi < 16)
                return isa_irq_to_vector(gsi);
 
        return iosapic_register_intr(gsi,
-                                    (active_high_low ==
+                                    (polarity ==
                                      ACPI_ACTIVE_HIGH) ? IOSAPIC_POL_HIGH :
                                     IOSAPIC_POL_LOW,
-                                    (edge_level ==
+                                    (triggering ==
                                      ACPI_EDGE_SENSITIVE) ? IOSAPIC_EDGE :
                                     IOSAPIC_LEVEL);
 }
index ba817e7454b248f6e302e2d026053cc141db1f31..dc49bfb6db0a92fc71349f0626887e5aaa6cee72 100644 (file)
@@ -964,7 +964,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
 
        mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
 
-       if (triggering) {
+       if (triggering == ACPI_LEVEL_SENSITIVE) {
                /*
                 * For PCI devices assign IRQs in order, avoiding gaps
                 * due to unused I/O APIC pins.