Merge tag 'drm-intel-next-2012-12-21' of git://people.freedesktop.org/~danvet/drm...
authorDave Airlie <airlied@redhat.com>
Thu, 17 Jan 2013 10:34:08 +0000 (20:34 +1000)
committerDave Airlie <airlied@redhat.com>
Thu, 17 Jan 2013 10:34:08 +0000 (20:34 +1000)
Daniel writes:
- seqno wrap fixes and debug infrastructure from Mika Kuoppala and Chris
  Wilson
- some leftover kill-agp on gen6+ patches from Ben
- hotplug improvements from Damien
- clear fb when allocated from stolen, avoids dirt on the fbcon (Chris)
- Stolen mem support from Chris Wilson, one of the many steps to get to
  real fastboot support.
- Some DDI code cleanups from Paulo.
- Some refactorings around lvds and dp code.
- some random little bits&pieces

* tag 'drm-intel-next-2012-12-21' of git://people.freedesktop.org/~danvet/drm-intel: (93 commits)
  drm/i915: Return the real error code from intel_set_mode()
  drm/i915: Make GSM void
  drm/i915: Move GSM mapping into dev_priv
  drm/i915: Move even more gtt code to i915_gem_gtt
  drm/i915: Make next_seqno debugs entry to use i915_gem_set_seqno
  drm/i915: Introduce i915_gem_set_seqno()
  drm/i915: Always clear semaphore mboxes on seqno wrap
  drm/i915: Initialize hardware semaphore state on ring init
  drm/i915: Introduce ring set_seqno
  drm/i915: Missed conversion to gtt_pte_t
  drm/i915: Bug on unsupported swizzled platforms
  drm/i915: BUG() if fences are used on unsupported platform
  drm/i915: fixup overlay stolen memory leak
  drm/i915: clean up PIPECONF bpc #defines
  drm/i915: add intel_dp_set_signal_levels
  drm/i915: remove leftover display.update_wm assignment
  drm/i915: check for the PCH when setting pch_transcoder
  drm/i915: Clear the stolen fb before enabling
  drm/i915: Access to snooped system memory through the GTT is incoherent
  drm/i915: Remove stale comment about intel_dp_detect()
  ...

Conflicts:
drivers/gpu/drm/i915/intel_display.c

21 files changed:
1  2 
drivers/gpu/drm/drm_mm.c
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_dma.c
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_gem_dmabuf.c
drivers/gpu/drm/i915/i915_gem_execbuffer.c
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_crt.c
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_ringbuffer.c
drivers/gpu/drm/i915/intel_ringbuffer.h
drivers/gpu/drm/i915/intel_sdvo.c
include/drm/drm_mm.h

Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
index a9fb046b94a140ab169cbd2eb016922fc702dd98,1464e472ce44ed28d32694a16d661d29c705c5e7..8c36a11a9a57040bc93ae9fa4dc37cec7e18f84a
@@@ -1506,26 -1489,23 +1489,27 @@@ static void intel_disable_pll(struct dr
  
  /* SBI access */
  static void
 -intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value)
 +intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
 +              enum intel_sbi_destination destination)
  {
-       unsigned long flags;
 +      u32 tmp;
 +
-       spin_lock_irqsave(&dev_priv->dpio_lock, flags);
-       if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0, 100)) {
+       WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
+       if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0,
+                               100)) {
                DRM_ERROR("timeout waiting for SBI to become ready\n");
-               goto out_unlock;
+               return;
        }
  
 -      I915_WRITE(SBI_ADDR,
 -                      (reg << 16));
 -      I915_WRITE(SBI_DATA,
 -                      value);
 -      I915_WRITE(SBI_CTL_STAT,
 -                      SBI_BUSY |
 -                      SBI_CTL_OP_CRWR);
 +      I915_WRITE(SBI_ADDR, (reg << 16));
 +      I915_WRITE(SBI_DATA, value);
 +
 +      if (destination == SBI_ICLK)
 +              tmp = SBI_CTL_DEST_ICLK | SBI_CTL_OP_CRWR;
 +      else
 +              tmp = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IOWR;
 +      I915_WRITE(SBI_CTL_STAT, SBI_BUSY | tmp);
  
        if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0,
                                100)) {
  }
  
  static u32
 -intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg)
 +intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
 +             enum intel_sbi_destination destination)
  {
-       unsigned long flags;
 +      u32 value = 0;
+       WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
  
-       spin_lock_irqsave(&dev_priv->dpio_lock, flags);
-       if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0, 100)) {
+       if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0,
+                               100)) {
                DRM_ERROR("timeout waiting for SBI to become ready\n");
-               goto out_unlock;
+               return 0;
        }
  
 -      I915_WRITE(SBI_ADDR,
 -                      (reg << 16));
 -      I915_WRITE(SBI_CTL_STAT,
 -                      SBI_BUSY |
 -                      SBI_CTL_OP_CRRD);
 +      I915_WRITE(SBI_ADDR, (reg << 16));
 +
 +      if (destination == SBI_ICLK)
 +              value = SBI_CTL_DEST_ICLK | SBI_CTL_OP_CRRD;
 +      else
 +              value = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IORD;
 +      I915_WRITE(SBI_CTL_STAT, value | SBI_BUSY);
  
        if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0,
                                100)) {
@@@ -9283,13 -8807,8 +9005,11 @@@ void intel_modeset_setup_hw_state(struc
        }
  
        if (force_restore) {
 -              for_each_pipe(pipe)
 +              for_each_pipe(pipe) {
-                       crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
-                       intel_set_mode(&crtc->base, &crtc->base.mode,
-                                      crtc->base.x, crtc->base.y, crtc->base.fb);
+                       intel_crtc_restore_mode(dev_priv->pipe_to_crtc_mapping[pipe]);
 +              }
 +
 +              i915_redisable_vga(dev);
        } else {
                intel_modeset_update_staged_output_state(dev);
        }
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge