MIPS: Remove redundant IPTI==IPPCI logic
authorJames Hogan <james.hogan@imgtec.com>
Tue, 27 Jan 2015 21:45:49 +0000 (21:45 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 31 Mar 2015 10:04:12 +0000 (12:04 +0200)
The situation where the timer interrupt is on the same line as the
performance counter interrupt is handled in per_cpu_trap_init() by
setting cp0_perfcount_irq to -1, so there is no need to duplicate the
logic conditional upon cp0_perfcount_irq >= 0 in perf
(init_hw_perf_events()) and oprofile (mipsxx_init()).

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9125/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/perf_event_mipsxx.c
arch/mips/oprofile/op_model_mipsxx.c

index 9466184d0039d1b40e85db2fc0447ce9cafcee2b..76bc3bb18c45e6cb40ad899e9f0e1a4a966150b3 100644 (file)
@@ -1615,8 +1615,7 @@ init_hw_perf_events(void)
 
        if (get_c0_perfcount_int)
                irq = get_c0_perfcount_int();
-       else if ((cp0_perfcount_irq >= 0) &&
-                (cp0_compare_irq != cp0_perfcount_irq))
+       else if (cp0_perfcount_irq >= 0)
                irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
        else
                irq = -1;
index faf0d4ad0cc2adebccf3d278d7bd1f1b3394cb18..24729f023d93d10838d96998dbc161812fffcb3c 100644 (file)
@@ -435,8 +435,7 @@ static int __init mipsxx_init(void)
 
        if (get_c0_perfcount_int)
                perfcount_irq = get_c0_perfcount_int();
-       else if ((cp0_perfcount_irq >= 0) &&
-                (cp0_compare_irq != cp0_perfcount_irq))
+       else if (cp0_perfcount_irq >= 0)
                perfcount_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
        else
                perfcount_irq = -1;