PM / devfreq: event: Add documentation for exynos-ppmu devfreq-event driver
authorChanwoo Choi <cw00.choi@samsung.com>
Mon, 26 Jan 2015 04:16:29 +0000 (13:16 +0900)
committerMyungJoo Ham <myungjoo.ham@samsung.com>
Fri, 30 Jan 2015 08:56:42 +0000 (17:56 +0900)
This patch adds the documentation for Exynos PPMU (Platform Performance
Monitoring Unit) devfreq-event driver.

Cc: MyungJoo Ham <myungjoo.ham@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Documentation/devicetree/bindings/devfreq/event/exynos-ppmu.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/devfreq/event/exynos-ppmu.txt b/Documentation/devicetree/bindings/devfreq/event/exynos-ppmu.txt
new file mode 100644 (file)
index 0000000..b54bf3a
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+
+* Samsung Exynos PPMU (Platform Performance Monitoring Unit) device
+
+The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for
+each IP. PPMU provides the primitive values to get performance data. These
+PPMU events provide information of the SoC's behaviors so that you may
+use to analyze system performance, to make behaviors visible and to count
+usages of each IP (DMC, CPU, RIGHTBUS, LEFTBUS, CAM interface, LCD, G3D, MFC).
+The Exynos PPMU driver uses the devfreq-event class to provide event data
+to various devfreq devices. The devfreq devices would use the event data when
+derterming the current state of each IP.
+
+Required properties:
+- compatible: Should be "samsung,exynos-ppmu".
+- reg: physical base address of each PPMU and length of memory mapped region.
+
+Optional properties:
+- clock-names : the name of clock used by the PPMU, "ppmu"
+- clocks : phandles for clock specified in "clock-names" property
+- #clock-cells: should be 1.
+
+Example1 : PPMU nodes in exynos3250.dtsi are listed below.
+
+               ppmu_dmc0: ppmu_dmc0@106a0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x106a0000 0x2000>;
+                       status = "disabled";
+               };
+
+               ppmu_dmc1: ppmu_dmc1@106b0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x106b0000 0x2000>;
+                       status = "disabled";
+               };
+
+               ppmu_cpu: ppmu_cpu@106c0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x106c0000 0x2000>;
+                       status = "disabled";
+               };
+
+               ppmu_rightbus: ppmu_rightbus@112a0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x112a0000 0x2000>;
+                       clocks = <&cmu CLK_PPMURIGHT>;
+                       clock-names = "ppmu";
+                       status = "disabled";
+               };
+
+               ppmu_leftbus: ppmu_leftbus0@116a0000 {
+                       compatible = "samsung,exynos-ppmu";
+                       reg = <0x116a0000 0x2000>;
+                       clocks = <&cmu CLK_PPMULEFT>;
+                       clock-names = "ppmu";
+                       status = "disabled";
+               };
+
+Example2 : Events of each PPMU node in exynos3250-rinato.dts are listed below.
+
+       &ppmu_dmc0 {
+               status = "okay";
+
+               events {
+                       ppmu_dmc0_3: ppmu-event3-dmc0 {
+                               event-name = "ppmu-event3-dmc0";
+                       };
+
+                       ppmu_dmc0_2: ppmu-event2-dmc0 {
+                               event-name = "ppmu-event2-dmc0";
+                       };
+
+                       ppmu_dmc0_1: ppmu-event1-dmc0 {
+                               event-name = "ppmu-event1-dmc0";
+                       };
+
+                       ppmu_dmc0_0: ppmu-event0-dmc0 {
+                               event-name = "ppmu-event0-dmc0";
+                       };
+               };
+       };
+
+       &ppmu_dmc1 {
+               status = "okay";
+
+               events {
+                       ppmu_dmc1_3: ppmu-event3-dmc1 {
+                               event-name = "ppmu-event3-dmc1";
+                       };
+               };
+       };
+
+       &ppmu_leftbus {
+               status = "okay";
+
+               events {
+                       ppmu_leftbus_3: ppmu-event3-leftbus {
+                               event-name = "ppmu-event3-leftbus";
+                       };
+               };
+       };
+
+       &ppmu_rightbus {
+               status = "okay";
+
+               events {
+                       ppmu_rightbus_3: ppmu-event3-rightbus {
+                               event-name = "ppmu-event3-rightbus";
+                       };
+               };
+       };