/ {
model = "MPC8540ADS";
- compatible = "MPC85xxADS";
+ compatible = "MPC8540ADS", "MPC85xxADS";
#address-cells = <1>;
#size-cells = <1>;
- linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
- linux,phandle = <200>;
PowerPC,8540@0 {
device_type = "cpu";
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
32-bit;
- linux,phandle = <201>;
};
};
memory {
device_type = "memory";
- linux,phandle = <300>;
reg = <00000000 08000000>; // 128M at 0x0
};
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
dfsrr;
};
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
- linux,phandle = <24520>;
- ethernet-phy@0 {
- linux,phandle = <2452000>;
- interrupt-parent = <40000>;
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
interrupts = <35 1>;
reg = <0>;
device_type = "ethernet-phy";
};
- ethernet-phy@1 {
- linux,phandle = <2452001>;
- interrupt-parent = <40000>;
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
interrupts = <35 1>;
reg = <1>;
device_type = "ethernet-phy";
};
- ethernet-phy@3 {
- linux,phandle = <2452003>;
- interrupt-parent = <40000>;
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&mpic>;
interrupts = <37 1>;
reg = <3>;
device_type = "ethernet-phy";
address = [ 00 E0 0C 00 73 00 ];
local-mac-address = [ 00 E0 0C 00 73 00 ];
interrupts = <d 2 e 2 12 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452000>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy0>;
};
ethernet@25000 {
address = [ 00 E0 0C 00 73 01 ];
local-mac-address = [ 00 E0 0C 00 73 01 ];
interrupts = <13 2 14 2 18 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452001>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
};
ethernet@26000 {
address = [ 00 E0 0C 00 73 02 ];
local-mac-address = [ 00 E0 0C 00 73 02 ];
interrupts = <19 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452003>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy3>;
};
serial@4500 {
reg = <4500 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
serial@4600 {
reg = <4600 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
pci@8000 {
- linux,phandle = <8000>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x02 */
- 1000 0 0 1 40000 31 1
- 1000 0 0 2 40000 32 1
- 1000 0 0 3 40000 33 1
- 1000 0 0 4 40000 34 1
+ 1000 0 0 1 &mpic 31 1
+ 1000 0 0 2 &mpic 32 1
+ 1000 0 0 3 &mpic 33 1
+ 1000 0 0 4 &mpic 34 1
/* IDSEL 0x03 */
- 1800 0 0 1 40000 34 1
- 1800 0 0 2 40000 31 1
- 1800 0 0 3 40000 32 1
- 1800 0 0 4 40000 33 1
+ 1800 0 0 1 &mpic 34 1
+ 1800 0 0 2 &mpic 31 1
+ 1800 0 0 3 &mpic 32 1
+ 1800 0 0 4 &mpic 33 1
/* IDSEL 0x04 */
- 2000 0 0 1 40000 33 1
- 2000 0 0 2 40000 34 1
- 2000 0 0 3 40000 31 1
- 2000 0 0 4 40000 32 1
+ 2000 0 0 1 &mpic 33 1
+ 2000 0 0 2 &mpic 34 1
+ 2000 0 0 3 &mpic 31 1
+ 2000 0 0 4 &mpic 32 1
/* IDSEL 0x05 */
- 2800 0 0 1 40000 32 1
- 2800 0 0 2 40000 33 1
- 2800 0 0 3 40000 34 1
- 2800 0 0 4 40000 31 1
+ 2800 0 0 1 &mpic 32 1
+ 2800 0 0 2 &mpic 33 1
+ 2800 0 0 3 &mpic 34 1
+ 2800 0 0 4 &mpic 31 1
/* IDSEL 0x0c */
- 6000 0 0 1 40000 31 1
- 6000 0 0 2 40000 32 1
- 6000 0 0 3 40000 33 1
- 6000 0 0 4 40000 34 1
+ 6000 0 0 1 &mpic 31 1
+ 6000 0 0 2 &mpic 32 1
+ 6000 0 0 3 &mpic 33 1
+ 6000 0 0 4 &mpic 34 1
/* IDSEL 0x0d */
- 6800 0 0 1 40000 34 1
- 6800 0 0 2 40000 31 1
- 6800 0 0 3 40000 32 1
- 6800 0 0 4 40000 33 1
+ 6800 0 0 1 &mpic 34 1
+ 6800 0 0 2 &mpic 31 1
+ 6800 0 0 3 &mpic 32 1
+ 6800 0 0 4 &mpic 33 1
/* IDSEL 0x0e */
- 7000 0 0 1 40000 33 1
- 7000 0 0 2 40000 34 1
- 7000 0 0 3 40000 31 1
- 7000 0 0 4 40000 32 1
+ 7000 0 0 1 &mpic 33 1
+ 7000 0 0 2 &mpic 34 1
+ 7000 0 0 3 &mpic 31 1
+ 7000 0 0 4 &mpic 32 1
/* IDSEL 0x0f */
- 7800 0 0 1 40000 32 1
- 7800 0 0 2 40000 33 1
- 7800 0 0 3 40000 34 1
- 7800 0 0 4 40000 31 1
+ 7800 0 0 1 &mpic 32 1
+ 7800 0 0 2 &mpic 33 1
+ 7800 0 0 3 &mpic 34 1
+ 7800 0 0 4 &mpic 31 1
/* IDSEL 0x12 */
- 9000 0 0 1 40000 31 1
- 9000 0 0 2 40000 32 1
- 9000 0 0 3 40000 33 1
- 9000 0 0 4 40000 34 1
+ 9000 0 0 1 &mpic 31 1
+ 9000 0 0 2 &mpic 32 1
+ 9000 0 0 3 &mpic 33 1
+ 9000 0 0 4 &mpic 34 1
/* IDSEL 0x13 */
- 9800 0 0 1 40000 34 1
- 9800 0 0 2 40000 31 1
- 9800 0 0 3 40000 32 1
- 9800 0 0 4 40000 33 1
+ 9800 0 0 1 &mpic 34 1
+ 9800 0 0 2 &mpic 31 1
+ 9800 0 0 3 &mpic 32 1
+ 9800 0 0 4 &mpic 33 1
/* IDSEL 0x14 */
- a000 0 0 1 40000 33 1
- a000 0 0 2 40000 34 1
- a000 0 0 3 40000 31 1
- a000 0 0 4 40000 32 1
+ a000 0 0 1 &mpic 33 1
+ a000 0 0 2 &mpic 34 1
+ a000 0 0 3 &mpic 31 1
+ a000 0 0 4 &mpic 32 1
/* IDSEL 0x15 */
- a800 0 0 1 40000 32 1
- a800 0 0 2 40000 33 1
- a800 0 0 3 40000 34 1
- a800 0 0 4 40000 31 1>;
- interrupt-parent = <40000>;
+ a800 0 0 1 &mpic 32 1
+ a800 0 0 2 &mpic 33 1
+ a800 0 0 3 &mpic 34 1
+ a800 0 0 4 &mpic 31 1>;
+ interrupt-parent = <&mpic>;
interrupts = <08 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
device_type = "pci";
};
- pic@40000 {
- linux,phandle = <40000>;
+ mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
/ {
model = "MPC8541CDS";
- compatible = "MPC85xxCDS";
+ compatible = "MPC8541CDS", "MPC85xxCDS";
#address-cells = <1>;
#size-cells = <1>;
- linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
- linux,phandle = <200>;
PowerPC,8541@0 {
device_type = "cpu";
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
32-bit;
- linux,phandle = <201>;
};
};
memory {
device_type = "memory";
- linux,phandle = <300>;
reg = <00000000 08000000>; // 128M at 0x0
};
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
dfsrr;
};
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
- linux,phandle = <24520>;
- ethernet-phy@0 {
- linux,phandle = <2452000>;
- interrupt-parent = <40000>;
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <0>;
device_type = "ethernet-phy";
};
- ethernet-phy@1 {
- linux,phandle = <2452001>;
- interrupt-parent = <40000>;
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <1>;
device_type = "ethernet-phy";
reg = <24000 1000>;
local-mac-address = [ 00 E0 0C 00 73 00 ];
interrupts = <d 2 e 2 12 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452000>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy0>;
};
ethernet@25000 {
reg = <25000 1000>;
local-mac-address = [ 00 E0 0C 00 73 01 ];
interrupts = <13 2 14 2 18 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452001>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
};
serial@4500 {
reg = <4500 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
serial@4600 {
reg = <4600 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
- pci@8000 {
- linux,phandle = <8000>;
+ pci1: pci@8000 {
interrupt-map-mask = <1f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 */
- 08000 0 0 1 40000 30 1
- 08000 0 0 2 40000 31 1
- 08000 0 0 3 40000 32 1
- 08000 0 0 4 40000 33 1
+ 08000 0 0 1 &mpic 30 1
+ 08000 0 0 2 &mpic 31 1
+ 08000 0 0 3 &mpic 32 1
+ 08000 0 0 4 &mpic 33 1
/* IDSEL 0x11 */
- 08800 0 0 1 40000 30 1
- 08800 0 0 2 40000 31 1
- 08800 0 0 3 40000 32 1
- 08800 0 0 4 40000 33 1
+ 08800 0 0 1 &mpic 30 1
+ 08800 0 0 2 &mpic 31 1
+ 08800 0 0 3 &mpic 32 1
+ 08800 0 0 4 &mpic 33 1
/* IDSEL 0x12 (Slot 1) */
- 09000 0 0 1 40000 30 1
- 09000 0 0 2 40000 31 1
- 09000 0 0 3 40000 32 1
- 09000 0 0 4 40000 33 1
+ 09000 0 0 1 &mpic 30 1
+ 09000 0 0 2 &mpic 31 1
+ 09000 0 0 3 &mpic 32 1
+ 09000 0 0 4 &mpic 33 1
/* IDSEL 0x13 (Slot 2) */
- 09800 0 0 1 40000 31 1
- 09800 0 0 2 40000 32 1
- 09800 0 0 3 40000 33 1
- 09800 0 0 4 40000 30 1
+ 09800 0 0 1 &mpic 31 1
+ 09800 0 0 2 &mpic 32 1
+ 09800 0 0 3 &mpic 33 1
+ 09800 0 0 4 &mpic 30 1
/* IDSEL 0x14 (Slot 3) */
- 0a000 0 0 1 40000 32 1
- 0a000 0 0 2 40000 33 1
- 0a000 0 0 3 40000 30 1
- 0a000 0 0 4 40000 31 1
+ 0a000 0 0 1 &mpic 32 1
+ 0a000 0 0 2 &mpic 33 1
+ 0a000 0 0 3 &mpic 30 1
+ 0a000 0 0 4 &mpic 31 1
/* IDSEL 0x15 (Slot 4) */
- 0a800 0 0 1 40000 33 1
- 0a800 0 0 2 40000 30 1
- 0a800 0 0 3 40000 31 1
- 0a800 0 0 4 40000 32 1
+ 0a800 0 0 1 &mpic 33 1
+ 0a800 0 0 2 &mpic 30 1
+ 0a800 0 0 3 &mpic 31 1
+ 0a800 0 0 4 &mpic 32 1
/* Bus 1 (Tundra Bridge) */
/* IDSEL 0x12 (ISA bridge) */
- 19000 0 0 1 40000 30 1
- 19000 0 0 2 40000 31 1
- 19000 0 0 3 40000 32 1
- 19000 0 0 4 40000 33 1>;
- interrupt-parent = <40000>;
+ 19000 0 0 1 &mpic 30 1
+ 19000 0 0 2 &mpic 31 1
+ 19000 0 0 3 &mpic 32 1
+ 19000 0 0 4 &mpic 33 1>;
+ interrupt-parent = <&mpic>;
interrupts = <08 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
compatible = "chrp,iic";
big-endian;
interrupts = <1>;
- interrupt-parent = <8000>;
+ interrupt-parent = <&pci1>;
};
};
pci@9000 {
- linux,phandle = <9000>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x15 */
- a800 0 0 1 40000 3b 1
- a800 0 0 2 40000 3b 1
- a800 0 0 3 40000 3b 1
- a800 0 0 4 40000 3b 1>;
- interrupt-parent = <40000>;
+ a800 0 0 1 &mpic 3b 1
+ a800 0 0 2 &mpic 3b 1
+ a800 0 0 3 &mpic 3b 1
+ a800 0 0 4 &mpic 3b 1>;
+ interrupt-parent = <&mpic>;
interrupts = <09 2>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 20000000
device_type = "pci";
};
- pic@40000 {
- linux,phandle = <40000>;
+ mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
/ {
model = "MPC8548CDS";
- compatible = "MPC85xxCDS";
+ compatible = "MPC8548CDS", "MPC85xxCDS";
#address-cells = <1>;
#size-cells = <1>;
- linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
- linux,phandle = <200>;
PowerPC,8548@0 {
device_type = "cpu";
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
32-bit;
- linux,phandle = <201>;
};
};
memory {
device_type = "memory";
- linux,phandle = <300>;
reg = <00000000 08000000>; // 128M at 0x0
};
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
dfsrr;
};
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
- linux,phandle = <24520>;
- ethernet-phy@0 {
- linux,phandle = <2452000>;
- interrupt-parent = <40000>;
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <0>;
device_type = "ethernet-phy";
};
- ethernet-phy@1 {
- linux,phandle = <2452001>;
- interrupt-parent = <40000>;
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <1>;
device_type = "ethernet-phy";
};
-
- ethernet-phy@2 {
- linux,phandle = <2452002>;
- interrupt-parent = <40000>;
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <2>;
device_type = "ethernet-phy";
};
- ethernet-phy@3 {
- linux,phandle = <2452003>;
- interrupt-parent = <40000>;
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <3>;
device_type = "ethernet-phy";
reg = <24000 1000>;
local-mac-address = [ 00 E0 0C 00 73 00 ];
interrupts = <d 2 e 2 12 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452000>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy0>;
};
ethernet@25000 {
reg = <25000 1000>;
local-mac-address = [ 00 E0 0C 00 73 01 ];
interrupts = <13 2 14 2 18 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452001>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
};
+/* eTSEC 3/4 are currently broken
ethernet@26000 {
#address-cells = <1>;
#size-cells = <0>;
reg = <26000 1000>;
local-mac-address = [ 00 E0 0C 00 73 02 ];
interrupts = <f 2 10 2 11 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452001>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy2>;
};
-/* eTSEC 4 is currently broken
ethernet@27000 {
#address-cells = <1>;
#size-cells = <0>;
reg = <27000 1000>;
local-mac-address = [ 00 E0 0C 00 73 03 ];
interrupts = <15 2 16 2 17 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452001>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy3>;
};
*/
reg = <4500 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
serial@4600 {
reg = <4600 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
- pci@8000 {
- linux,phandle = <8000>;
+ pci1: pci@8000 {
interrupt-map-mask = <1f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 */
- 08000 0 0 1 40000 30 1
- 08000 0 0 2 40000 31 1
- 08000 0 0 3 40000 32 1
- 08000 0 0 4 40000 33 1
+ 08000 0 0 1 &mpic 30 1
+ 08000 0 0 2 &mpic 31 1
+ 08000 0 0 3 &mpic 32 1
+ 08000 0 0 4 &mpic 33 1
/* IDSEL 0x11 */
- 08800 0 0 1 40000 30 1
- 08800 0 0 2 40000 31 1
- 08800 0 0 3 40000 32 1
- 08800 0 0 4 40000 33 1
+ 08800 0 0 1 &mpic 30 1
+ 08800 0 0 2 &mpic 31 1
+ 08800 0 0 3 &mpic 32 1
+ 08800 0 0 4 &mpic 33 1
/* IDSEL 0x12 (Slot 1) */
- 09000 0 0 1 40000 30 1
- 09000 0 0 2 40000 31 1
- 09000 0 0 3 40000 32 1
- 09000 0 0 4 40000 33 1
+ 09000 0 0 1 &mpic 30 1
+ 09000 0 0 2 &mpic 31 1
+ 09000 0 0 3 &mpic 32 1
+ 09000 0 0 4 &mpic 33 1
/* IDSEL 0x13 (Slot 2) */
- 09800 0 0 1 40000 31 1
- 09800 0 0 2 40000 32 1
- 09800 0 0 3 40000 33 1
- 09800 0 0 4 40000 30 1
+ 09800 0 0 1 &mpic 31 1
+ 09800 0 0 2 &mpic 32 1
+ 09800 0 0 3 &mpic 33 1
+ 09800 0 0 4 &mpic 30 1
/* IDSEL 0x14 (Slot 3) */
- 0a000 0 0 1 40000 32 1
- 0a000 0 0 2 40000 33 1
- 0a000 0 0 3 40000 30 1
- 0a000 0 0 4 40000 31 1
+ 0a000 0 0 1 &mpic 32 1
+ 0a000 0 0 2 &mpic 33 1
+ 0a000 0 0 3 &mpic 30 1
+ 0a000 0 0 4 &mpic 31 1
/* IDSEL 0x15 (Slot 4) */
- 0a800 0 0 1 40000 33 1
- 0a800 0 0 2 40000 30 1
- 0a800 0 0 3 40000 31 1
- 0a800 0 0 4 40000 32 1
+ 0a800 0 0 1 &mpic 33 1
+ 0a800 0 0 2 &mpic 30 1
+ 0a800 0 0 3 &mpic 31 1
+ 0a800 0 0 4 &mpic 32 1
/* Bus 1 (Tundra Bridge) */
/* IDSEL 0x12 (ISA bridge) */
- 19000 0 0 1 40000 30 1
- 19000 0 0 2 40000 31 1
- 19000 0 0 3 40000 32 1
- 19000 0 0 4 40000 33 1>;
- interrupt-parent = <40000>;
+ 19000 0 0 1 &mpic 30 1
+ 19000 0 0 2 &mpic 31 1
+ 19000 0 0 3 &mpic 32 1
+ 19000 0 0 4 &mpic 33 1>;
+ interrupt-parent = <&mpic>;
interrupts = <08 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
compatible = "chrp,iic";
big-endian;
interrupts = <1>;
- interrupt-parent = <8000>;
+ interrupt-parent = <&pci1>;
};
};
pci@9000 {
- linux,phandle = <9000>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x15 */
- a800 0 0 1 40000 3b 1
- a800 0 0 2 40000 3b 1
- a800 0 0 3 40000 3b 1
- a800 0 0 4 40000 3b 1>;
- interrupt-parent = <40000>;
+ a800 0 0 1 &mpic 3b 1
+ a800 0 0 2 &mpic 3b 1
+ a800 0 0 3 &mpic 3b 1
+ a800 0 0 4 &mpic 3b 1>;
+ interrupt-parent = <&mpic>;
interrupts = <09 2>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 20000000
device_type = "pci";
};
- pic@40000 {
- linux,phandle = <40000>;
+ mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
/ {
model = "MPC8555CDS";
- compatible = "MPC85xxCDS";
+ compatible = "MPC8555CDS", "MPC85xxCDS";
#address-cells = <1>;
#size-cells = <1>;
- linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
- linux,phandle = <200>;
PowerPC,8555@0 {
device_type = "cpu";
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
32-bit;
- linux,phandle = <201>;
};
};
memory {
device_type = "memory";
- linux,phandle = <300>;
reg = <00000000 08000000>; // 128M at 0x0
};
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
dfsrr;
};
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
- linux,phandle = <24520>;
- ethernet-phy@0 {
- linux,phandle = <2452000>;
- interrupt-parent = <40000>;
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <0>;
device_type = "ethernet-phy";
};
- ethernet-phy@1 {
- linux,phandle = <2452001>;
- interrupt-parent = <40000>;
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <1>;
device_type = "ethernet-phy";
reg = <24000 1000>;
local-mac-address = [ 00 E0 0C 00 73 00 ];
interrupts = <0d 2 0e 2 12 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452000>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy0>;
};
ethernet@25000 {
reg = <25000 1000>;
local-mac-address = [ 00 E0 0C 00 73 01 ];
interrupts = <13 2 14 2 18 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452001>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
};
serial@4500 {
reg = <4500 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
serial@4600 {
reg = <4600 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
- pci@8000 {
- linux,phandle = <8000>;
+ pci1: pci@8000 {
interrupt-map-mask = <1f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 */
- 08000 0 0 1 40000 30 1
- 08000 0 0 2 40000 31 1
- 08000 0 0 3 40000 32 1
- 08000 0 0 4 40000 33 1
+ 08000 0 0 1 &mpic 30 1
+ 08000 0 0 2 &mpic 31 1
+ 08000 0 0 3 &mpic 32 1
+ 08000 0 0 4 &mpic 33 1
/* IDSEL 0x11 */
- 08800 0 0 1 40000 30 1
- 08800 0 0 2 40000 31 1
- 08800 0 0 3 40000 32 1
- 08800 0 0 4 40000 33 1
+ 08800 0 0 1 &mpic 30 1
+ 08800 0 0 2 &mpic 31 1
+ 08800 0 0 3 &mpic 32 1
+ 08800 0 0 4 &mpic 33 1
/* IDSEL 0x12 (Slot 1) */
- 09000 0 0 1 40000 30 1
- 09000 0 0 2 40000 31 1
- 09000 0 0 3 40000 32 1
- 09000 0 0 4 40000 33 1
+ 09000 0 0 1 &mpic 30 1
+ 09000 0 0 2 &mpic 31 1
+ 09000 0 0 3 &mpic 32 1
+ 09000 0 0 4 &mpic 33 1
/* IDSEL 0x13 (Slot 2) */
- 09800 0 0 1 40000 31 1
- 09800 0 0 2 40000 32 1
- 09800 0 0 3 40000 33 1
- 09800 0 0 4 40000 30 1
+ 09800 0 0 1 &mpic 31 1
+ 09800 0 0 2 &mpic 32 1
+ 09800 0 0 3 &mpic 33 1
+ 09800 0 0 4 &mpic 30 1
/* IDSEL 0x14 (Slot 3) */
- 0a000 0 0 1 40000 32 1
- 0a000 0 0 2 40000 33 1
- 0a000 0 0 3 40000 30 1
- 0a000 0 0 4 40000 31 1
+ 0a000 0 0 1 &mpic 32 1
+ 0a000 0 0 2 &mpic 33 1
+ 0a000 0 0 3 &mpic 30 1
+ 0a000 0 0 4 &mpic 31 1
/* IDSEL 0x15 (Slot 4) */
- 0a800 0 0 1 40000 33 1
- 0a800 0 0 2 40000 30 1
- 0a800 0 0 3 40000 31 1
- 0a800 0 0 4 40000 32 1
+ 0a800 0 0 1 &mpic 33 1
+ 0a800 0 0 2 &mpic 30 1
+ 0a800 0 0 3 &mpic 31 1
+ 0a800 0 0 4 &mpic 32 1
/* Bus 1 (Tundra Bridge) */
/* IDSEL 0x12 (ISA bridge) */
- 19000 0 0 1 40000 30 1
- 19000 0 0 2 40000 31 1
- 19000 0 0 3 40000 32 1
- 19000 0 0 4 40000 33 1>;
- interrupt-parent = <40000>;
+ 19000 0 0 1 &mpic 30 1
+ 19000 0 0 2 &mpic 31 1
+ 19000 0 0 3 &mpic 32 1
+ 19000 0 0 4 &mpic 33 1>;
+ interrupt-parent = <&mpic>;
interrupts = <08 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
compatible = "chrp,iic";
big-endian;
interrupts = <1>;
- interrupt-parent = <8000>;
+ interrupt-parent = <&pci1>;
};
};
pci@9000 {
- linux,phandle = <9000>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x15 */
- a800 0 0 1 40000 3b 1
- a800 0 0 2 40000 3b 1
- a800 0 0 3 40000 3b 1
- a800 0 0 4 40000 3b 1>;
- interrupt-parent = <40000>;
+ a800 0 0 1 &mpic 3b 1
+ a800 0 0 2 &mpic 3b 1
+ a800 0 0 3 &mpic 3b 1
+ a800 0 0 4 &mpic 3b 1>;
+ interrupt-parent = <&mpic>;
interrupts = <09 2>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 20000000
device_type = "pci";
};
- pic@40000 {
- linux,phandle = <40000>;
+ mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
/ {
model = "MPC8560ADS";
- compatible = "MPC85xxADS";
+ compatible = "MPC8560ADS", "MPC85xxADS";
#address-cells = <1>;
#size-cells = <1>;
- linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
- linux,phandle = <200>;
PowerPC,8560@0 {
device_type = "cpu";
bus-frequency = <13ab6680>;
clock-frequency = <312c8040>;
32-bit;
- linux,phandle = <201>;
};
};
memory {
device_type = "memory";
- linux,phandle = <300>;
reg = <00000000 10000000>;
};
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
- linux,phandle = <24520>;
#address-cells = <1>;
#size-cells = <0>;
- ethernet-phy@0 {
- linux,phandle = <2452000>;
- interrupt-parent = <40000>;
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
interrupts = <35 1>;
reg = <0>;
device_type = "ethernet-phy";
};
- ethernet-phy@1 {
- linux,phandle = <2452001>;
- interrupt-parent = <40000>;
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
interrupts = <35 1>;
reg = <1>;
device_type = "ethernet-phy";
};
- ethernet-phy@2 {
- linux,phandle = <2452002>;
- interrupt-parent = <40000>;
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&mpic>;
interrupts = <37 1>;
reg = <2>;
device_type = "ethernet-phy";
};
- ethernet-phy@3 {
- linux,phandle = <2452003>;
- interrupt-parent = <40000>;
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&mpic>;
interrupts = <37 1>;
reg = <3>;
device_type = "ethernet-phy";
reg = <24000 1000>;
address = [ 00 00 0C 00 00 FD ];
interrupts = <d 2 e 2 12 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452000>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy0>;
};
ethernet@25000 {
reg = <25000 1000>;
address = [ 00 00 0C 00 01 FD ];
interrupts = <13 2 14 2 18 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452001>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
};
pci@8000 {
- linux,phandle = <8000>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
interrupt-map = <
/* IDSEL 0x2 */
- 1000 0 0 1 40000 31 1
- 1000 0 0 2 40000 32 1
- 1000 0 0 3 40000 33 1
- 1000 0 0 4 40000 34 1
+ 1000 0 0 1 &mpic 31 1
+ 1000 0 0 2 &mpic 32 1
+ 1000 0 0 3 &mpic 33 1
+ 1000 0 0 4 &mpic 34 1
/* IDSEL 0x3 */
- 1800 0 0 1 40000 34 1
- 1800 0 0 2 40000 31 1
- 1800 0 0 3 40000 32 1
- 1800 0 0 4 40000 33 1
+ 1800 0 0 1 &mpic 34 1
+ 1800 0 0 2 &mpic 31 1
+ 1800 0 0 3 &mpic 32 1
+ 1800 0 0 4 &mpic 33 1
/* IDSEL 0x4 */
- 2000 0 0 1 40000 33 1
- 2000 0 0 2 40000 34 1
- 2000 0 0 3 40000 31 1
- 2000 0 0 4 40000 32 1
+ 2000 0 0 1 &mpic 33 1
+ 2000 0 0 2 &mpic 34 1
+ 2000 0 0 3 &mpic 31 1
+ 2000 0 0 4 &mpic 32 1
/* IDSEL 0x5 */
- 2800 0 0 1 40000 32 1
- 2800 0 0 2 40000 33 1
- 2800 0 0 3 40000 34 1
- 2800 0 0 4 40000 31 1
+ 2800 0 0 1 &mpic 32 1
+ 2800 0 0 2 &mpic 33 1
+ 2800 0 0 3 &mpic 34 1
+ 2800 0 0 4 &mpic 31 1
/* IDSEL 12 */
- 6000 0 0 1 40000 31 1
- 6000 0 0 2 40000 32 1
- 6000 0 0 3 40000 33 1
- 6000 0 0 4 40000 34 1
+ 6000 0 0 1 &mpic 31 1
+ 6000 0 0 2 &mpic 32 1
+ 6000 0 0 3 &mpic 33 1
+ 6000 0 0 4 &mpic 34 1
/* IDSEL 13 */
- 6800 0 0 1 40000 34 1
- 6800 0 0 2 40000 31 1
- 6800 0 0 3 40000 32 1
- 6800 0 0 4 40000 33 1
+ 6800 0 0 1 &mpic 34 1
+ 6800 0 0 2 &mpic 31 1
+ 6800 0 0 3 &mpic 32 1
+ 6800 0 0 4 &mpic 33 1
/* IDSEL 14*/
- 7000 0 0 1 40000 33 1
- 7000 0 0 2 40000 34 1
- 7000 0 0 3 40000 31 1
- 7000 0 0 4 40000 32 1
+ 7000 0 0 1 &mpic 33 1
+ 7000 0 0 2 &mpic 34 1
+ 7000 0 0 3 &mpic 31 1
+ 7000 0 0 4 &mpic 32 1
/* IDSEL 15 */
- 7800 0 0 1 40000 32 1
- 7800 0 0 2 40000 33 1
- 7800 0 0 3 40000 34 1
- 7800 0 0 4 40000 31 1
+ 7800 0 0 1 &mpic 32 1
+ 7800 0 0 2 &mpic 33 1
+ 7800 0 0 3 &mpic 34 1
+ 7800 0 0 4 &mpic 31 1
/* IDSEL 18 */
- 9000 0 0 1 40000 31 1
- 9000 0 0 2 40000 32 1
- 9000 0 0 3 40000 33 1
- 9000 0 0 4 40000 34 1
+ 9000 0 0 1 &mpic 31 1
+ 9000 0 0 2 &mpic 32 1
+ 9000 0 0 3 &mpic 33 1
+ 9000 0 0 4 &mpic 34 1
/* IDSEL 19 */
- 9800 0 0 1 40000 34 1
- 9800 0 0 2 40000 31 1
- 9800 0 0 3 40000 32 1
- 9800 0 0 4 40000 33 1
+ 9800 0 0 1 &mpic 34 1
+ 9800 0 0 2 &mpic 31 1
+ 9800 0 0 3 &mpic 32 1
+ 9800 0 0 4 &mpic 33 1
/* IDSEL 20 */
- a000 0 0 1 40000 33 1
- a000 0 0 2 40000 34 1
- a000 0 0 3 40000 31 1
- a000 0 0 4 40000 32 1
+ a000 0 0 1 &mpic 33 1
+ a000 0 0 2 &mpic 34 1
+ a000 0 0 3 &mpic 31 1
+ a000 0 0 4 &mpic 32 1
/* IDSEL 21 */
- a800 0 0 1 40000 32 1
- a800 0 0 2 40000 33 1
- a800 0 0 3 40000 34 1
- a800 0 0 4 40000 31 1>;
+ a800 0 0 1 &mpic 32 1
+ a800 0 0 2 &mpic 33 1
+ a800 0 0 3 &mpic 34 1
+ a800 0 0 4 &mpic 31 1>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
interrupts = <8 0>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
01000000 0 00000000 e2000000 0 01000000>;
};
- pic@40000 {
- linux,phandle = <40000>;
+ mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <40000 20100>;
+ reg = <40000 40000>;
built-in;
device_type = "open-pic";
};
cpm@e0000000 {
- linux,phandle = <e0000000>;
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
command-proc = <919c0>;
brg-frequency = <9d5b340>;
- pic@90c00 {
- linux,phandle = <90c00>;
+ cpmpic: pic@90c00 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
interrupts = <1e 0>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
reg = <90c00 80>;
built-in;
device_type = "cpm-pic";
tx-clock = <1>;
current-speed = <1c200>;
interrupts = <28 8>;
- interrupt-parent = <90c00>;
+ interrupt-parent = <&cpmpic>;
};
scc@91a20 {
tx-clock = <2>;
current-speed = <1c200>;
interrupts = <29 8>;
- interrupt-parent = <90c00>;
+ interrupt-parent = <&cpmpic>;
};
fcc@91320 {
rx-clock = <15>;
tx-clock = <16>;
interrupts = <21 8>;
- interrupt-parent = <90c00>;
- phy-handle = <2452002>;
+ interrupt-parent = <&cpmpic>;
+ phy-handle = <&phy2>;
};
fcc@91340 {
rx-clock = <17>;
tx-clock = <18>;
interrupts = <22 8>;
- interrupt-parent = <90c00>;
- phy-handle = <2452003>;
+ interrupt-parent = <&cpmpic>;
+ phy-handle = <&phy3>;
};
};
};
/ {
model = "MPC8568EMDS";
- compatible = "MPC85xxMDS";
+ compatible = "MPC8568EMDS", "MPC85xxMDS";
#address-cells = <1>;
#size-cells = <1>;
- linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
- linux,phandle = <200>;
PowerPC,8568@0 {
device_type = "cpu";
bus-frequency = <0>;
clock-frequency = <0>;
32-bit;
- linux,phandle = <201>;
};
};
memory {
device_type = "memory";
- linux,phandle = <300>;
reg = <00000000 10000000>;
};
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
dfsrr;
};
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <1b 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
dfsrr;
};
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
- linux,phandle = <24520>;
- ethernet-phy@0 {
- linux,phandle = <2452000>;
- interrupt-parent = <40000>;
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
interrupts = <31 1>;
reg = <0>;
device_type = "ethernet-phy";
};
- ethernet-phy@1 {
- linux,phandle = <2452001>;
- interrupt-parent = <40000>;
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
interrupts = <32 1>;
reg = <1>;
device_type = "ethernet-phy";
};
-
- ethernet-phy@2 {
- linux,phandle = <2452002>;
- interrupt-parent = <40000>;
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&mpic>;
interrupts = <31 1>;
reg = <2>;
device_type = "ethernet-phy";
};
- ethernet-phy@3 {
- linux,phandle = <2452003>;
- interrupt-parent = <40000>;
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&mpic>;
interrupts = <32 1>;
reg = <3>;
device_type = "ethernet-phy";
reg = <24000 1000>;
mac-address = [ 00 00 00 00 00 00 ];
interrupts = <d 2 e 2 12 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452002>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy2>;
};
ethernet@25000 {
reg = <25000 1000>;
mac-address = [ 00 00 00 00 00 00];
interrupts = <13 2 14 2 18 2>;
- interrupt-parent = <40000>;
- phy-handle = <2452003>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy3>;
};
serial@4500 {
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <1a 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
serial@4600 {
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <1a 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
crypto@30000 {
compatible = "talitos";
reg = <30000 f000>;
interrupts = <1d 2>;
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <000000fe>;
descriptor-types-mask = <012b0ebf>;
};
- pic@40000 {
- linux,phandle = <40000>;
+ mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
device_type = "par_io";
num-ports = <7>;
- ucc_pin@01 {
- linux,phandle = <e010001>;
+ pio1: ucc_pin@01 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
4 0a 1 0 2 0 /* TxD0 */
4 13 1 0 2 0 /* GTX_CLK */
1 1f 2 0 3 0>; /* GTX125 */
};
- ucc_pin@02 {
- linux,phandle = <e010002>;
+ pio2: ucc_pin@02 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
5 0a 1 0 2 0 /* TxD0 */
compatible = "fsl_spi";
reg = <4c0 40>;
interrupts = <2>;
- interrupt-parent = <80>;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
compatible = "fsl_spi";
reg = <500 40>;
interrupts = <1>;
- interrupt-parent = <80>;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
device-id = <1>;
reg = <2000 200>;
interrupts = <20>;
- interrupt-parent = <80>;
+ interrupt-parent = <&qeic>;
mac-address = [ 00 04 9f 00 23 23 ];
rx-clock = <0>;
tx-clock = <19>;
- phy-handle = <212000>;
- pio-handle = <e010001>;
+ phy-handle = <&qe_phy0>;
+ pio-handle = <&pio1>;
};
ucc@3000 {
device-id = <2>;
reg = <3000 200>;
interrupts = <21>;
- interrupt-parent = <80>;
+ interrupt-parent = <&qeic>;
mac-address = [ 00 11 22 33 44 55 ];
rx-clock = <0>;
tx-clock = <14>;
- phy-handle = <212001>;
- pio-handle = <e010002>;
+ phy-handle = <&qe_phy1>;
+ pio-handle = <&pio2>;
};
mdio@2120 {
/* These are the same PHYs as on
* gianfar's MDIO bus */
- ethernet-phy@00 {
- linux,phandle = <212000>;
- interrupt-parent = <40000>;
+ qe_phy0: ethernet-phy@00 {
+ interrupt-parent = <&mpic>;
interrupts = <31 1>;
reg = <0>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
- ethernet-phy@01 {
- linux,phandle = <212001>;
- interrupt-parent = <40000>;
+ qe_phy1: ethernet-phy@01 {
+ interrupt-parent = <&mpic>;
interrupts = <32 1>;
reg = <1>;
device_type = "ethernet-phy";
interface = <6>;
};
- ethernet-phy@02 {
- linux,phandle = <212002>;
- interrupt-parent = <40000>;
+ qe_phy2: ethernet-phy@02 {
+ interrupt-parent = <&mpic>;
interrupts = <31 1>;
reg = <2>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
- ethernet-phy@03 {
- linux,phandle = <212003>;
- interrupt-parent = <40000>;
+ qe_phy3: ethernet-phy@03 {
+ interrupt-parent = <&mpic>;
interrupts = <32 1>;
reg = <3>;
device_type = "ethernet-phy";
};
};
- qeic@80 {
- linux,phandle = <80>;
+ qeic: qeic@80 {
interrupt-controller;
device_type = "qeic";
#address-cells = <0>;
built-in;
big-endian;
interrupts = <1e 2 1e 2>; //high:30 low:30
- interrupt-parent = <40000>;
+ interrupt-parent = <&mpic>;
};
};
projects / linux-drm-fsl-dcu.git / commitdiff